Lines Matching +full:ref +full:- +full:clock +full:- +full:frequency
1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/frequency/adi,adf4350.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Michael Hennerich <michael.hennerich@analog.com>
15 - adi,adf4350
16 - adi,adf4351
21 spi-max-frequency:
26 description: Clock to provide CLKIN reference clock signal.
28 clock-names:
35 adi,channel-spacing:
36 $ref: /schemas/types.yaml#/definitions/uint32
40 adi,power-up-frequency:
41 $ref: /schemas/types.yaml#/definitions/uint32
43 If set the PLL tunes to this frequency (in Hz) on driver probe.
45 adi,reference-div-factor:
46 $ref: /schemas/types.yaml#/definitions/uint32
51 adi,reference-doubler-enable:
52 $ref: /schemas/types.yaml#/definitions/flag
55 adi,reference-div2-enable:
56 $ref: /schemas/types.yaml#/definitions/flag
59 adi,phase-detector-polarity-positive-enable:
60 $ref: /schemas/types.yaml#/definitions/flag
63 adi,lock-detect-precision-6ns-enable:
64 $ref: /schemas/types.yaml#/definitions/flag
67 adi,lock-detect-function-integer-n-enable:
68 $ref: /schemas/types.yaml#/definitions/flag
70 Enables lock detect for integer-N mode. Default = factional-N mode.
72 adi,charge-pump-current:
73 $ref: /schemas/types.yaml#/definitions/uint32
76 adi,muxout-select:
77 $ref: /schemas/types.yaml#/definitions/uint32
83 0: Three-State Output (default)
86 3: R-Counter output
87 4: N-Divider output
91 adi,low-spur-mode-enable:
92 $ref: /schemas/types.yaml#/definitions/flag
95 adi,cycle-slip-reduction-enable:
96 $ref: /schemas/types.yaml#/definitions/flag
99 adi,charge-cancellation-enable:
100 $ref: /schemas/types.yaml#/definitions/flag
102 Enabled charge pump charge cancellation for integer-N modes.
104 adi,anti-backlash-3ns-enable:
105 $ref: /schemas/types.yaml#/definitions/flag
107 Enables 3ns antibacklash pulse width for integer-N modes.
109 adi,band-select-clock-mode-high-enable:
110 $ref: /schemas/types.yaml#/definitions/flag
113 adi,12bit-clk-divider:
114 $ref: /schemas/types.yaml#/definitions/uint32
116 Clock divider value used when adi,12bit-clkdiv-mode != 0
118 adi,clk-divider-mode:
119 $ref: /schemas/types.yaml#/definitions/uint32
123 0: Clock divider off (default)
127 adi,aux-output-enable:
128 $ref: /schemas/types.yaml#/definitions/flag
131 adi,aux-output-fundamental-enable:
132 $ref: /schemas/types.yaml#/definitions/flag
137 adi,mute-till-lock-enable:
138 $ref: /schemas/types.yaml#/definitions/flag
139 description: Enables Mute-Till-Lock-Detect function.
141 adi,output-power:
142 $ref: /schemas/types.yaml#/definitions/uint32
147 0: -4dBm (default)
148 1: -1dBm
152 adi,aux-output-power:
153 $ref: /schemas/types.yaml#/definitions/uint32
158 0: -4dBm (default)
159 1: -1dBm
166 - compatible
167 - reg
168 - clocks
171 - |
173 #address-cells = <1>;
174 #size-cells = <0>;
179 spi-max-frequency = <10000000>;
181 clock-names = "clkin";
182 adi,channel-spacing = <10000>;
183 adi,power-up-frequency = <2400000000>;
184 adi,phase-detector-polarity-positive-enable;
185 adi,charge-pump-current = <2500>;
186 adi,output-power = <3>;
187 adi,mute-till-lock-enable;