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/Linux-v6.6/Documentation/devicetree/bindings/net/dsa/
Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/realtek.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek switches for unmanaged switches
10 - $ref: dsa.yaml#/$defs/ethernet-ports
13 - Linus Walleij <linus.walleij@linaro.org>
16 Realtek advertises these chips as fast/gigabit switches or unmanaged
17 switches. They can be controlled using different interfaces, like SMI,
20 The SMI "Simple Management Interface" is a two-wire protocol using
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/Linux-v6.6/drivers/net/dsa/realtek/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Realtek Ethernet switch family support"
10 Select to enable support for Realtek Ethernet switch chips.
19 tristate "Realtek MDIO interface driver"
29 tristate "Realtek SMI interface driver"
36 through SMI.
39 tristate "Realtek RTL8365MB switch subdriver"
44 Select to enable support for Realtek RTL8365MB-VC and RTL8367S.
47 tristate "Realtek RTL8366RB switch subdriver"
52 Select to enable support for Realtek RTL8366RB.
Drealtek-smi.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Realtek Simple Management Interface (SMI) driver
5 * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels
6 * but the protocol is not MDIO at all. Instead it is a Realtek
7 * pecularity that need to bit-bang the lines in a special way to
12 * RTL8366 - The original version, apparently
13 * RTL8369 - Similar enough to have the same datsheet as RTL8366
14 * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite
16 * RTL8366S - Is this "RTL8366 super"?
17 * RTL8367 - Has an OpenWRT driver as well
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_NET_DSA_REALTEK_MDIO) += realtek-mdio.o
3 obj-$(CONFIG_NET_DSA_REALTEK_SMI) += realtek-smi.o
4 obj-$(CONFIG_NET_DSA_REALTEK_RTL8366RB) += rtl8366.o
5 rtl8366-objs := rtl8366-core.o rtl8366rb.o
6 obj-$(CONFIG_NET_DSA_REALTEK_RTL8365MB) += rtl8365mb.o
Drealtek.h1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Realtek SMI interface driver defines
5 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
32 * struct rtl8366_vlan_mc - Virtual LAN member configuration
83 void *chip_data; /* Per-chip extra variant data */
87 * struct realtek_ops - vtable for the per-SMI-chiptype operations
Drealtek-mdio.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Realtek MDIO interface driver
6 * RTL8366 - The original version, apparently
7 * RTL8369 - Similar enough to have the same datsheet as RTL8366
8 * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite
10 * RTL8366S - Is this "RTL8366 super"?
11 * RTL8367 - Has an OpenWRT driver as well
12 * RTL8368S - Seems to be an alternative name for RTL8366RB
13 * RTL8370 - Also uses SMI
19 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
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Drtl8366-core.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI library helpers for the RTL8366x variants
6 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
14 #include "realtek.h"
22 for (i = 0; i < priv->num_ports; i++) { in rtl8366_mc_is_used()
25 ret = priv->ops->get_mc_index(priv, i, &index); in rtl8366_mc_is_used()
40 * rtl8366_obtain_mc() - retrieve or allocate a VLAN member configuration
41 * @priv: the Realtek SMI device instance
55 for (i = 0; i < priv->num_vlan_mc; i++) { in rtl8366_obtain_mc()
56 ret = priv->ops->get_vlan_mc(priv, i, vlanmc); in rtl8366_obtain_mc()
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Drtl8365mb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8365MB-VC ethernet switch.
4 * Copyright (C) 2021 Alvin Šipraga <alsi@bang-olufsen.dk>
5 * Copyright (C) 2021 Michael Rasmussen <mir@bang-olufsen.dk>
7 * The RTL8365MB-VC is a 4+1 port 10/100/1000M switch controller. It includes 4
9 * can be connected to the CPU - or another PHY - via either MII, RMII, or
10 * RGMII. The switch is configured via the Realtek Simple Management Interface
11 * (SMI), which uses the MDIO/MDC lines.
15 * .-----------------------------------.
17 * UTP <---------------> Giga PHY <-> PCS <-> P0 GMAC |
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Drtl8366rb.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Realtek SMI subdriver for the Realtek RTL8366RB ethernet switch
9 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
24 #include "realtek.h"
46 /* Switch per-port learning disablement register */
164 * VID such as untagged or priority-tagged frames for respective
167 * a C-tag with VID != 0 for respective port.
354 * struct rtl8366rb - RTL8366RB-specific data
355 * @max_mtu: per-port max MTU setting
410 mib->offset; in rtl8366rb_get_mib_counter()
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/Linux-v6.6/arch/arm/boot/dts/broadcom/
Dbcm47094-asus-rt-ac88u.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 /dts-v1/;
8 #include "bcm47094-asus-rt-ac3100.dtsi"
11 compatible = "asus,rt-ac88u", "brcm,bcm47094", "brcm,bcm4708";
12 model = "ASUS RT-AC88U";
20 compatible = "realtek,rtl8365mb";
22 mdc-gpios = <&chipcommon 6 GPIO_ACTIVE_HIGH>;
23 mdio-gpios = <&chipcommon 7 GPIO_ACTIVE_HIGH>;
24 reset-gpios = <&chipcommon 10 GPIO_ACTIVE_LOW>;
25 realtek,disable-leds;
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/Linux-v6.6/arch/arm/boot/dts/gemini/
Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
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/Linux-v6.6/
DMAINTAINERS5 ---------------------------------------------------
21 W: *Web-page* with status/info
23 B: URI for where to file *bugs*. A web-page with detailed bug
28 patches to the given subsystem. This is either an in-tree file,
29 or a URI. See Documentation/maintainer/maintainer-entry-profile.rst
46 N: [^a-z]tegra all files whose path contains tegra
64 ----------------
83 3WARE SAS/SATA-RAID SCSI DRIVERS (3W-XXXX, 3W-9XXX, 3W-SAS)
85 L: linux-scsi@vger.kernel.org
88 F: drivers/scsi/3w-*
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/Linux-v6.6/drivers/pci/
Dquirks.c1 // SPDX-License-Identifier: GPL-2.0
3 * This file contains work-arounds for many known PCI hardware bugs.
5 * should be handled in arch-specific code.
20 #include <linux/isa-dma.h> /* isa_dma_bridge_buggy */
88 !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting) in pcie_failed_link_retrain()
95 pci_info(dev, "broken device, retraining non-functional downstream link at 2.5GT/s\n"); in pcie_failed_link_retrain()
157 if ((f->class == (u32) (dev->class >> f->class_shift) || in pci_do_fixups()
158 f->class == (u32) PCI_ANY_ID) && in pci_do_fixups()
159 (f->vendor == dev->vendor || in pci_do_fixups()
160 f->vendor == (u16) PCI_ANY_ID) && in pci_do_fixups()
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