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/Linux-v6.1/Documentation/devicetree/bindings/net/dsa/
Drealtek.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/realtek.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek switches for unmanaged switches
10 - $ref: dsa.yaml#
13 - Linus Walleij <linus.walleij@linaro.org>
16 Realtek advertises these chips as fast/gigabit switches or unmanaged
18 MDIO or SPI.
20 The SMI "Simple Management Interface" is a two-wire protocol using
[all …]
/Linux-v6.1/drivers/net/dsa/realtek/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 tristate "Realtek Ethernet switch family support"
10 Select to enable support for Realtek Ethernet switch chips.
19 tristate "Realtek MDIO interface driver"
26 through MDIO.
29 tristate "Realtek SMI interface driver"
39 tristate "Realtek RTL8365MB switch subdriver"
44 Select to enable support for Realtek RTL8365MB-VC and RTL8367S.
47 tristate "Realtek RTL8366RB switch subdriver"
52 Select to enable support for Realtek RTL8366RB.
Drealtek-smi.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Realtek Simple Management Interface (SMI) driver
5 * The SMI protocol piggy-backs the MDIO MDC and MDIO signals levels
6 * but the protocol is not MDIO at all. Instead it is a Realtek
7 * pecularity that need to bit-bang the lines in a special way to
12 * RTL8366 - The original version, apparently
13 * RTL8369 - Similar enough to have the same datsheet as RTL8366
14 * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite
16 * RTL8366S - Is this "RTL8366 super"?
17 * RTL8367 - Has an OpenWRT driver as well
[all …]
Drealtek-mdio.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Realtek MDIO interface driver
6 * RTL8366 - The original version, apparently
7 * RTL8369 - Similar enough to have the same datsheet as RTL8366
8 * RTL8366RB - Probably reads out "RTL8366 revision B", has a quite
10 * RTL8366S - Is this "RTL8366 super"?
11 * RTL8367 - Has an OpenWRT driver as well
12 * RTL8368S - Seems to be an alternative name for RTL8366RB
13 * RTL8370 - Also uses SMI
19 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
[all …]
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_NET_DSA_REALTEK_MDIO) += realtek-mdio.o
3 obj-$(CONFIG_NET_DSA_REALTEK_SMI) += realtek-smi.o
4 obj-$(CONFIG_NET_DSA_REALTEK_RTL8366RB) += rtl8366.o
5 rtl8366-objs := rtl8366-core.o rtl8366rb.o
6 obj-$(CONFIG_NET_DSA_REALTEK_RTL8365MB) += rtl8365mb.o
Drealtek.h1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /* Realtek SMI interface driver defines
5 * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
32 * struct rtl8366_vlan_mc - Virtual LAN member configuration
53 struct gpio_desc *mdio; member
83 void *chip_data; /* Per-chip extra variant data */
87 * struct realtek_ops - vtable for the per-SMI-chiptype operations
/Linux-v6.1/Documentation/devicetree/bindings/net/
Drealtek,rtl82xx.yaml1 # SPDX-License-Identifier: GPL-2.0+
3 ---
4 $id: http://devicetree.org/schemas/net/realtek,rtl82xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Realtek RTL82xx PHY
10 - Andrew Lunn <andrew@lunn.ch>
11 - Florian Fainelli <f.fainelli@gmail.com>
12 - Heiner Kallweit <hkallweit1@gmail.com>
15 Bindings for Realtek RTL82xx PHYs
18 - $ref: ethernet-phy.yaml#
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dbcm47094-asus-rt-ac88u.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
3 * Copyright (C) 2021-2022 Arınç ÜNAL <arinc.unal@arinc9.com>
6 /dts-v1/;
9 #include "bcm5301x-nand-cs0-bch8.dtsi"
12 compatible = "asus,rt-ac88u", "brcm,bcm47094", "brcm,bcm4708";
13 model = "Asus RT-AC88U";
34 compatible = "gpio-leds";
39 linux,default-trigger = "default-on";
42 wan-red {
55 trigger-sources = <&ehci_port2>;
[all …]
Dgemini-dlink-dir-685.dts2 * Device Tree file for D-Link DIR-685 Xtreme N Storage Router
5 /dts-v1/;
8 #include <dt-bindings/input/input.h>
11 model = "D-Link DIR-685 Xtreme N Storage Router";
12 compatible = "dlink,dir-685", "cortina,gemini";
13 #address-cells = <1>;
14 #size-cells = <1>;
17 /* 128 MB SDRAM in 2 x Hynix HY5DU121622DTP-D43 */
24 stdout-path = "uart0:19200n8";
28 compatible = "gpio-keys";
[all …]
Dgemini-dlink-dns-313.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree file for D-Link DNS-313 1-Bay Network Storage Enclosure
6 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/thermal/thermal.h>
13 model = "D-Link DNS-313 1-Bay Network Storage Enclosure";
14 compatible = "dlink,dns-313", "cortina,gemini";
15 #address-cells = <1>;
16 #size-cells = <1>;
19 /* 64 MB SDRAM in a Nanya NT5DS32M16BS-6K package */
[all …]
Dmeson8b-ec100.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
35 gpio-keys {
36 compatible = "gpio-keys-polled";
[all …]
Dmeson8m2-mxiii-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2018 Oleg Ivanov <balbes-150@yandex.ru>
7 /dts-v1/;
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/input/input.h>
16 compatible = "tronsmart,mxiii-plus", "amlogic,meson8m2";
27 stdout-path = "serial0:115200n8";
35 adc-keys {
36 compatible = "adc-keys";
37 io-channels = <&saradc 0>;
[all …]
Dintel-ixp42x-ixdpg425.dts1 // SPDX-License-Identifier: ISC
5 * Ethernet set-up from OpenWrt.
15 /dts-v1/;
17 #include "intel-ixp42x.dtsi"
18 #include <dt-bindings/input/input.h>
23 #address-cells = <1>;
24 #size-cells = <1>;
34 stdout-path = "uart0:115200n8";
44 compatible = "intel,ixp4xx-flash", "cfi-flash";
45 bank-width = <2>;
[all …]
Dkirkwood-t5325.dts1 // SPDX-License-Identifier: GPL-2.0
7 * Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
12 /dts-v1/;
15 #include "kirkwood-6281.dtsi"
19 compatible = "hp,t5325", "marvell,kirkwood-88f6281", "marvell,kirkwood";
28 stdout-path = &uart0;
32 pinctrl: pin-controller@10000 {
33 pinctrl-0 = <&pmx_i2s &pmx_sysrst>;
34 pinctrl-names = "default";
36 pmx_button_power: pmx-button_power {
[all …]
Dmeson8b-odroidc1.dts1 // SPDX-License-Identifier: GPL-2.0 OR MIT
7 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
12 model = "Hardkernel ODROID-C1";
13 compatible = "hardkernel,odroid-c1", "amlogic,meson8b";
22 stdout-path = "serial0:115200n8";
30 emmc_pwrseq: emmc-pwrseq {
31 compatible = "mmc-pwrseq-emmc";
32 reset-gpios = <&gpio BOOT_9 GPIO_ACTIVE_LOW>;
36 compatible = "gpio-leds";
[all …]
/Linux-v6.1/drivers/net/phy/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
4 libphy-y := phy.o phy-c45.o phy-core.o phy_device.o \
6 mdio-bus-y += mdio_bus.o mdio_device.o
9 obj-y += mdio-boardinfo.o
13 # dependencies that does not make it possible to split mdio-bus objects into a
16 libphy-y += $(mdio-bus-y)
18 obj-$(CONFIG_MDIO_DEVICE) += mdio-bus.o
20 obj-$(CONFIG_MDIO_DEVRES) += mdio_devres.o
21 libphy-$(CONFIG_SWPHY) += swphy.o
22 libphy-$(CONFIG_LED_TRIGGER_PHY) += phy_led_triggers.o
[all …]
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
35 Adds support for a set of LED trigger events per-PHY. Link
39 logical-or of all the link speed ones.
49 tristate "MDIO Bus/PHY emulation with fixed speed/link PHYs"
53 Adds the platform "fixed" MDIO Bus to cover the boards that use
54 PHYs that are not connected to the real MDIO bus.
56 Currently tested with mpc866ads and mpc8349e-mitx.
82 - ADIN1200 - Robust,Industrial, Low Power 10/100 Ethernet PHY
83 - ADIN1300 - Robust,Industrial, Low Latency 10/100/1000 Gigabit
91 - ADIN1100 - Robust,Industrial, Low Power 10BASE-T1L Ethernet PHY
[all …]
Drealtek.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* drivers/net/phy/realtek.c
4 * Driver for Realtek PHYs
75 MODULE_DESCRIPTION("Realtek PHY driver");
97 struct device *dev = &phydev->mdio.dev; in rtl821x_probe()
99 u32 phy_id = phydev->drv->phy_id; in rtl821x_probe()
104 return -ENOMEM; in rtl821x_probe()
110 priv->phycr1 = ret & (RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF); in rtl821x_probe()
111 if (of_property_read_bool(dev->of_node, "realtek,aldps-enable")) in rtl821x_probe()
112 priv->phycr1 |= RTL8211F_ALDPS_PLL_OFF | RTL8211F_ALDPS_ENABLE | RTL8211F_ALDPS_XTAL_OFF; in rtl821x_probe()
[all …]
/Linux-v6.1/drivers/net/dsa/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
20 tristate "DSA mock-up Ethernet switch chip support"
23 This enables support for a fake mock-up switch chip which
63 source "drivers/net/dsa/realtek/Kconfig"
83 tristate "SMSC/Microchip LAN9303 3-ports 10/100 ethernet switch in I2C managed mode"
93 tristate "Microchip LAN9303/LAN9354 3-ports 10/100 ethernet switch in MDIO managed mode"
98 for MDIO managed mode.
124 a CPU-attached address bus and work in memory-mapped I/O mode.
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 gpio-leds {
20 compatible = "gpio-leds";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_led>;
27 default-state = "on";
[all …]
/Linux-v6.1/drivers/staging/rtl8723bs/include/
Drtl8723b_spec.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
10 #define HAL_NAV_UPPER_UNIT_8723B 128 /* micro-second */
81 #define REG_MDIO_WDATA_8723B 0x0354 /* MDIO for Write PCIE PHY */
82 #define REG_MDIO_RDATA_8723B 0x0356 /* MDIO for Reads PCIE PHY */
83 #define REG_MDIO_CTL_8723B 0x0358 /* MDIO for Control */
87 #define REG_PCIE_MULTIFET_CTRL_8723B 0x036A /* PCIE Multi-Fethc Control */
190 /* IMR DW0(0x00B0-00B3) Bit 0-31 */
216 /* IMR DW1(0x00B4-00B7) Bit 0-31 */
/Linux-v6.1/arch/arm64/boot/dts/amlogic/
Dmeson-gxbb-wetek.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/leds/common.h>
19 stdout-path = "serial0:115200n8";
28 compatible = "gpio-leds";
30 led-power {
31 /* red in suspend or power-off */
35 default-state = "on";
36 panic-indicator;
[all …]
Dmeson-gxbb-odroidc2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
10 #include "meson-gxbb.dtsi"
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/sound/meson-aiu.h>
15 compatible = "hardkernel,odroid-c2", "amlogic,meson-gxbb";
16 model = "Hardkernel ODROID-C2";
24 stdout-path = "serial0:115200n8";
32 usb_otg_pwr: regulator-usb-pwrs {
33 compatible = "regulator-fixed";
[all …]
Dmeson-gxbb-vega-s95.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gxbb.dtsi"
7 #include <dt-bindings/sound/meson-aiu.h>
10 compatible = "tronsmart,vega-s95", "amlogic,meson-gxbb";
18 stdout-path = "serial0:115200n8";
21 spdif_dit: audio-codec-0 {
22 #sound-dai-cells = <0>;
23 compatible = "linux,spdif-dit";
25 sound-name-prefix = "DIT";
29 compatible = "gpio-leds";
[all …]
Dmeson-gxbb-nanopi-k2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "meson-gxbb.dtsi"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/sound/meson-aiu.h>
13 compatible = "friendlyarm,nanopi-k2", "amlogic,meson-gxbb";
22 stdout-path = "serial0:115200n8";
31 compatible = "gpio-leds";
33 led-stat {
34 label = "nanopi-k2:blue:stat";
[all …]

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