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/Linux-v5.10/arch/arm/boot/dts/
Dhi3620-hi4511.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012-2013 Linaro Ltd.
7 /dts-v1/;
13 compatible = "hisilicon,hi3620-hi4511";
17 stdout-path = "serial0:115200n8";
31 pinctrl-names = "default", "idle";
32 pinctrl-0 = <&uart0_pmx_func &uart0_cfg_func>;
33 pinctrl-1 = <&uart0_pmx_idle &uart0_cfg_idle>;
38 pinctrl-names = "default", "idle";
39 pinctrl-0 = <&uart1_pmx_func &uart1_cfg_func>;
[all …]
Dste-href.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2012 ST-Ericsson AB
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include "ste-href-family-pinctrl.dtsi"
17 pinctrl-names = "default", "sleep";
18 pinctrl-0 = <&u0_a_1_default>;
19 pinctrl-1 = <&u0_a_1_sleep>;
25 pinctrl-names = "default", "sleep";
26 pinctrl-0 = <&u1rxtx_a_1_default>;
27 pinctrl-1 = <&u1rxtx_a_1_sleep>;
[all …]
Dstm32mp157c-ev1.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved
6 /dts-v1/;
8 #include "stm32mp157c-ed1.dts"
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
14 compatible = "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", "st,stm32mp157";
17 stdout-path = "serial0:115200n8";
27 clk_ext_camera: clk-ext-camera {
28 #clock-cells = <0>;
[all …]
Dste-ux500-samsung-golden.dts1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include "ste-db8500.dtsi"
5 #include "ste-ab8505.dtsi"
6 #include "ste-dbx5x0-pinctrl.dtsi"
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
13 * You need an intermediate, device-tree compatible bootloader
16 * There is a port of (mainline) U-Boot, see
[all …]
Dmt7623n-rfb-emmc.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2017-2018 MediaTek Inc.
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
15 compatible = "mediatek,mt7623n-rfb-emmc", "mediatek,mt7623";
24 stdout-path = "serial2:115200n8";
28 compatible = "hdmi-connector";
31 ddc-i2c-bus = <&hdmiddc0>;
35 remote-endpoint = <&hdmi0_out>;
42 proc-supply = <&mt6323_vproc_reg>;
[all …]
Dste-ux500-samsung-skomer.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * Devicetree for the Samsung XCover 2 GT-S7710 also known as Skomer.
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-ab8505.dtsi"
9 #include "ste-dbx5x0-pinctrl.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
15 model = "Samsung XCover 2 (GT-S7710)";
[all …]
Dstm32mp15xx-dkx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/mfd/st,stpmic1.h>
16 reserved-memory {
17 #address-cells = <1>;
18 #size-cells = <1>;
22 compatible = "shared-dma-pool";
24 no-map;
28 compatible = "shared-dma-pool";
[all …]
Dimx28-m28evk.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
7 /dts-v1/;
8 #include "imx28-m28.dtsi"
17 compatible = "fsl,imx28-mmc";
18 pinctrl-names = "default";
19 pinctrl-0 = <&mmc0_8bit_pins_a
22 bus-width = <8>;
23 wp-gpios = <&gpio3 10 0>;
24 vmmc-supply = <&reg_vddio_sd0>;
29 #address-cells = <1>;
[all …]
Dimx6qdl-gw5912.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
22 stdout-path = &uart2;
25 gpio-keys {
26 compatible = "gpio-keys";
27 #address-cells = <1>;
28 #size-cells = <0>;
30 user-pb {
[all …]
Dbcm-cygnus.dtsi33 #include <dt-bindings/interrupt-controller/arm-gic.h>
34 #include <dt-bindings/interrupt-controller/irq.h>
35 #include <dt-bindings/clock/bcm-cygnus.h>
38 #address-cells = <1>;
39 #size-cells = <1>;
42 interrupt-parent = <&gic>;
54 #address-cells = <1>;
55 #size-cells = <0>;
59 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
[all …]
Dstm32mp15xx-dhcor-avenger96.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
3 * Copyright (C) Linaro Ltd 2019 - All Rights Reserved
8 /* Avenger96 uses DHCOR SoM configured for 1V8 IO operation */
9 #include "stm32mp15xx-dhcor-io1v8.dtsi"
22 cec_clock: clk-cec-fixed {
23 #clock-cells = <0>;
24 compatible = "fixed-clock";
25 clock-frequency = <24000000>;
29 stdout-path = "serial0:115200n8";
32 hdmi-out {
[all …]
Dste-snowball.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright 2011 ST-Ericsson AB
6 /dts-v1/;
7 #include "ste-db8500.dtsi"
8 #include "ste-href-ab8500.dtsi"
9 #include "ste-href-family-pinctrl.dtsi"
13 compatible = "calaosystems,snowball-a9500", "st-ericsson,u9500";
21 compatible = "regulator-fixed";
22 regulator-name = "en-3v3-fixed-supply";
23 regulator-min-microvolt = <3300000>;
[all …]
Dimx6sx-nitrogen6sx.dts1 // SPDX-License-Identifier: GPL-2.0 OR X11
6 /dts-v1/;
12 compatible = "boundary,imx6sx-nitrogen6sx", "fsl,imx6sx";
19 backlight-lvds {
20 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <6>;
24 power-supply = <&reg_3p3v>;
27 reg_1p8v: regulator-1p8v {
28 compatible = "regulator-fixed";
[all …]
Dam335x-cm-t335.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * am335x-cm-t335.dts - Device Tree file for Compulab CM-T335
5 * Copyright (C) 2014 - 2015 CompuLab Ltd. - http://www.compulab.co.il/
8 /dts-v1/;
11 #include <dt-bindings/interrupt-controller/irq.h>
14 model = "CompuLab CM-T335";
15 compatible = "compulab,cm-t335", "ti,am33xx";
23 compatible = "gpio-leds";
24 pinctrl-names = "default";
25 pinctrl-0 = <&gpio_led_pins>;
[all …]
Duniphier-sld8.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
5 // Copyright (C) 2015-2016 Socionext Inc.
8 #include <dt-bindings/gpio/uniphier-gpio.h>
11 compatible = "socionext,uniphier-sld8";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 #address-cells = <1>;
17 #size-cells = <0>;
21 compatible = "arm,cortex-a9";
23 enable-method = "psci";
[all …]
Dr8a7790-lager.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2014 Renesas Solutions Corp.
7 * Copyright (C) 2015-2016 Renesas Electronics Corporation
11 * SSI-AK4643
13 * SW1: 1: AK4643
38 /dts-v1/;
40 #include <dt-bindings/gpio/gpio.h>
41 #include <dt-bindings/input/input.h>
60 stdout-path = "serial0:115200n8";
70 reg = <1 0x40000000 0 0xc0000000>;
[all …]
Dmt7623n-bananapi-bpi-r2.dts2 * Copyright 2017-2018 Sean Wang <sean.wang@mediatek.com>
4 * SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/input.h>
13 model = "Bananapi BPI-R2";
14 compatible = "bananapi,bpi-r2", "mediatek,mt7623";
21 stdout-path = "serial2:115200n8";
25 compatible = "hdmi-connector";
28 ddc-i2c-bus = <&hdmiddc0>;
32 remote-endpoint = <&hdmi0_out>;
[all …]
/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/
Dpinctrl-single.txt1 One-register-per-pin type device tree based pinctrl driver
4 - compatible : "pinctrl-single" or "pinconf-single".
5 "pinctrl-single" means that pinconf isn't supported.
6 "pinconf-single" means that generic pinconf is supported.
8 - reg : offset and length of the register set for the mux registers
10 - #pinctrl-cells : number of cells in addition to the index, set to 1
11 for pinctrl-single,pins and 2 for pinctrl-single,bits
13 - pinctrl-single,register-width : pinmux register access width in bits
15 - pinctrl-single,function-mask : mask of allowed pinmux function bits
19 - pinctrl-single,function-off : function off mode for disabled state if
[all …]
Dallwinner,sun4i-a10-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 "#gpio-cells":
21 "#interrupt-cells":
30 - allwinner,sun4i-a10-pinctrl
31 - allwinner,sun5i-a10s-pinctrl
[all …]
/Linux-v5.10/arch/arm64/boot/dts/hisilicon/
Dhikey970-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Pinctrl dts file for HiSilicon HiKey970 development board
6 #include <dt-bindings/pinctrl/hisi.h>
10 range: gpio-range {
11 #pinctrl-single,gpio-range-cells = <3>;
15 compatible = "pinctrl-single";
17 #pinctrl-cells = <1>;
18 #gpio-range-cells = <0x3>;
19 pinctrl-single,register-width = <0x20>;
20 pinctrl-single,function-mask = <0x7>;
[all …]
Dpoplar-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Pinctrl dts file for HiSilicon Poplar board
5 * Copyright (c) 2016-2018 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/pinctrl/hisi.h>
19 emmc_pins_1: emmc-pins-1 {
20 pinctrl-single,pins = <
31 pinctrl-single,bias-pulldown = <
32 PINCTRL_PULLDOWN(0, 1, 0, 1)
34 pinctrl-single,bias-pullup = <
35 PINCTRL_PULLUP(0, 1, 0, 1)
[all …]
Dhikey960-pinctrl.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * pinctrl dts fils for Hislicon HiKey960 development board
7 #include <dt-bindings/pinctrl/hisi.h>
12 range: gpio-range {
13 #pinctrl-single,gpio-range-cells = <3>;
17 compatible = "pinctrl-single";
19 #pinctrl-cells = <1>;
20 #gpio-range-cells = <0x3>;
21 pinctrl-single,register-width = <0x20>;
22 pinctrl-single,function-mask = <0x7>;
[all …]
/Linux-v5.10/drivers/pinctrl/bcm/
Dpinctrl-nsp-mux.c15 * a group based selection. The gpio_a 8 - 11 are muxed with gpio_b and pwm.
18 * gpio_a (8 - 11)
19 * +----------
21 * gpio_a (8-11) | gpio_b (0 - 3)
22 * ------------------------+-------+----------
24 * | pwm (0 - 3)
25 * +----------
31 #include <linux/pinctrl/pinconf.h>
32 #include <linux/pinctrl/pinconf-generic.h>
33 #include <linux/pinctrl/pinctrl.h>
[all …]
/Linux-v5.10/arch/mips/boot/dts/ralink/
Dmt7628a.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #address-cells = <1>;
5 #size-cells = <1>;
6 compatible = "ralink,mt7628a-soc";
9 #address-cells = <1>;
10 #size-cells = <0>;
19 resetc: reset-controller {
20 compatible = "ralink,rt2880-reset";
21 #reset-cells = <1>;
24 cpuintc: interrupt-controller {
[all …]
/Linux-v5.10/arch/arm64/boot/dts/toshiba/
Dtmpv7708.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * (C) Copyright 2018 - 2020, Toshiba Corporation.
10 #include <dt-bindings/interrupt-controller/irq.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 /memreserve/ 0x81000000 0x00300000; /* cpu-release-addr */
17 #address-cells = <2>;
18 #size-cells = <2>;
21 #address-cells = <1>;
22 #size-cells = <0>;
24 cpu-map {
[all …]

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