Searched +full:phy +full:- +full:10 +full:base +full:- +full:t1l +full:- +full:2 (Results 1 – 8 of 8) sorted by relevance
/Linux-v6.1/include/uapi/linux/ |
D | mdio.h | 1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ 4 * Copyright 2006-2009 Solarflare Communications Inc. 7 * under the terms of the GNU General Public License version 2 as published 20 #define MDIO_MMD_WIS 2 /* WAN Interface Sublayer */ 22 #define MDIO_MMD_PHYXS 4 /* PHY Extender Sublayer */ 25 #define MDIO_MMD_AN 7 /* Auto-Negotiation */ 28 #define MDIO_MMD_VEND2 31 /* Vendor specific 2 */ 38 #define MDIO_CTRL2 7 /* 10G control 2 */ 39 #define MDIO_STAT2 8 /* 10G status 2 */ 40 #define MDIO_PMA_TXDIS 9 /* 10G PMA/PMD transmit disable */ [all …]
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/Linux-v6.1/drivers/net/phy/ |
D | adin1100.c | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Driver for Analog Devices Industrial Ethernet T1L PHYs 14 #include <linux/phy.h> 31 #define ADIN_IS_CFG_SLV BIT(2) 59 * struct adin_priv - ADIN PHY driver private data 60 * @tx_level_2v4_able: set if the PHY supports 2.4V TX levels (10BASE-T1L) 61 * @tx_level_2v4: set if the PHY requests 2.4V TX levels (10BASE-T1L) 83 phydev->master_slave_state = MASTER_SLAVE_STATE_SLAVE; in adin_read_status() 86 phydev->master_slave_state = MASTER_SLAVE_STATE_MASTER; in adin_read_status() 93 struct adin_priv *priv = phydev->priv; in adin_config_aneg() [all …]
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D | phy-c45.c | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Clause 45 PHY support 9 #include <linux/phy.h> 12 * genphy_c45_baset1_able - checks if the PMA has BASE-T1 extended abilities 19 if (phydev->pma_extable == -ENODATA) { in genphy_c45_baset1_able() 24 phydev->pma_extable = val; in genphy_c45_baset1_able() 27 return !!(phydev->pma_extable & MDIO_PMA_EXTABLE_BT1); in genphy_c45_baset1_able() 31 * genphy_c45_pma_can_sleep - checks if the PMA have sleep support 46 * genphy_c45_pma_resume - wakes up the PMA module 52 return -EOPNOTSUPP; in genphy_c45_pma_resume() [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/net/ |
D | adi,adin1110.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: ADI ADIN1110 MAC-PHY 10 - Alexandru Tachici <alexandru.tachici@analog.com> 13 The ADIN1110 is a low power single port 10BASE-T1L MAC- 14 PHY designed for industrial Ethernet applications. It integrates 15 an Ethernet PHY core with a MAC and all the associated analog 18 The ADIN2111 is a low power, low complexity, two-Ethernet ports 19 switch with integrated 10BASE-T1L PHYs and one serial peripheral [all …]
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D | ethernet-phy.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 4 $id: http://devicetree.org/schemas/net/ethernet-phy.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Ethernet PHY Generic Binding 10 - Andrew Lunn <andrew@lunn.ch> 11 - Florian Fainelli <f.fainelli@gmail.com> 12 - Heiner Kallweit <hkallweit1@gmail.com> 14 # The dt-schema tools will generate a select statement first by using 21 pattern: "^ethernet-phy(@[a-f0-9]+)?$" [all …]
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/Linux-v6.1/drivers/net/ethernet/adi/ |
D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 21 tristate "Analog Devices ADIN1110 MAC-PHY" 26 Low Power 10BASE-T1L Ethernet MAC-PHY.
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D | adin1110.c | 1 // SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause 2 /* ADIN1110 Low Power 10BASE-T1L Ethernet MAC-PHY 3 * ADIN2111 2-Port Ethernet Switch with Integrated 10BASE-T1L PHY 23 #include <linux/phy.h> 43 #define ADIN1110_FWD_UNK2HOST BIT(2) 49 #define ADIN1110_SPI_ERR BIT(10) 54 #define ADIN1110_SPI_ERR_IRQ BIT(10) 98 #define ADIN1110_WR_HEADER_LEN 2 99 #define ADIN1110_FRAME_HEADER_LEN 2 100 #define ADIN1110_INTERNAL_SIZE_HEADER_LEN 2 [all …]
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/Linux-v6.1/net/ethtool/ |
D | common.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 #include <linux/phy.h> 12 [NETIF_F_SG_BIT] = "tx-scatter-gather", 13 [NETIF_F_IP_CSUM_BIT] = "tx-checksum-ipv4", 14 [NETIF_F_HW_CSUM_BIT] = "tx-checksum-ip-generic", 15 [NETIF_F_IPV6_CSUM_BIT] = "tx-checksum-ipv6", 17 [NETIF_F_FRAGLIST_BIT] = "tx-scatter-gather-fraglist", 18 [NETIF_F_HW_VLAN_CTAG_TX_BIT] = "tx-vlan-hw-insert", 20 [NETIF_F_HW_VLAN_CTAG_RX_BIT] = "rx-vlan-hw-parse", 21 [NETIF_F_HW_VLAN_CTAG_FILTER_BIT] = "rx-vlan-filter", [all …]
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