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/Linux-v6.1/Documentation/devicetree/bindings/net/pcs/
Drenesas,rzn1-miic.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/pcs/renesas,rzn1-miic.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Clément Léger <clement.leger@bootlin.com>
17 '#address-cells':
20 '#size-cells':
25 - enum:
26 - renesas,r9a06g032-miic
27 - const: renesas,rzn1-miic
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/Linux-v6.1/drivers/net/pcs/
Dpcs-rzn1-miic.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/pcs-rzn1-miic.h>
16 #include <dt-bindings/net/pcs-rzn1-miic.h>
51 #define MIIC_MODCTRL_CONF_NONE -1
54 * struct modctrl_match - Matching table entry for convctrl configuration
58 * then index 1 - 5 are CONV1 - CONV5.
121 * struct miic - MII converter structure
126 * @lock: Lock used for read-modify-write access
128 struct miic { struct
137 * struct miic_port - Per port MII converter struct
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Makefile for Linux PCS drivers
4 pcs_xpcs-$(CONFIG_PCS_XPCS) := pcs-xpcs.o pcs-xpcs-nxp.o
6 obj-$(CONFIG_PCS_XPCS) += pcs_xpcs.o
7 obj-$(CONFIG_PCS_LYNX) += pcs-lynx.o
8 obj-$(CONFIG_PCS_RZN1_MIIC) += pcs-rzn1-miic.o
9 obj-$(CONFIG_PCS_ALTERA_TSE) += pcs-altera-tse.o
/Linux-v6.1/arch/arm/boot/dts/
Dr9a06g032.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/r9a06g032-sysctrl.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
18 #address-cells = <1>;
19 #size-cells = <0>;
23 compatible = "arm,cortex-a7";
30 compatible = "arm,cortex-a7";
33 enable-method = "renesas,r9a06g032-smp";
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Dr9a06g032-rzn1d400-db.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device Tree Source for the RZN1D-DB Board
9 /dts-v1/;
11 #include <dt-bindings/pinctrl/rzn1-pinctrl.h>
12 #include <dt-bindings/net/pcs-rzn1-miic.h>
17 model = "RZN1D-DB Board";
18 compatible = "renesas,rzn1d400-db", "renesas,r9a06g032";
21 stdout-path = "serial0:115200n8";
30 pinctrl-0 = <&pins_can0>;
31 pinctrl-names = "default";
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/Linux-v6.1/Documentation/devicetree/bindings/net/dsa/
Drenesas,rzn1-a5psw.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/dsa/renesas,rzn1-a5psw.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Clément Léger <clement.leger@bootlin.com>
17 - $ref: dsa.yaml#
22 - enum:
23 - renesas,r9a06g032-a5psw
24 - const: renesas,rzn1-a5psw
31 - description: Device Level Ring (DLR) interrupt
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/Linux-v6.1/drivers/net/dsa/
Drzn1_a5psw.h1 /* SPDX-License-Identifier: GPL-2.0-only */
15 #include <linux/pcs-rzn1-miic.h>
196 #define A5PSW_CPU_PORT (A5PSW_PORTS_NUM - 1)
206 #define A5PSW_MAX_MTU (A5PSW_JUMBO_LEN - A5PSW_EXTRA_MTU_LEN)
232 * struct a5psw - switch struct
239 * @pcs: Array of PCS connected to the switch ports (not for the CPU)
243 * @reg_lock: Lock for register read-modify-write operation
253 struct phylink_pcs *pcs[A5PSW_PORTS_NUM - 1]; member
/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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