Searched full:operations (Results  1 – 25 of 3711) sorted by relevance
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| /Linux-v5.4/tools/perf/pmu-events/arch/arm64/hisilicon/hip08/ | 
| D | uncore-hha.json | 5 	    "BriefDescription": "The number of all operations received by the HHA",6 	    "PublicDescription": "The number of all operations received by the HHA",
 12 	    "BriefDescription": "The number of all operations received by the HHA from another socket",
 13 	    "PublicDescription": "The number of all operations received by the HHA from another socket",
 19 …"BriefDescription": "The number of all operations received by the HHA from another SCCL in this so…
 20 …"PublicDescription": "The number of all operations received by the HHA from another SCCL in this s…
 26 	    "BriefDescription": "The number of read operations sent by HHA to DDRC which size is 64 bytes",
 27 	    "PublicDescription": "The number of read operations sent by HHA to DDRC which size is 64bytes",
 33 …   "BriefDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
 34 …  "PublicDescription": "The number of write operations sent by HHA to DDRC which size is 64 bytes",
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| /Linux-v5.4/Documentation/ | 
| D | atomic_bitops.txt | 5 While our bitmap_{}() functions are non-atomic, we have a number of operations12 The single bit operations are:
 18 RMW atomic operations without return value:
 23 RMW atomic operations with return value:
 33 All RMW atomic operations have a '__' prefixed variant which is non-atomic.
 47 The test_and_{}_bit() operations return the original value of the bit.
 55  - non-RMW operations are unordered;
 57  - RMW operations that have no return value are unordered;
 59  - RMW operations that have a return value are fully ordered.
 61  - RMW operations that are conditional are unordered on FAILURE,
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| D | this_cpu_ops.txt | 2 this_cpu operations8 this_cpu operations are a way of optimizing access to per cpu
 14 this_cpu operations add a per cpu variable offset to the processor
 24 Read-modify-write operations are of particular interest. Frequently
 39 (remote write operations) of local RMW operations via this_cpu_*.
 41 The main use of the this_cpu operations has been to optimize counter
 42 operations.
 44 The following this_cpu() operations with implied preemption protection
 45 are defined. These operations can be used without worrying about
 65 Inner working of this_cpu operations
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| D | atomic_t.txt | 5 RMW operations between CPUs (atomic operations on MMIO are not supported and20 RMW atomic operations:
 85 the Non-RMW operations of atomic_t, you do not in fact need atomic_t at all
 138  - plain operations without return value: atomic_{}()
 140  - operations which return the modified value: atomic_{}_return()
 142    these are limited to the arithmetic operations because those are
 146  - operations which return the original value: atomic_fetch_{}()
 148  - swap operations: xchg(), cmpxchg() and try_cmpxchg()
 150  - misc; the special purpose operations that are commonly used and would,
 155 All these operations are SMP atomic; that is, the operations (for a single
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| /Linux-v5.4/tools/perf/pmu-events/arch/x86/nehalemex/ | 
| D | floating-point.json | 91         "BriefDescription": "Computational floating-point operations executed"123         "BriefDescription": "128 bit SIMD integer pack operations"
 131         "BriefDescription": "128 bit SIMD integer arithmetic operations"
 139         "BriefDescription": "128 bit SIMD integer logical operations"
 147         "BriefDescription": "128 bit SIMD integer multiply operations"
 155         "BriefDescription": "128 bit SIMD integer shift operations"
 163         "BriefDescription": "128 bit SIMD integer shuffle/move operations"
 171         "BriefDescription": "128 bit SIMD integer unpack operations"
 179         "BriefDescription": "SIMD integer 64 bit pack operations"
 187         "BriefDescription": "SIMD integer 64 bit arithmetic operations"
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| /Linux-v5.4/tools/perf/pmu-events/arch/x86/westmereep-dp/ | 
| D | floating-point.json | 91         "BriefDescription": "Computational floating-point operations executed"123         "BriefDescription": "128 bit SIMD integer pack operations"
 131         "BriefDescription": "128 bit SIMD integer arithmetic operations"
 139         "BriefDescription": "128 bit SIMD integer logical operations"
 147         "BriefDescription": "128 bit SIMD integer multiply operations"
 155         "BriefDescription": "128 bit SIMD integer shift operations"
 163         "BriefDescription": "128 bit SIMD integer shuffle/move operations"
 171         "BriefDescription": "128 bit SIMD integer unpack operations"
 179         "BriefDescription": "SIMD integer 64 bit pack operations"
 187         "BriefDescription": "SIMD integer 64 bit arithmetic operations"
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| /Linux-v5.4/tools/perf/pmu-events/arch/x86/westmereep-sp/ | 
| D | floating-point.json | 91         "BriefDescription": "Computational floating-point operations executed"123         "BriefDescription": "128 bit SIMD integer pack operations"
 131         "BriefDescription": "128 bit SIMD integer arithmetic operations"
 139         "BriefDescription": "128 bit SIMD integer logical operations"
 147         "BriefDescription": "128 bit SIMD integer multiply operations"
 155         "BriefDescription": "128 bit SIMD integer shift operations"
 163         "BriefDescription": "128 bit SIMD integer shuffle/move operations"
 171         "BriefDescription": "128 bit SIMD integer unpack operations"
 179         "BriefDescription": "SIMD integer 64 bit pack operations"
 187         "BriefDescription": "SIMD integer 64 bit arithmetic operations"
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| /Linux-v5.4/tools/perf/pmu-events/arch/x86/westmereex/ | 
| D | floating-point.json | 91         "BriefDescription": "Computational floating-point operations executed"123         "BriefDescription": "128 bit SIMD integer pack operations"
 131         "BriefDescription": "128 bit SIMD integer arithmetic operations"
 139         "BriefDescription": "128 bit SIMD integer logical operations"
 147         "BriefDescription": "128 bit SIMD integer multiply operations"
 155         "BriefDescription": "128 bit SIMD integer shift operations"
 163         "BriefDescription": "128 bit SIMD integer shuffle/move operations"
 171         "BriefDescription": "128 bit SIMD integer unpack operations"
 179         "BriefDescription": "SIMD integer 64 bit pack operations"
 187         "BriefDescription": "SIMD integer 64 bit arithmetic operations"
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| /Linux-v5.4/tools/perf/pmu-events/arch/x86/nehalemep/ | 
| D | floating-point.json | 91         "BriefDescription": "Computational floating-point operations executed"123         "BriefDescription": "128 bit SIMD integer pack operations"
 131         "BriefDescription": "128 bit SIMD integer arithmetic operations"
 139         "BriefDescription": "128 bit SIMD integer logical operations"
 147         "BriefDescription": "128 bit SIMD integer multiply operations"
 155         "BriefDescription": "128 bit SIMD integer shift operations"
 163         "BriefDescription": "128 bit SIMD integer shuffle/move operations"
 171         "BriefDescription": "128 bit SIMD integer unpack operations"
 179         "BriefDescription": "SIMD integer 64 bit pack operations"
 187         "BriefDescription": "SIMD integer 64 bit arithmetic operations"
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| /Linux-v5.4/Documentation/crypto/ | 
| D | async-tx-api.txt | 9 3.2 Supported operations31 the API will fit the chain of operations to the available offload
 47    operations to be submitted, like xor->copy->xor in the raid5 case.  The
 59 3.2 Supported operations:
 79 operations complete.  When an application needs to submit a chain of
 80 operations it must guarantee that the descriptor is not automatically recycled
 85 1/ setting the ASYNC_TX_ACK flag if no child operations are to be submitted
 91 Operations do not immediately issue after return from the
 92 async_<operation> call.  Offload engine drivers batch operations to
 95 automatically issues pending operations.  An application can force this
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| /Linux-v5.4/Documentation/core-api/ | 
| D | local_ops.rst | 5 Semantics and Behavior of Local Atomic Operations11 This document explains the purpose of the local atomic operations, how
 18     Note that ``local_t`` based operations are not recommended for general
 19     kernel use. Please use the ``this_cpu`` operations instead unless there is
 21     replaced by ``this_cpu`` operations. ``this_cpu`` operations combine the
 26 Purpose of local atomic operations
 29 Local atomic operations are meant to provide fast and highly reentrant per CPU
 30 counters. They minimize the performance cost of standard atomic operations by
 39 Local atomic operations only guarantee variable modification atomicity wrt the
 50 It can be done by slightly modifying the standard atomic operations: only
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| D | atomic_ops.rst | 2 Semantics and Behavior of Atomic and Bitmask Operations11 Atomic Type And Operations
 31 The first operations to implement for atomic_t's are the initializers and
 41 The initializer is atomic in that the return values of the atomic operations
 62 The setting is atomic in that the return values of the atomic operations by
 74 values initialized or modified with the interface operations if a proper
 77 interface operations.  atomic_read does not guarantee that the runtime
 180 locks, or atomic operations if variable a can change at runtime!
 214 the operation.  It must be done such that all memory operations before
 273 with the given old and new values. Like all atomic_xxx operations,
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| /Linux-v5.4/Documentation/virt/ | 
| D | paravirt_ops.rst | 11 hypervisors. It allows each hypervisor to override critical operations and15 pv_ops provides a set of function pointers which represent operations
 18 time by enabling binary patching of the low-ops critical operations
 21 pv_ops operations are classified into three categories:
 24    These operations correspond to high level functionality where it is
 28    Usually these operations correspond to low level critical instructions. They
 
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| /Linux-v5.4/Documentation/filesystems/caching/ | 
| D | operations.txt | 2 		       ASYNCHRONOUS OPERATIONS HANDLING24 FS-Cache has an asynchronous operations handling facility that it uses for its
 25 data storage and retrieval routines.  Its operations are represented by
 30 and FS-Cache will create operations and pass them off to the appropriate cache
 76 operations:
 82      This is, for example, used in read operations for calling readpages() on
 122 Furthermore, operations may be one of two types:
 124  (1) Exclusive (FSCACHE_OP_EXCLUSIVE).  Operations of this type may not run in
 130  (2) Shareable.  Operations of this type may be running simultaneously.  It's
 132      operations running at the same time.
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| /Linux-v5.4/Documentation/arm/ | 
| D | firmware.rst | 2 Interface for registering and calling firmware-specific operations for ARM10 operations and call them when needed.
 12 Firmware operations can be specified by filling in a struct firmware_ops
 21 There is a default, empty set of operations provided, so there is no need to
 22 set anything if platform does not require firmware operations.
 33 Example of registering firmware operations::
 52 		/* other operations not available on platformX */
 
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| /Linux-v5.4/Documentation/networking/ | 
| D | nfc.txt | 20 responsible for providing an interface to control operations and low-level23 The control operations are available to userspace via generic netlink.
 34                  | data exchange         | operations
 69 The userspace interface is divided in control operations and low-level data
 72 CONTROL OPERATIONS:
 74 Generic netlink is used to implement the interface to the control operations.
 75 The operations are composed by commands and events, all listed below:
 98 All polling operations requested through one netlink socket are stopped when
 
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| /Linux-v5.4/include/linux/ | 
| D | coresight.h | 108  * @ops:	generic operations for this component, as defined112  * @groups:	operations specific to this component. These will end up
 146  * @ops:	generic operations for this component, as defined
 201  * struct coresight_ops_sink - basic operations for a sink
 202  * Operations available for sinks
 222  * struct coresight_ops_link - basic operations for a link
 223  * Operations available for links.
 233  * struct coresight_ops_source - basic operations for a source
 234  * Operations available for sources.
 252  * struct coresight_ops_helper - Operations for a helper device.
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| D | scmi_protocol.h | 56  * struct scmi_clk_ops - represents the various operations provided80  * struct scmi_perf_ops - represents the various operations provided
 120  * struct scmi_power_ops - represents the various operations provided
 167  * struct scmi_sensor_ops - represents the various operations provided
 191  * struct scmi_reset_ops - represents the various operations provided
 215  * @power_ops: pointer to set of power protocol operations
 216  * @perf_ops: pointer to set of performance protocol operations
 217  * @clk_ops: pointer to set of clock protocol operations
 218  * @sensor_ops: pointer to set of sensor protocol operations
 219  * @reset_ops: pointer to set of reset protocol operations
 
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| D | percpu-defs.h | 12  * variables, and definitions of percpu accessors and operations.  It203  * Accessors and operations.
 210  * accessors and operations.  This is performed in the generic part of
 388  * this_cpu operations (C) 2008-2013 Christoph Lameter <cl@linux.com>
 393  * These operation guarantee exclusivity of access for other operations
 399  * cpu atomic operations for 2 byte sized RMW actions. If arch code does
 400  * not provide operations for a scalar size then the fallback in the
 407  * support for these operations, so only certain sizes may work.
 411  * Operations for contexts where we do not want to do any checks for
 416  * interupts then one of these RMW operations can show unexpected behavior
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| /Linux-v5.4/tools/perf/pmu-events/arch/x86/icelake/ | 
| D | floating-point.json | 38 … will count twice as noted below.  Each count represents 2 computation operations, one for each el…45 … will count twice as noted below.  Each count represents 2 computation operations, one for each el…
 49 … will count twice as noted below.  Each count represents 4 computation operations, one for each el…
 56 … will count twice as noted below.  Each count represents 4 computation operations, one for each el…
 60 … will count twice as noted below.  Each count represents 4 computation operations, one for each el…
 67 … will count twice as noted below.  Each count represents 4 computation operations, one for each el…
 71 … will count twice as noted below.  Each count represents 8 computation operations, one for each el…
 78 … will count twice as noted below.  Each count represents 8 computation operations, one for each el…
 82 … will count twice as noted below.  Each count represents 8 computation operations, one for each el…
 89 …will count twice as noted below.  Each count represents 16 computation operations, one for each el…
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| /Linux-v5.4/Documentation/driver-api/soundwire/ | 
| D | stream.rst | 128 framework(ASoC DPCM) guarantees that stream operations on a card are145 SoundWire Bus manages stream operations for each stream getting
 146 rendered/captured on the SoundWire Bus. This section explains Bus operations
 176 Stream State Operations
 179 Below section explains the operations done by the Bus on Master(s) and
 186 of the stream. Operations performed before entering in this state:
 189       runtime is used as a reference for all the operations performed
 197 After all above operations are successful, stream state is set to
 212 Configuration state of stream. Operations performed before entering in
 223 After all above operations are successful, stream state is set to
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| /Linux-v5.4/Documentation/devicetree/bindings/dma/ | 
| D | ste-dma40.txt | 60 bidirectional, i.e. the same for RX and TX operations:113 51: memcpy TX (to be used by the DMA driver for memcpy operations)
 118 56: memcpy (to be used by the DMA driver for memcpy operations)
 119 57: memcpy (to be used by the DMA driver for memcpy operations)
 120 58: memcpy (to be used by the DMA driver for memcpy operations)
 121 59: memcpy (to be used by the DMA driver for memcpy operations)
 122 60: memcpy (to be used by the DMA driver for memcpy operations)
 
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| /Linux-v5.4/tools/perf/pmu-events/arch/x86/amdfam17h/ | 
| D | memory.json | 5 …"BriefDescription": "Bus lock when a locked operations crosses a cache boundary or is done on an u…6 …"PublicDescription": "Bus lock when a locked operations crosses a cache boundary or is done on an …
 13 …"PublicDescription": "Counts the number of operations dispatched to the LS unit. Unit Masks ADDed.…
 19 …"BriefDescription": "Counts the number of operations dispatched to the LS unit. Unit Masks ADDed.",
 20 …"PublicDescription": "Counts the number of operations dispatched to the LS unit. Unit Masks ADDed.…
 26 …"BriefDescription": "Counts the number of operations dispatched to the LS unit. Unit Masks ADDed.",
 27 …"PublicDescription": "Counts the number of operations dispatched to the LS unit. Unit Masks ADDed.…
 
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| /Linux-v5.4/Documentation/filesystems/ | 
| D | spufs.txt | 35        the operations supported on regular file systems. This list details the36        supported  operations  and  the  deviations  from  the behaviour in the
 41        All files support the access(2) and stat(2) family of  operations,  but
 47        possible operations, e.g. read access on the wbox file.
 55        data in the address space of the SPU.  The possible  operations  on  an
 74        operations on an open mbox file are:
 88        operations on an open ibox file are:
 111        operations  on  an open wbox file are: write(2) If a count smaller than
 135        operations on an open *box_stat file are:
 173        The   possible   operations   on   an   open  npc,  decr,  decr_status,
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| /Linux-v5.4/arch/arm/mm/ | 
| D | cache-feroceon-l2.c | 27  * Low-level cache maintenance operations.31  * 'clean/invalidate L2 range by MVA' operations.
 33  * Cache range operations are initiated by writing the start and
 38  * The cache range operations stall the CPU pipeline until completion.
 40  * The range operations require two successive cp15 writes, in
 79 	 * L2 is PIPT and range operations only do a TLB lookup on  in l2_clean_pa_range()
 110 	 * L2 is PIPT and range operations only do a TLB lookup on  in l2_inv_pa_range()
 134  * noninclusive, while the hardware cache range operations use
 156 	 * since cache range operations stall the CPU pipeline  in calc_range_end()
 163 	 * Cache range operations can't straddle a page boundary.  in calc_range_end()
 
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