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/Linux-v6.1/Documentation/devicetree/bindings/net/
Dintel,dwmac-plat.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/net/intel,dwmac-plat.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vineetha G. Jaya Kumaran <vineetha.g.jaya.kumaran@intel.com>
17 - intel,keembay-dwmac
19 - compatible
22 - $ref: "snps,dwmac.yaml#"
27 - items:
28 - enum:
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Dsnps,dwmac.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Torgue <alexandre.torgue@foss.st.com>
11 - Giuseppe Cavallaro <peppe.cavallaro@st.com>
12 - Jose Abreu <joabreu@synopsys.com>
23 - snps,dwmac
24 - snps,dwmac-3.40a
25 - snps,dwmac-3.50a
26 - snps,dwmac-3.610
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/Linux-v6.1/drivers/net/ethernet/stmicro/stmmac/
Ddwmac4.h1 /* SPDX-License-Identifier: GPL-2.0-only */
55 /* RX Queues Routing */
121 /* MAC RX Queue Enable */
126 /* MAC Flow Control RX */
129 /* RX Queues Priorities */
208 /* MAC config */
229 /* MAC extended config */
317 /* MTL registers */
336 #define MTL_RXQ_DMA_QXMDMACH_MASK(x) GENMASK(11 + (8 * ((x) - 1)), 8 * (x))
390 /* MTL ETS Control register */
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Dstmmac_platform.c1 // SPDX-License-Identifier: GPL-2.0-only
5 Copyright (C) 2007-2011 STMicroelectronics Ltd
26 * dwmac1000_validate_mcast_bins - validates the number of Multicast filter bins
57 * dwmac1000_validate_ucast_entries - validate the Unicast address entries
88 * stmmac_axi_setup - parse DT parameters for programming the AXI register
91 * if required, from device-tree the AXI internal register can be tuned
99 np = of_parse_phandle(pdev->dev.of_node, "snps,axi-config", 0); in stmmac_axi_setup()
103 axi = devm_kzalloc(&pdev->dev, sizeof(*axi), GFP_KERNEL); in stmmac_axi_setup()
106 return ERR_PTR(-ENOMEM); in stmmac_axi_setup()
109 axi->axi_lpi_en = of_property_read_bool(np, "snps,lpi_en"); in stmmac_axi_setup()
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Dstmmac_main.c1 // SPDX-License-Identifier: GPL-2.0-only
3 This is the driver for the ST MAC 10/100/1000 on-chip Ethernet controllers.
6 Copyright(C) 2007-2011 STMicroelectronics Ltd
29 #include <linux/dma-mapping.h>
54 * with fine resolution and binary rollover. This avoid non-monotonic behavior
61 #define TSO_MAX_BUFF_SIZE (SZ_16K - 1)
69 static int debug = -1;
71 MODULE_PARM_DESC(debug, "Message Level (-1: default, 0: no output, 16: all)");
73 static int phyaddr = -1;
77 #define STMMAC_TX_THRESH(x) ((x)->dma_conf.dma_tx_size / 4)
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Ddwmac4_core.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * This is the driver for the GMAC on-chip Ethernet controller for ST SoCs.
26 void __iomem *ioaddr = hw->pcsr; in dwmac4_core_init()
31 if (hw->ps) { in dwmac4_core_init()
34 value &= hw->link.speed_mask; in dwmac4_core_init()
35 switch (hw->ps) { in dwmac4_core_init()
37 value |= hw->link.speed1000; in dwmac4_core_init()
40 value |= hw->link.speed100; in dwmac4_core_init()
43 value |= hw->link.speed10; in dwmac4_core_init()
53 if (hw->pcs) in dwmac4_core_init()
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/Linux-v6.1/drivers/net/ethernet/synopsys/
Ddwc-xlgmac.h5 * This program is dual-licensed; you may select either version 2 of
21 #include <linux/dma-mapping.h>
29 #define XLGMAC_DRV_NAME "dwc-xlgmac"
47 #define XLGMAC_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
97 ((_ring)->desc_data_head + \
98 ((idx) & ((_ring)->dma_desc_count - 1))); \
104 ((var) & GENMASK(_pos + _len - 1, _pos)) >> (_pos); \
111 ((_var) & GENMASK(_pos + _len - 1, _pos)) >> (_pos); \
119 _val = (_val << _pos) & GENMASK(_pos + _len - 1, _pos); \
120 _var = (_var & ~GENMASK(_pos + _len - 1, _pos)) | _val; \
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Ddwc-xlgmac-hw.c5 * This program is dual-licensed; you may select either version 2 of
26 #include "dwc-xlgmac.h"
27 #include "dwc-xlgmac-reg.h"
31 return !XLGMAC_GET_REG_BITS_LE(dma_desc->desc3, in xlgmac_tx_complete()
40 regval = readl(pdata->mac_regs + MAC_RCR); in xlgmac_disable_rx_csum()
43 writel(regval, pdata->mac_regs + MAC_RCR); in xlgmac_disable_rx_csum()
52 regval = readl(pdata->mac_regs + MAC_RCR); in xlgmac_enable_rx_csum()
55 writel(regval, pdata->mac_regs + MAC_RCR); in xlgmac_enable_rx_csum()
68 writel(mac_addr_hi, pdata->mac_regs + MAC_MACA0HR); in xlgmac_set_mac_address()
69 writel(mac_addr_lo, pdata->mac_regs + MAC_MACA0LR); in xlgmac_set_mac_address()
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/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Drk3568.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 compatible = "rockchip,rk3568-dwc-ahci", "snps,dwc-ahci";
16 clock-names = "sata", "pmalive", "rxoob";
19 phy-names = "sata-phy";
20 ports-implemented = <0x1>;
21 power-domains = <&power RK3568_PD_PIPE>;
26 compatible = "rockchip,rk3568-pipe-phy-grf", "syscon";
31 compatible = "rockchip,rk3568-qos", "syscon";
36 compatible = "rockchip,rk3568-qos", "syscon";
41 compatible = "rockchip,rk3568-qos", "syscon";
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Drk356x.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/rk3568-cru.h>
7 #include <dt-bindings/interrupt-controller/arm-gic.h>
8 #include <dt-bindings/interrupt-controller/irq.h>
9 #include <dt-bindings/phy/phy.h>
10 #include <dt-bindings/pinctrl/rockchip.h>
11 #include <dt-bindings/power/rk3568-power.h>
12 #include <dt-bindings/soc/rockchip,boot-mode.h>
13 #include <dt-bindings/thermal/thermal.h>
16 interrupt-parent = <&gic>;
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/Linux-v6.1/arch/arm/boot/dts/
Dartpec6.dtsi2 * Device Tree Source for the Axis ARTPEC-6 SoC
4 * This file is dual-licensed: you can use it either under the terms
43 #include <dt-bindings/interrupt-controller/arm-gic.h>
44 #include <dt-bindings/dma/nbpfaxi.h>
45 #include <dt-bindings/clock/axis,artpec6-clkctrl.h>
48 #address-cells = <1>;
49 #size-cells = <1>;
51 interrupt-parent = <&intc>;
54 #address-cells = <1>;
55 #size-cells = <0>;
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/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mp-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 gpio-leds {
20 compatible = "gpio-leds";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_led>;
27 default-state = "on";
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Dimx8mp-verdin.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include "dt-bindings/pwm/pwm.h"
11 stdout-path = &uart3;
23 compatible = "pwm-backlight";
24 brightness-levels = <0 45 63 88 119 158 203 255>;
25 default-brightness-level = <4>;
27 enable-gpios = <&gpio5 1 GPIO_ACTIVE_HIGH>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
30 power-supply = <&reg_3p3v>;
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/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsa8155p-adp.dts1 // SPDX-License-Identifier: BSD-3-Clause
6 /dts-v1/;
8 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
16 compatible = "qcom,sa8155p-adp", "qcom,sa8155p";
23 stdout-path = "serial0:115200n8";
27 compatible = "regulator-fixed";
28 regulator-name = "vreg_3p3";
29 regulator-min-microvolt = <3300000>;
30 regulator-max-microvolt = <3300000>;
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/Linux-v6.1/drivers/net/ethernet/amd/xgbe/
Dxgbe.h9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
120 #include <linux/dma-mapping.h>
137 #define XGBE_DRV_NAME "amd-xgbe"
151 #define XGBE_TX_MAX_BUF_SIZE (0x3fff & ~(64 - 1))
158 * - Maximum number of SKB frags
159 * - Maximum descriptors for contiguous TSO/GSO packet
160 * - Possible context descriptor
161 * - Possible TSO header descriptor
175 /* DMA cache settings - Outer sharable, write-back, write-allocate */
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Dxgbe-dev.c9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
125 #include "xgbe-common.h"
129 return pdata->netdev->mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN; in xgbe_get_max_frame()
138 DBGPR("-->xgbe_usec_to_riwt\n"); in xgbe_usec_to_riwt()
140 rate = pdata->sysclk_rate; in xgbe_usec_to_riwt()
150 DBGPR("<--xgbe_usec_to_riwt\n"); in xgbe_usec_to_riwt()
161 DBGPR("-->xgbe_riwt_to_usec\n"); in xgbe_riwt_to_usec()
163 rate = pdata->sysclk_rate; in xgbe_riwt_to_usec()
173 DBGPR("<--xgbe_riwt_to_usec\n"); in xgbe_riwt_to_usec()
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Dxgbe-drv.c9 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
59 * Copyright (c) 2014-2016 Advanced Micro Devices, Inc.
129 #include "xgbe-common.h"
176 for (i = 0; i < ARRAY_SIZE(pdata->channel); i++) { in xgbe_free_channels()
177 if (!pdata->channel[i]) in xgbe_free_channels()
180 kfree(pdata->channel[i]->rx_ring); in xgbe_free_channels()
181 kfree(pdata->channel[i]->tx_ring); in xgbe_free_channels()
182 kfree(pdata->channel[i]); in xgbe_free_channels()
184 pdata->channel[i] = NULL; in xgbe_free_channels()
187 pdata->channel_count = 0; in xgbe_free_channels()
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/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt2712e.dtsi5 * SPDX-License-Identifier: (GPL-2.0 OR MIT)
8 #include <dt-bindings/clock/mt2712-clk.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/memory/mt2712-larb-port.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/power/mt2712-power.h>
14 #include "mt2712-pinfunc.h"
18 interrupt-parent = <&sysirq>;
19 #address-cells = <2>;
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/Linux-v6.1/drivers/spi/
Dspi-pxa2xx.c1 // SPDX-License-Identifier: GPL-2.0-or-later
32 #include "spi-pxa2xx.h"
37 MODULE_ALIAS("platform:pxa2xx-spi");
79 /* LPSS offset from drv_data->ioaddr */
81 /* Register offsets from drv_data->lpss_base or -1 */
105 .reg_capabilities = -1,
115 .reg_capabilities = -1,
125 .reg_capabilities = -1,
135 .reg_general = -1,
138 .reg_capabilities = -1,
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