Lines Matching +full:mtl +full:- +full:rx +full:- +full:config

1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
13 compatible = "fsl,imx8mp-evk", "fsl,imx8mp";
16 stdout-path = &uart2;
19 gpio-leds {
20 compatible = "gpio-leds";
21 pinctrl-names = "default";
22 pinctrl-0 = <&pinctrl_gpio_led>;
27 default-state = "on";
37 pcie0_refclk: pcie0-refclk {
38 compatible = "fixed-clock";
39 #clock-cells = <0>;
40 clock-frequency = <100000000>;
43 reg_can1_stby: regulator-can1-stby {
44 compatible = "regulator-fixed";
45 regulator-name = "can1-stby";
46 pinctrl-names = "default";
47 pinctrl-0 = <&pinctrl_flexcan1_reg>;
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
51 enable-active-high;
54 reg_can2_stby: regulator-can2-stby {
55 compatible = "regulator-fixed";
56 regulator-name = "can2-stby";
57 pinctrl-names = "default";
58 pinctrl-0 = <&pinctrl_flexcan2_reg>;
59 regulator-min-microvolt = <3300000>;
60 regulator-max-microvolt = <3300000>;
62 enable-active-high;
65 reg_pcie0: regulator-pcie {
66 compatible = "regulator-fixed";
67 pinctrl-names = "default";
68 pinctrl-0 = <&pinctrl_pcie0_reg>;
69 regulator-name = "MPCIE_3V3";
70 regulator-min-microvolt = <3300000>;
71 regulator-max-microvolt = <3300000>;
73 enable-active-high;
76 reg_usdhc2_vmmc: regulator-usdhc2 {
77 compatible = "regulator-fixed";
78 pinctrl-names = "default";
79 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
80 regulator-name = "VSD_3V3";
81 regulator-min-microvolt = <3300000>;
82 regulator-max-microvolt = <3300000>;
84 enable-active-high;
89 cpu-supply = <&reg_arm>;
93 cpu-supply = <&reg_arm>;
97 cpu-supply = <&reg_arm>;
101 cpu-supply = <&reg_arm>;
105 pinctrl-names = "default";
106 pinctrl-0 = <&pinctrl_eqos>;
107 phy-mode = "rgmii-id";
108 phy-handle = <&ethphy0>;
110 snps,mtl-tx-config = <&mtl_tx_setup>;
111 snps,mtl-rx-config = <&mtl_rx_setup>;
115 compatible = "snps,dwmac-mdio";
116 #address-cells = <1>;
117 #size-cells = <0>;
119 ethphy0: ethernet-phy@1 {
120 compatible = "ethernet-phy-ieee802.3-c22";
122 eee-broken-1000t;
123 reset-gpios = <&gpio4 22 GPIO_ACTIVE_LOW>;
124 reset-assert-us = <10000>;
125 reset-deassert-us = <80000>;
126 realtek,clkout-disable;
130 mtl_tx_setup: tx-queues-config {
131 snps,tx-queues-to-use = <5>;
132 snps,tx-sched-sp;
135 snps,dcb-algorithm;
140 snps,dcb-algorithm;
145 snps,dcb-algorithm;
150 snps,dcb-algorithm;
155 snps,dcb-algorithm;
160 mtl_rx_setup: rx-queues-config {
161 snps,rx-queues-to-use = <5>;
162 snps,rx-sched-sp;
165 snps,dcb-algorithm;
167 snps,map-to-dma-channel = <0>;
171 snps,dcb-algorithm;
173 snps,map-to-dma-channel = <1>;
177 snps,dcb-algorithm;
179 snps,map-to-dma-channel = <2>;
183 snps,dcb-algorithm;
185 snps,map-to-dma-channel = <3>;
189 snps,dcb-algorithm;
191 snps,map-to-dma-channel = <4>;
197 pinctrl-names = "default";
198 pinctrl-0 = <&pinctrl_fec>;
199 phy-mode = "rgmii-id";
200 phy-handle = <&ethphy1>;
201 fsl,magic-packet;
205 #address-cells = <1>;
206 #size-cells = <0>;
208 ethphy1: ethernet-phy@1 {
209 compatible = "ethernet-phy-ieee802.3-c22";
211 eee-broken-1000t;
212 reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
213 reset-assert-us = <10000>;
214 reset-deassert-us = <80000>;
215 realtek,clkout-disable;
221 pinctrl-names = "default";
222 pinctrl-0 = <&pinctrl_flexcan1>;
223 xceiver-supply = <&reg_can1_stby>;
228 pinctrl-names = "default";
229 pinctrl-0 = <&pinctrl_flexcan2>;
230 xceiver-supply = <&reg_can2_stby>;
235 clock-frequency = <400000>;
236 pinctrl-names = "default";
237 pinctrl-0 = <&pinctrl_i2c1>;
243 pinctrl-names = "default";
244 pinctrl-0 = <&pinctrl_pmic>;
245 interrupt-parent = <&gpio1>;
250 regulator-name = "BUCK1";
251 regulator-min-microvolt = <720000>;
252 regulator-max-microvolt = <1000000>;
253 regulator-boot-on;
254 regulator-always-on;
255 regulator-ramp-delay = <3125>;
259 regulator-name = "BUCK2";
260 regulator-min-microvolt = <720000>;
261 regulator-max-microvolt = <1025000>;
262 regulator-boot-on;
263 regulator-always-on;
264 regulator-ramp-delay = <3125>;
265 nxp,dvs-run-voltage = <950000>;
266 nxp,dvs-standby-voltage = <850000>;
270 regulator-name = "BUCK4";
271 regulator-min-microvolt = <3000000>;
272 regulator-max-microvolt = <3600000>;
273 regulator-boot-on;
274 regulator-always-on;
278 regulator-name = "BUCK5";
279 regulator-min-microvolt = <1650000>;
280 regulator-max-microvolt = <1950000>;
281 regulator-boot-on;
282 regulator-always-on;
286 regulator-name = "BUCK6";
287 regulator-min-microvolt = <1045000>;
288 regulator-max-microvolt = <1155000>;
289 regulator-boot-on;
290 regulator-always-on;
294 regulator-name = "LDO1";
295 regulator-min-microvolt = <1650000>;
296 regulator-max-microvolt = <1950000>;
297 regulator-boot-on;
298 regulator-always-on;
302 regulator-name = "LDO3";
303 regulator-min-microvolt = <1710000>;
304 regulator-max-microvolt = <1890000>;
305 regulator-boot-on;
306 regulator-always-on;
310 regulator-name = "LDO5";
311 regulator-min-microvolt = <1800000>;
312 regulator-max-microvolt = <3300000>;
313 regulator-boot-on;
314 regulator-always-on;
321 clock-frequency = <400000>;
322 pinctrl-names = "default";
323 pinctrl-0 = <&pinctrl_i2c3>;
329 gpio-controller;
330 #gpio-cells = <2>;
331 interrupt-controller;
332 #interrupt-cells = <2>;
333 pinctrl-names = "default";
334 pinctrl-0 = <&pinctrl_pca6416_int>;
335 interrupt-parent = <&gpio1>;
337 gpio-line-names = "EXT_PWREN1",
358 clock-frequency = <100000>; /* Lower clock speed for external bus. */
359 pinctrl-names = "default";
360 pinctrl-0 = <&pinctrl_i2c5>;
364 * LOW: CAN1 (default, pull-down)
366 * You need to set it to high to enable I2C5 (for example, add gpio-hog
372 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
374 clock-names = "ref";
379 pinctrl-names = "default";
380 pinctrl-0 = <&pinctrl_pcie0>;
381 reset-gpio = <&gpio2 7 GPIO_ACTIVE_LOW>;
385 clock-names = "pcie", "pcie_aux", "pcie_bus";
386 assigned-clocks = <&clk IMX8MP_CLK_PCIE_AUX>;
387 assigned-clock-rates = <10000000>;
388 assigned-clock-parents = <&clk IMX8MP_SYS_PLL2_50M>;
389 vpcie-supply = <&reg_pcie0>;
399 pinctrl-names = "default";
400 pinctrl-0 = <&pinctrl_uart2>;
413 pinctrl-names = "default";
414 pinctrl-0 = <&pinctrl_usb1_vbus>;
420 assigned-clocks = <&clk IMX8MP_CLK_USDHC2>;
421 assigned-clock-rates = <400000000>;
422 pinctrl-names = "default", "state_100mhz", "state_200mhz";
423 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
424 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
425 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
426 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
427 vmmc-supply = <&reg_usdhc2_vmmc>;
428 bus-width = <4>;
433 assigned-clocks = <&clk IMX8MP_CLK_USDHC3>;
434 assigned-clock-rates = <400000000>;
435 pinctrl-names = "default", "state_100mhz", "state_200mhz";
436 pinctrl-0 = <&pinctrl_usdhc3>;
437 pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
438 pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
439 bus-width = <8>;
440 non-removable;
445 pinctrl-names = "default";
446 pinctrl-0 = <&pinctrl_wdog>;
447 fsl,ext-reset-output;
566 MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* Input pull-up. */
601 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
613 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
647 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
663 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {