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Searched +full:mt8186 +full:- +full:topckgen (Results 1 – 16 of 16) sorted by relevance

/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8186.dtsi1 // SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 * Author: Allen-KH Cheng <allen-kh.cheng@mediatek.com>
6 /dts-v1/;
7 #include <dt-bindings/clock/mt8186-clk.h>
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/pinctrl/mt8186-pinfunc.h>
11 #include <dt-bindings/power/mt8186-power.h>
12 #include <dt-bindings/phy/phy.h>
13 #include <dt-bindings/reset/mt8186-resets.h>
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/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dmt8186-afe-pcm.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/sound/mt8186-afe-pcm.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Mediatek AFE PCM controller for mt8186
10 - Jiaxin Yu <jiaxin.yu@mediatek.com>
14 const: mediatek,mt8186-sound
25 reset-names:
36 mediatek,topckgen:
38 description: The phandle of the mediatek topckgen controller
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/Linux-v6.1/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mt8186-sys-clock.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/arm/mediatek/mediatek,mt8186-sys-clock.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: MediaTek System Clock Controller for MT8186
10 - Chun-Jie Chen <chun-jie.chen@mediatek.com>
14 PLLs -->
15 dividers -->
17 -->
21 The topckgen provides dividers and muxes which provide the clock source to other IP blocks.
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/Linux-v6.1/drivers/clk/mediatek/
DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o clk-cpumux.o rese…
4 obj-$(CONFIG_COMMON_CLK_MT6765) += clk-mt6765.o
5 obj-$(CONFIG_COMMON_CLK_MT6765_AUDIOSYS) += clk-mt6765-audio.o
6 obj-$(CONFIG_COMMON_CLK_MT6765_CAMSYS) += clk-mt6765-cam.o
7 obj-$(CONFIG_COMMON_CLK_MT6765_IMGSYS) += clk-mt6765-img.o
8 obj-$(CONFIG_COMMON_CLK_MT6765_MIPI0ASYS) += clk-mt6765-mipi0a.o
9 obj-$(CONFIG_COMMON_CLK_MT6765_MMSYS) += clk-mt6765-mm.o
10 obj-$(CONFIG_COMMON_CLK_MT6765_VCODECSYS) += clk-mt6765-vcodec.o
11 obj-$(CONFIG_COMMON_CLK_MT6779) += clk-mt6779.o
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Dclk-mt8186-topckgen.c1 // SPDX-License-Identifier: GPL-2.0-only
4 // Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
6 #include <linux/clk-provider.h>
8 #include <dt-bindings/clock/mt8186-clk.h>
10 #include "clk-mtk.h"
11 #include "clk-mux.h"
503 * top_scp is main clock in always-on co-processor.
553 * top_sspm is main clock in always-on co-processor, should not be closed
567 * top_spm and top_srck are main clocks in always-on co-processor.
688 { .compatible = "mediatek,mt8186-topckgen", },
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/Linux-v6.1/Documentation/devicetree/bindings/dsp/
Dmediatek,mt8186-dsp.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/dsp/mediatek,mt8186-dsp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MediaTek mt8186 DSP core
10 - Tinghan Shen <tinghan.shen@mediatek.com>
13 MediaTek mt8186 SoC contains a DSP core used for
14 advanced pre- and post- audio processing.
18 const: mediatek,mt8186-dsp
22 - description: Address and size of the DSP config registers
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/Linux-v6.1/sound/soc/mediatek/mt8186/
Dmt8186-afe-clk.c1 // SPDX-License-Identifier: GPL-2.0
3 // mt8186-afe-clk.c -- Mediatek 8186 afe clock ctrl
12 #include "mt8186-afe-common.h"
13 #include "mt8186-afe-clk.h"
14 #include "mt8186-audsys-clk.h"
78 struct mt8186_afe_private *afe_priv = afe->platform_priv; in mt8186_set_audio_int_bus_parent()
81 ret = clk_set_parent(afe_priv->clk[CLK_MUX_AUDIOINTBUS], in mt8186_set_audio_int_bus_parent()
82 afe_priv->clk[clk_id]); in mt8186_set_audio_int_bus_parent()
84 dev_err(afe->dev, "%s clk_set_parent %s-%s fail %d\n", in mt8186_set_audio_int_bus_parent()
95 struct mt8186_afe_private *afe_priv = afe->platform_priv; in apll1_mux_setting()
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Dmt8186-afe-common.h1 /* SPDX-License-Identifier: GPL-2.0
3 * mt8186-afe-common.h -- Mediatek 8186 audio driver definitions
14 #include "mt8186-reg.h"
15 #include "../common/mtk-base-afe.h"
119 /* SA suggest apply -0.3db to audio/speech path */
144 struct regmap *topckgen; member
/Linux-v6.1/Documentation/devicetree/bindings/spi/
Dmediatek,spi-mtk-nor.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mtk-nor.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Bayi Cheng <bayi.cheng@mediatek.com>
11 - Chuanhong Guo <gch981213@gmail.com>
21 - $ref: /schemas/spi/spi-controller.yaml#
26 - enum:
27 - mediatek,mt8173-nor
28 - mediatek,mt8186-nor
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Dmediatek,spi-mt65xx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/spi/mediatek,spi-mt65xx.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Leilk Liu <leilk.liu@mediatek.com>
13 - $ref: "/schemas/spi/spi-controller.yaml#"
18 - items:
19 - enum:
20 - mediatek,mt7629-spi
21 - mediatek,mt8365-spi
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/Linux-v6.1/Documentation/devicetree/bindings/power/
Dmediatek,power-controller.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/power/mediatek,power-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - MandyJH Liu <mandyjh.liu@mediatek.com>
11 - Matthias Brugger <mbrugger@suse.com>
17 IP cores belonging to a power domain should contain a 'power-domains'
22 pattern: '^power-controller(@[0-9a-f]+)?$'
26 - mediatek,mt6795-power-controller
27 - mediatek,mt8167-power-controller
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/Linux-v6.1/Documentation/devicetree/bindings/media/
Dmediatek,vcodec-subdev-decoder.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/media/mediatek,vcodec-subdev-decoder.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Yunfei Dong <yunfei.dong@mediatek.com>
20 +------------------------------------------------+-------------------------------------+
22 | input -> lat soc HW -> lat HW -> lat buffer --|--> lat buffer -> core HW -> output |
24 +------------||-------------||-------------------+---------------------||--------------+
26 -------------||-------------||-------------------|---------------------||---------------
27 ||<------------||----------------HW index---------------->|| <child>
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/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
14 - $ref: mmc-controller.yaml#
19 - enum:
20 - mediatek,mt2701-mmc
21 - mediatek,mt2712-mmc
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/Linux-v6.1/Documentation/devicetree/bindings/interconnect/
Dmediatek,cci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jia-Wei Chang <jia-wei.chang@mediatek.com>
11 - Johnson Wang <johnson.wang@mediatek.com>
15 MT8183 and MT8186 SoCs to scale the frequency and adjust the voltage in
21 - mediatek,mt8183-cci
22 - mediatek,mt8186-cci
26 - description:
28 - description:
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/Linux-v6.1/Documentation/devicetree/bindings/usb/
Dmediatek,mtk-xhci.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/usb/mediatek,mtk-xhci.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-xhci.yaml"
19 case 2: supports dual-role mode, and the host is based on xHCI driver.
25 - enum:
26 - mediatek,mt2701-xhci
27 - mediatek,mt2712-xhci
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/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dmediatek,tphy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: MediaTek T-PHY Controller
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 The T-PHY controller supports physical layer functionality for a number of
17 Layout differences of banks between T-PHY V1 (mt8173/mt2701) and
18 T-PHY V2 (mt2712) / V3 (mt8195) when works on USB mode:
19 -----------------------------------
67 pattern: "^t-phy@[0-9a-f]+$"
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