Searched +full:mram +full:- +full:cfg (Results 1 – 16 of 16) sorted by relevance
/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 atf-sram@0 { 20 tifs-sram@1f0000 { 24 l3cache-sram@200000 { 29 gic500: interrupt-controller@1800000 { 30 compatible = "arm,gic-v3"; [all …]
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D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 10 #include <dt-bindings/mux/ti-serdes.h> 13 cmn_refclk: clock-cmnrefclk { 14 #clock-cells = <0>; 15 compatible = "fixed-clock"; 16 clock-frequency = <0>; [all …]
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D | k3-j721s2-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 9 sms: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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D | k3-am65-mcu.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 9 mcu_conf: scm-conf@40f00000 { 10 compatible = "syscon", "simple-mfd"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 compatible = "ti,am654-phy-gmii-sel"; 19 #phy-cells = <1>; 24 compatible = "ti,am654-uart"; 27 clock-frequency = <96000000>; [all …]
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D | k3-j721e-mcu-wakeup.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 9 dmsc: system-controller@44083000 { 10 compatible = "ti,k2g-sci"; 11 ti,host-id = <12>; 13 mbox-names = "rx", "tx"; 18 reg-names = "debug_messages"; 21 k3_pds: power-controller { 22 compatible = "ti,sci-pm-domain"; 23 #power-domain-cells = <2>; [all …]
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D | k3-am64-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2021 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/phy/phy-cadence.h> 9 #include <dt-bindings/phy/phy-ti.h> 12 serdes_refclk: clock-cmnrefclk { 13 #clock-cells = <0>; 14 compatible = "fixed-clock"; 15 clock-frequency = <0>; 21 compatible = "mmio-sram"; 23 #address-cells = <1>; [all …]
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D | k3-am62-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2020-2022 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 17 gic500: interrupt-controller@1800000 { 18 compatible = "arm,gic-v3"; 19 #address-cells = <2>; 20 #size-cells = <2>; 22 #interrupt-cells = <3>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/net/can/ |
D | bosch,m_can.yaml | 1 # SPDX-License-Identifier: GPL-2.0 3 --- 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 12 - Chandrasekar Ramakrishnan <rcsekar@samsung.com> 15 - $ref: can-controller.yaml# 23 - description: M_CAN registers map 24 - description: message RAM 26 reg-names: 28 - const: m_can 29 - const: message_ram [all …]
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D | tcan4x5x.txt | 7 - compatible: "ti,tcan4x5x" 8 - reg: 0 9 - #address-cells: 1 10 - #size-cells: 0 11 - spi-max-frequency: Maximum frequency of the SPI bus the chip can 13 - interrupt-parent: the phandle to the interrupt controller which provides 15 - interrupts: interrupt specification for data-ready. 21 - reset-gpios: Hardwired output GPIO. If not defined then software 23 - device-state-gpios: Input GPIO that indicates if the device is in 25 - device-wake-gpios: Wake up GPIO to wake up the TCAN device. [all …]
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/Linux-v6.1/arch/arm/boot/dts/ |
D | stm32mp133.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved 14 reg-names = "m_can", "message_ram"; 17 interrupt-names = "int0", "int1"; 19 clock-names = "hclk", "cclk"; 20 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; 27 reg-names = "m_can", "message_ram"; 30 interrupt-names = "int0", "int1"; 32 clock-names = "hclk", "cclk"; 33 bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>;
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D | stm32mp153.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved 12 compatible = "arm,cortex-a7"; 13 clock-frequency = <650000000>; 19 arm-pmu { 22 interrupt-affinity = <&cpu0>, <&cpu1>; 36 reg-names = "m_can", "message_ram"; 39 interrupt-names = "int0", "int1"; 41 clock-names = "hclk", "cclk"; 42 bosch,mram-cfg = <0x0 0 0 32 0 0 2 2>; [all …]
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D | sama7g5.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama7g5.dtsi - Device Tree Include file for SAMA7G5 family SoC 12 #include <dt-bindings/interrupt-controller/irq.h> 13 #include <dt-bindings/interrupt-controller/arm-gic.h> 14 #include <dt-bindings/clock/at91.h> 15 #include <dt-bindings/dma/at91.h> 16 #include <dt-bindings/gpio/gpio.h> 17 #include <dt-bindings/mfd/at91-usart.h> 22 #address-cells = <1>; 23 #size-cells = <1>; [all …]
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D | dra76x.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (C) 2017 Texas Instruments Incorporated - https://www.ti.com/ 12 target-module@42c01900 { 13 compatible = "ti,sysc-dra7-mcan", "ti,sysc"; 15 #address-cells = <1>; 16 #size-cells = <1>; 20 reg-names = "rev", "sysc", "syss"; 21 ti,sysc-mask = <(SYSC_OMAP4_SOFTRESET | 23 ti,syss-mask = <1>; 25 clock-names = "fck"; [all …]
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D | lan966x.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * lan966x.dtsi - Device Tree Include file for Microchip LAN966 family SoC 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/mfd/atmel-flexcom.h> 14 #include <dt-bindings/dma/at91.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/clock/microchip,lan966x.h> 21 interrupt-parent = <&gic>; 22 #address-cells = <1>; [all …]
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D | sama5d2.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 3 * sama5d2.dtsi - Device Tree Include file for SAMA5D2 family SoC 9 #include <dt-bindings/dma/at91.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/clock/at91.h> 12 #include <dt-bindings/mfd/at91-usart.h> 13 #include <dt-bindings/iio/adc/at91-sama5d2_adc.h> 16 #address-cells = <1>; 17 #size-cells = <1>; 20 interrupt-parent = <&aic>; [all …]
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/Linux-v6.1/drivers/net/can/m_can/ |
D | m_can.c | 1 // SPDX-License-Identifier: GPL-2.0 5 // Copyright (C) 2018-19 Texas Instruments Incorporated - http://www.ti.com/ 8 * https://github.com/linux-can/can-doc/tree/master/m_can 321 return cdev->ops->read_reg(cdev, reg); in m_can_read() 327 cdev->ops->write_reg(cdev, reg, val); in m_can_write() 334 u32 addr_offset = cdev->mcfg[MRAM_RXF0].off + fgi * RXF0_ELEMENT_SIZE + in m_can_fifo_read() 340 return cdev->ops->read_fifo(cdev, addr_offset, val, val_count); in m_can_fifo_read() 347 u32 addr_offset = cdev->mcfg[MRAM_TXB].off + fpi * TXB_ELEMENT_SIZE + in m_can_fifo_write() 353 return cdev->ops->write_fifo(cdev, addr_offset, val, val_count); in m_can_fifo_write() 359 return cdev->ops->write_fifo(cdev, fpi, &val, 1); in m_can_fifo_write_no_off() [all …]
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