Lines Matching +full:mram +full:- +full:cfg
1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/
10 compatible = "mmio-sram";
12 #address-cells = <1>;
13 #size-cells = <1>;
16 atf-sram@0 {
20 tifs-sram@1f0000 {
24 l3cache-sram@200000 {
29 gic500: interrupt-controller@1800000 {
30 compatible = "arm,gic-v3";
31 #address-cells = <2>;
32 #size-cells = <2>;
34 #interrupt-cells = <3>;
35 interrupt-controller;
45 gic_its: msi-controller@1820000 {
46 compatible = "arm,gic-v3-its";
48 socionext,synquacer-pre-its = <0x1000000 0x400000>;
49 msi-controller;
50 #msi-cells = <1>;
54 main_gpio_intr: interrupt-controller@a00000 {
55 compatible = "ti,sci-intr";
57 ti,intr-trigger-type = <1>;
58 interrupt-controller;
59 interrupt-parent = <&gic500>;
60 #interrupt-cells = <1>;
62 ti,sci-dev-id = <148>;
63 ti,interrupt-ranges = <8 360 56>;
67 compatible = "pinctrl-single";
70 #pinctrl-cells = <1>;
71 pinctrl-single,register-width = <32>;
72 pinctrl-single,function-mask = <0xffffffff>;
76 compatible = "ti,j721e-uart", "ti,am654-uart";
79 current-speed = <115200>;
81 clock-names = "fclk";
82 power-domains = <&k3_pds 146 TI_SCI_PD_EXCLUSIVE>;
86 compatible = "ti,j721e-uart", "ti,am654-uart";
89 current-speed = <115200>;
91 clock-names = "fclk";
92 power-domains = <&k3_pds 350 TI_SCI_PD_EXCLUSIVE>;
96 compatible = "ti,j721e-uart", "ti,am654-uart";
99 current-speed = <115200>;
101 clock-names = "fclk";
102 power-domains = <&k3_pds 351 TI_SCI_PD_EXCLUSIVE>;
106 compatible = "ti,j721e-uart", "ti,am654-uart";
109 current-speed = <115200>;
111 clock-names = "fclk";
112 power-domains = <&k3_pds 352 TI_SCI_PD_EXCLUSIVE>;
116 compatible = "ti,j721e-uart", "ti,am654-uart";
119 current-speed = <115200>;
121 clock-names = "fclk";
122 power-domains = <&k3_pds 353 TI_SCI_PD_EXCLUSIVE>;
126 compatible = "ti,j721e-uart", "ti,am654-uart";
129 current-speed = <115200>;
131 clock-names = "fclk";
132 power-domains = <&k3_pds 354 TI_SCI_PD_EXCLUSIVE>;
136 compatible = "ti,j721e-uart", "ti,am654-uart";
139 current-speed = <115200>;
141 clock-names = "fclk";
142 power-domains = <&k3_pds 355 TI_SCI_PD_EXCLUSIVE>;
146 compatible = "ti,j721e-uart", "ti,am654-uart";
149 current-speed = <115200>;
151 clock-names = "fclk";
152 power-domains = <&k3_pds 356 TI_SCI_PD_EXCLUSIVE>;
156 compatible = "ti,j721e-uart", "ti,am654-uart";
159 current-speed = <115200>;
161 clock-names = "fclk";
162 power-domains = <&k3_pds 357 TI_SCI_PD_EXCLUSIVE>;
166 compatible = "ti,j721e-uart", "ti,am654-uart";
169 current-speed = <115200>;
171 clock-names = "fclk";
172 power-domains = <&k3_pds 358 TI_SCI_PD_EXCLUSIVE>;
176 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
178 gpio-controller;
179 #gpio-cells = <2>;
180 interrupt-parent = <&main_gpio_intr>;
182 interrupt-controller;
183 #interrupt-cells = <2>;
185 ti,davinci-gpio-unbanked = <0>;
186 power-domains = <&k3_pds 111 TI_SCI_PD_EXCLUSIVE>;
188 clock-names = "gpio";
192 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
194 gpio-controller;
195 #gpio-cells = <2>;
196 interrupt-parent = <&main_gpio_intr>;
198 interrupt-controller;
199 #interrupt-cells = <2>;
201 ti,davinci-gpio-unbanked = <0>;
202 power-domains = <&k3_pds 112 TI_SCI_PD_EXCLUSIVE>;
204 clock-names = "gpio";
208 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
210 gpio-controller;
211 #gpio-cells = <2>;
212 interrupt-parent = <&main_gpio_intr>;
214 interrupt-controller;
215 #interrupt-cells = <2>;
217 ti,davinci-gpio-unbanked = <0>;
218 power-domains = <&k3_pds 113 TI_SCI_PD_EXCLUSIVE>;
220 clock-names = "gpio";
224 compatible = "ti,j721e-gpio", "ti,keystone-gpio";
226 gpio-controller;
227 #gpio-cells = <2>;
228 interrupt-parent = <&main_gpio_intr>;
230 interrupt-controller;
231 #interrupt-cells = <2>;
233 ti,davinci-gpio-unbanked = <0>;
234 power-domains = <&k3_pds 114 TI_SCI_PD_EXCLUSIVE>;
236 clock-names = "gpio";
240 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
243 #address-cells = <1>;
244 #size-cells = <0>;
246 clock-names = "fck";
247 power-domains = <&k3_pds 214 TI_SCI_PD_EXCLUSIVE>;
251 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
254 #address-cells = <1>;
255 #size-cells = <0>;
257 clock-names = "fck";
258 power-domains = <&k3_pds 215 TI_SCI_PD_EXCLUSIVE>;
262 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
265 #address-cells = <1>;
266 #size-cells = <0>;
268 clock-names = "fck";
269 power-domains = <&k3_pds 216 TI_SCI_PD_EXCLUSIVE>;
273 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
276 #address-cells = <1>;
277 #size-cells = <0>;
279 clock-names = "fck";
280 power-domains = <&k3_pds 217 TI_SCI_PD_EXCLUSIVE>;
284 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
287 #address-cells = <1>;
288 #size-cells = <0>;
290 clock-names = "fck";
291 power-domains = <&k3_pds 218 TI_SCI_PD_EXCLUSIVE>;
295 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
298 #address-cells = <1>;
299 #size-cells = <0>;
301 clock-names = "fck";
302 power-domains = <&k3_pds 219 TI_SCI_PD_EXCLUSIVE>;
306 compatible = "ti,j721e-i2c", "ti,omap4-i2c";
309 #address-cells = <1>;
310 #size-cells = <0>;
312 clock-names = "fck";
313 power-domains = <&k3_pds 220 TI_SCI_PD_EXCLUSIVE>;
317 compatible = "ti,j721e-sdhci-8bit";
321 power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;
323 clock-names = "clk_ahb", "clk_xin";
324 assigned-clocks = <&k3_clks 98 1>;
325 assigned-clock-parents = <&k3_clks 98 2>;
326 bus-width = <8>;
327 ti,otap-del-sel-legacy = <0x0>;
328 ti,otap-del-sel-mmc-hs = <0x0>;
329 ti,otap-del-sel-ddr52 = <0x6>;
330 ti,otap-del-sel-hs200 = <0x8>;
331 ti,otap-del-sel-hs400 = <0x5>;
332 ti,itap-del-sel-legacy = <0x10>;
333 ti,itap-del-sel-mmc-hs = <0xa>;
334 ti,strobe-sel = <0x77>;
335 ti,clkbuf-sel = <0x7>;
336 ti,trm-icp = <0x8>;
337 mmc-ddr-1_8v;
338 mmc-hs200-1_8v;
339 mmc-hs400-1_8v;
340 dma-coherent;
344 compatible = "ti,j721e-sdhci-4bit";
348 power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;
350 clock-names = "clk_ahb", "clk_xin";
351 assigned-clocks = <&k3_clks 99 1>;
352 assigned-clock-parents = <&k3_clks 99 2>;
353 bus-width = <4>;
354 ti,otap-del-sel-legacy = <0x0>;
355 ti,otap-del-sel-sd-hs = <0x0>;
356 ti,otap-del-sel-sdr12 = <0xf>;
357 ti,otap-del-sel-sdr25 = <0xf>;
358 ti,otap-del-sel-sdr50 = <0xc>;
359 ti,otap-del-sel-sdr104 = <0x5>;
360 ti,otap-del-sel-ddr50 = <0xc>;
361 ti,itap-del-sel-legacy = <0x0>;
362 ti,itap-del-sel-sd-hs = <0x0>;
363 ti,itap-del-sel-sdr12 = <0x0>;
364 ti,itap-del-sel-sdr25 = <0x0>;
365 ti,clkbuf-sel = <0x7>;
366 ti,trm-icp = <0x8>;
367 dma-coherent;
369 sdhci-caps-mask = <0x00000003 0x00000000>;
373 compatible = "simple-mfd";
374 #address-cells = <2>;
375 #size-cells = <2>;
377 ti,sci-dev-id = <224>;
378 dma-coherent;
379 dma-ranges;
381 main_navss_intr: interrupt-controller@310e0000 {
382 compatible = "ti,sci-intr";
384 ti,intr-trigger-type = <4>;
385 interrupt-controller;
386 interrupt-parent = <&gic500>;
387 #interrupt-cells = <1>;
389 ti,sci-dev-id = <227>;
390 ti,interrupt-ranges = <0 64 64>,
395 main_udmass_inta: msi-controller@33d00000 {
396 compatible = "ti,sci-inta";
398 interrupt-controller;
399 #interrupt-cells = <0>;
400 interrupt-parent = <&main_navss_intr>;
401 msi-controller;
403 ti,sci-dev-id = <265>;
404 ti,interrupt-ranges = <0 0 256>;
408 compatible = "ti,am654-secure-proxy";
409 #mbox-cells = <1>;
410 reg-names = "target_data", "rt", "scfg";
414 interrupt-names = "rx_011";
419 compatible = "ti,am654-hwspinlock";
421 #hwlock-cells = <1>;
425 compatible = "ti,am654-mailbox";
427 #mbox-cells = <1>;
428 ti,mbox-num-users = <4>;
429 ti,mbox-num-fifos = <16>;
430 interrupt-parent = <&main_navss_intr>;
434 compatible = "ti,am654-mailbox";
436 #mbox-cells = <1>;
437 ti,mbox-num-users = <4>;
438 ti,mbox-num-fifos = <16>;
439 interrupt-parent = <&main_navss_intr>;
443 compatible = "ti,am654-mailbox";
445 #mbox-cells = <1>;
446 ti,mbox-num-users = <4>;
447 ti,mbox-num-fifos = <16>;
448 interrupt-parent = <&main_navss_intr>;
452 compatible = "ti,am654-mailbox";
454 #mbox-cells = <1>;
455 ti,mbox-num-users = <4>;
456 ti,mbox-num-fifos = <16>;
457 interrupt-parent = <&main_navss_intr>;
461 compatible = "ti,am654-mailbox";
463 #mbox-cells = <1>;
464 ti,mbox-num-users = <4>;
465 ti,mbox-num-fifos = <16>;
466 interrupt-parent = <&main_navss_intr>;
470 compatible = "ti,am654-mailbox";
472 #mbox-cells = <1>;
473 ti,mbox-num-users = <4>;
474 ti,mbox-num-fifos = <16>;
475 interrupt-parent = <&main_navss_intr>;
479 compatible = "ti,am654-mailbox";
481 #mbox-cells = <1>;
482 ti,mbox-num-users = <4>;
483 ti,mbox-num-fifos = <16>;
484 interrupt-parent = <&main_navss_intr>;
488 compatible = "ti,am654-mailbox";
490 #mbox-cells = <1>;
491 ti,mbox-num-users = <4>;
492 ti,mbox-num-fifos = <16>;
493 interrupt-parent = <&main_navss_intr>;
497 compatible = "ti,am654-mailbox";
499 #mbox-cells = <1>;
500 ti,mbox-num-users = <4>;
501 ti,mbox-num-fifos = <16>;
502 interrupt-parent = <&main_navss_intr>;
506 compatible = "ti,am654-mailbox";
508 #mbox-cells = <1>;
509 ti,mbox-num-users = <4>;
510 ti,mbox-num-fifos = <16>;
511 interrupt-parent = <&main_navss_intr>;
515 compatible = "ti,am654-mailbox";
517 #mbox-cells = <1>;
518 ti,mbox-num-users = <4>;
519 ti,mbox-num-fifos = <16>;
520 interrupt-parent = <&main_navss_intr>;
524 compatible = "ti,am654-mailbox";
526 #mbox-cells = <1>;
527 ti,mbox-num-users = <4>;
528 ti,mbox-num-fifos = <16>;
529 interrupt-parent = <&main_navss_intr>;
533 compatible = "ti,am654-mailbox";
535 #mbox-cells = <1>;
536 ti,mbox-num-users = <4>;
537 ti,mbox-num-fifos = <16>;
538 interrupt-parent = <&main_navss_intr>;
542 compatible = "ti,am654-mailbox";
544 #mbox-cells = <1>;
545 ti,mbox-num-users = <4>;
546 ti,mbox-num-fifos = <16>;
547 interrupt-parent = <&main_navss_intr>;
551 compatible = "ti,am654-mailbox";
553 #mbox-cells = <1>;
554 ti,mbox-num-users = <4>;
555 ti,mbox-num-fifos = <16>;
556 interrupt-parent = <&main_navss_intr>;
560 compatible = "ti,am654-mailbox";
562 #mbox-cells = <1>;
563 ti,mbox-num-users = <4>;
564 ti,mbox-num-fifos = <16>;
565 interrupt-parent = <&main_navss_intr>;
569 compatible = "ti,am654-mailbox";
571 #mbox-cells = <1>;
572 ti,mbox-num-users = <4>;
573 ti,mbox-num-fifos = <16>;
574 interrupt-parent = <&main_navss_intr>;
578 compatible = "ti,am654-mailbox";
580 #mbox-cells = <1>;
581 ti,mbox-num-users = <4>;
582 ti,mbox-num-fifos = <16>;
583 interrupt-parent = <&main_navss_intr>;
587 compatible = "ti,am654-mailbox";
589 #mbox-cells = <1>;
590 ti,mbox-num-users = <4>;
591 ti,mbox-num-fifos = <16>;
592 interrupt-parent = <&main_navss_intr>;
596 compatible = "ti,am654-mailbox";
598 #mbox-cells = <1>;
599 ti,mbox-num-users = <4>;
600 ti,mbox-num-fifos = <16>;
601 interrupt-parent = <&main_navss_intr>;
605 compatible = "ti,am654-mailbox";
607 #mbox-cells = <1>;
608 ti,mbox-num-users = <4>;
609 ti,mbox-num-fifos = <16>;
610 interrupt-parent = <&main_navss_intr>;
614 compatible = "ti,am654-mailbox";
616 #mbox-cells = <1>;
617 ti,mbox-num-users = <4>;
618 ti,mbox-num-fifos = <16>;
619 interrupt-parent = <&main_navss_intr>;
623 compatible = "ti,am654-mailbox";
625 #mbox-cells = <1>;
626 ti,mbox-num-users = <4>;
627 ti,mbox-num-fifos = <16>;
628 interrupt-parent = <&main_navss_intr>;
632 compatible = "ti,am654-mailbox";
634 #mbox-cells = <1>;
635 ti,mbox-num-users = <4>;
636 ti,mbox-num-fifos = <16>;
637 interrupt-parent = <&main_navss_intr>;
641 compatible = "ti,am654-navss-ringacc";
646 reg-names = "rt", "fifos", "proxy_gcfg", "proxy_target";
647 ti,num-rings = <1024>;
648 ti,sci-rm-range-gp-rings = <0x1>;
650 ti,sci-dev-id = <259>;
651 msi-parent = <&main_udmass_inta>;
654 main_udmap: dma-controller@31150000 {
655 compatible = "ti,j721e-navss-main-udmap";
659 reg-names = "gcfg", "rchanrt", "tchanrt";
660 msi-parent = <&main_udmass_inta>;
661 #dma-cells = <1>;
664 ti,sci-dev-id = <263>;
667 ti,sci-rm-range-tchan = <0x0d>, /* TX_CHAN */
670 ti,sci-rm-range-rchan = <0x0a>, /* RX_CHAN */
673 ti,sci-rm-range-rflow = <0x00>; /* GP RFLOW */
677 compatible = "ti,j721e-cpts";
679 reg-names = "cpts";
681 clock-names = "cpts";
682 interrupts-extended = <&main_navss_intr 391>;
683 interrupt-names = "cpts";
684 ti,cpts-periodic-outputs = <6>;
685 ti,cpts-ext-ts-inputs = <8>;
693 reg-names = "m_can", "message_ram";
694 power-domains = <&k3_pds 182 TI_SCI_PD_EXCLUSIVE>;
696 clock-names = "hclk", "cclk";
699 interrupt-names = "int0", "int1";
700 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
707 reg-names = "m_can", "message_ram";
708 power-domains = <&k3_pds 183 TI_SCI_PD_EXCLUSIVE>;
710 clock-names = "hclk", "cclk";
713 interrupt-names = "int0", "int1";
714 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
721 reg-names = "m_can", "message_ram";
722 power-domains = <&k3_pds 184 TI_SCI_PD_EXCLUSIVE>;
724 clock-names = "hclk", "cclk";
727 interrupt-names = "int0", "int1";
728 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
735 reg-names = "m_can", "message_ram";
736 power-domains = <&k3_pds 185 TI_SCI_PD_EXCLUSIVE>;
738 clock-names = "hclk", "cclk";
741 interrupt-names = "int0", "int1";
742 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
749 reg-names = "m_can", "message_ram";
750 power-domains = <&k3_pds 186 TI_SCI_PD_EXCLUSIVE>;
752 clock-names = "hclk", "cclk";
755 interrupt-names = "int0", "int1";
756 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
763 reg-names = "m_can", "message_ram";
764 power-domains = <&k3_pds 187 TI_SCI_PD_EXCLUSIVE>;
766 clock-names = "hclk", "cclk";
769 interrupt-names = "int0", "int1";
770 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
777 reg-names = "m_can", "message_ram";
778 power-domains = <&k3_pds 188 TI_SCI_PD_EXCLUSIVE>;
780 clock-names = "hclk", "cclk";
783 interrupt-names = "int0", "int1";
784 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
791 reg-names = "m_can", "message_ram";
792 power-domains = <&k3_pds 189 TI_SCI_PD_EXCLUSIVE>;
794 clock-names = "hclk", "cclk";
797 interrupt-names = "int0", "int1";
798 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
805 reg-names = "m_can", "message_ram";
806 power-domains = <&k3_pds 190 TI_SCI_PD_EXCLUSIVE>;
808 clock-names = "hclk", "cclk";
811 interrupt-names = "int0", "int1";
812 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
819 reg-names = "m_can", "message_ram";
820 power-domains = <&k3_pds 191 TI_SCI_PD_EXCLUSIVE>;
822 clock-names = "hclk", "cclk";
825 interrupt-names = "int0", "int1";
826 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
833 reg-names = "m_can", "message_ram";
834 power-domains = <&k3_pds 192 TI_SCI_PD_EXCLUSIVE>;
836 clock-names = "hclk", "cclk";
839 interrupt-names = "int0", "int1";
840 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
847 reg-names = "m_can", "message_ram";
848 power-domains = <&k3_pds 193 TI_SCI_PD_EXCLUSIVE>;
850 clock-names = "hclk", "cclk";
853 interrupt-names = "int0", "int1";
854 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
861 reg-names = "m_can", "message_ram";
862 power-domains = <&k3_pds 194 TI_SCI_PD_EXCLUSIVE>;
864 clock-names = "hclk", "cclk";
867 interrupt-names = "int0", "int1";
868 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
875 reg-names = "m_can", "message_ram";
876 power-domains = <&k3_pds 195 TI_SCI_PD_EXCLUSIVE>;
878 clock-names = "hclk", "cclk";
881 interrupt-names = "int0", "int1";
882 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
889 reg-names = "m_can", "message_ram";
890 power-domains = <&k3_pds 197 TI_SCI_PD_EXCLUSIVE>;
892 clock-names = "hclk", "cclk";
895 interrupt-names = "int0", "int1";
896 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
903 reg-names = "m_can", "message_ram";
904 power-domains = <&k3_pds 199 TI_SCI_PD_EXCLUSIVE>;
906 clock-names = "hclk", "cclk";
909 interrupt-names = "int0", "int1";
910 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
917 reg-names = "m_can", "message_ram";
918 power-domains = <&k3_pds 201 TI_SCI_PD_EXCLUSIVE>;
920 clock-names = "hclk", "cclk";
923 interrupt-names = "int0", "int1";
924 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;
931 reg-names = "m_can", "message_ram";
932 power-domains = <&k3_pds 206 TI_SCI_PD_EXCLUSIVE>;
934 clock-names = "hclk", "cclk";
937 interrupt-names = "int0", "int1";
938 bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;