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/Linux-v6.1/drivers/soc/fsl/qe/
Ducc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * QE UCC API Set - UCC specific routines implementations.
33 if (ucc_num > UCC_MAX_NUM - 1) in ucc_set_qe_mux_mii_mng()
34 return -EINVAL; in ucc_set_qe_mux_mii_mng()
37 qe_clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, in ucc_set_qe_mux_mii_mng()
50 * 'ucc_num' is the UCC number, from 0 - 7.
61 switch (ucc_num) { in ucc_set_type()
62 case 0: guemr = &qe_immr->ucc1.slow.guemr; in ucc_set_type()
64 case 1: guemr = &qe_immr->ucc2.slow.guemr; in ucc_set_type()
66 case 2: guemr = &qe_immr->ucc3.slow.guemr; in ucc_set_type()
[all …]
/Linux-v6.1/drivers/net/dsa/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
2 menu "Distributed Switch Architecture drivers"
8 tristate "Broadcom Starfighter 2 Ethernet switch support"
17 switch chips.
20 tristate "DSA mock-up Ethernet switch chip support"
23 This enables support for a fake mock-up switch chip which
37 tristate "MediaTek MT753x and MT7621 Ethernet switch support"
42 Ethernet switch chips.
45 tristate "Marvell 88E6060 ethernet switch chip support"
48 This enables support for the Marvell 88E6060 ethernet switch
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Dqcom-rpm.txt8 - compatible:
12 "qcom,rpm-apq8064"
13 "qcom,rpm-msm8660"
14 "qcom,rpm-msm8960"
15 "qcom,rpm-ipq8064"
16 "qcom,rpm-mdm9615"
18 - reg:
20 Value type: <prop-encoded-array>
23 - interrupts:
25 Value type: <prop-encoded-array>
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/dsa/
Dmscc,ocelot.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR MIT)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Ocelot Switch Family Device Tree Bindings
10 - Vladimir Oltean <vladimir.oltean@nxp.com>
11 - Claudiu Manoil <claudiu.manoil@nxp.com>
12 - Alexandre Belloni <alexandre.belloni@bootlin.com>
13 - UNGLinuxDriver@microchip.com
16 There are multiple switches which are either part of the Ocelot-1 family, or
20 them performs packet I/O primarily through an Ethernet port of the switch
[all …]
Dar9331.txt1 Atheros AR9331 built-in switch
4 It is a switch built-in to Atheros AR9331 WiSoC and addressable over internal
5 MDIO bus. All PHYs are built-in as well.
9 - compatible: should be: "qca,ar9331-switch"
10 - reg: Address on the MII bus for the switch.
11 - resets : Must contain an entry for each entry in reset-names.
12 - reset-names : Must include the following entries: "switch"
13 - interrupt-parent: Phandle to the parent interrupt controller
14 - interrupts: IRQ line for the switch
15 - interrupt-controller: Indicates the switch is itself an interrupt
[all …]
Dqca8k.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Atheros QCA83xx switch family
10 - John Crispin <john@phrozen.org>
13 If the QCA8K switch is connect to an SoC's external mdio-bus, each subnode
16 ID. To declare the internal mdio-bus configuration, declare an MDIO node in
17 the switch node and declare the phandle for the port, referencing the internal
18 PHY it is connected to. In this config, an internal mdio-bus is registered and
20 mdio-bus configurations are not supported by the hardware.
[all …]
Dlan9303.txt1 SMSC/MicroChip LAN9303 three port ethernet switch
2 -------------------------------------------------
6 - compatible: should be
7 - "smsc,lan9303-i2c" for I2C managed mode
9 - "smsc,lan9303-mdio" for mdio managed mode
13 - reset-gpios: GPIO to be used to reset the whole device
14 - reset-duration: reset duration in milliseconds, defaults to 200 ms
18 The integrated switch subnode should be specified according to the binding
19 described in dsa/dsa.txt. The CPU port of this switch is always port 0.
23 auto-detected and mapped accordingly.
[all …]
/Linux-v6.1/Documentation/networking/
Dbonding.rst1 .. SPDX-License-Identifier: GPL-2.0
11 Corrections, HA extensions: 2000/10/03-15:
13 - Willy Tarreau <willy at meta-x.org>
14 - Constantine Gavrilov <const-g at xpert.com>
15 - Chad N. Tindel <ctindel at ieee dot org>
16 - Janice Girouard <girouard at us dot ibm dot com>
17 - Jay Vosburgh <fubar at us dot ibm dot com>
22 - Mitch Williams <mitch.a.williams at intel.com>
29 The behavior of the bonded interfaces depends upon the mode; generally
35 the original tools from extreme-linux and beowulf sites will not work
[all …]
/Linux-v6.1/Documentation/ABI/testing/
Dsysfs-driver-bd9571mwv-regulator1 What: /sys/bus/i2c/devices/.../bd9571mwv-regulator.*.auto/backup_mode
5 Description: Read/write the current state of DDR Backup Mode, which controls
10 A. With a momentary power switch (or pulse signal), DDR
11 Backup Mode is enabled by default when available, as the
13 B. With a toggle power switch (or level signal), the
16 1. Configure PMIC for backup mode, to change the role of
17 the accessory power switch from a power switch to a
18 wake-up switch,
19 2. Switch accessory power switch off, to prepare for
23 4. Switch accessory power switch on, to resume the
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/net/
Dmicrochip,sparx5-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,sparx5-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Sparx5 Ethernet switch controller
10 - Steen Hegelund <steen.hegelund@microchip.com>
11 - Lars Povlsen <lars.povlsen@microchip.com>
14 The SparX-5 Enterprise Ethernet switch family provides a rich set of
15 Enterprise switching features such as advanced TCAM-based VLAN and
17 security through TCAM-based frame processing using versatile content
[all …]
Dkeystone-netcp.txt6 switch sub-module to send and receive packets. NetCP also includes a packet
13 includes a 3-port Ethernet switch sub-module capable of 10Gb/s and 1Gb/s rates
16 Keystone NetCP driver has a plug-in module architecture where each of the NetCP
17 sub-modules exist as a loadable kernel module which plug in to the netcp core.
18 These sub-modules are represented as "netcp-devices" in the dts bindings. It is
19 mandatory to have the ethernet switch sub-module for the ethernet interface to
20 be operational. Any other sub-module like the PA is optional.
24 -----------------------------
26 -----------------------------
28 |-> NetCP Devices -> |
[all …]
Dmicrochip,lan966x-switch.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/microchip,lan966x-switch.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip Lan966x Ethernet switch controller
10 - Horatiu Vultur <horatiu.vultur@microchip.com>
13 The lan966x switch is a multi-port Gigabit AVB/TSN Ethernet Switch with
14 two integrated 10/100/1000Base-T PHYs. In addition to the integrated PHYs,
15 it supports up to 2RGMII/RMII, up to 3BASE-X/SERDES/2.5GBASE-X and up to
16 2 Quad-SGMII/Quad-USGMII interfaces.
[all …]
Dhisilicon-hns-nic.txt4 - compatible: "hisilicon,hns-nic-v1" or "hisilicon,hns-nic-v2".
5 "hisilicon,hns-nic-v1" is for hip05.
6 "hisilicon,hns-nic-v2" is for Hi1610 and Hi1612.
7 - ae-handle: accelerator engine handle for hns,
9 see Documentation/devicetree/bindings/net/hisilicon-hns-dsaf.txt
10 - port-id: is the index of port provided by DSAF (the accelerator). DSAF can
14 The remaining 6 PHYs are taken according to the mode of DSAF.
16 In NIC mode of DSAF, all 6 PHYs are taken as ethernet ports to the CPU. The
17 port-id can be 2 to 7. Here is the diagram:
18 +-----+---------------+
[all …]
/Linux-v6.1/sound/soc/codecs/
Dda9055.c1 // SPDX-License-Identifier: GPL-2.0-or-later
59 /* Input - Gain, Select and Filter Registers */
72 /* Output - Gain, Select and Filter Registers */
245 u8 mode; /* 0 = slave, 1 = master */ member
250 /* for MASTER mode, fs = 44.1Khz and its harmonics */
260 /* for MASTER mode, fs = 48Khz and its harmonics */
270 /* for SLAVE mode with SRM */
289 0x0, 0x10, TLV_DB_SCALE_ITEM(-5400, 0, 0),
290 /* -54dB to 15dB */
291 0x11, 0x3f, TLV_DB_SCALE_ITEM(-5400, 150, 0)
[all …]
Dmax9867.c1 // SPDX-License-Identifier: GPL-2.0
5 // Copyright 2013-2015 Maxim Integrated Products
6 // Copyright 2018 Ladislav Michl <ladis@linux-mips.org>
40 "Butterworth/8-24"
53 struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); in max9867_adc_dac_event()
57 if (!strcmp(w->name, "ADCL")) in max9867_adc_dac_event()
59 else if (!strcmp(w->name, "ADCR")) in max9867_adc_dac_event()
61 else if (!strcmp(w->name, "DACL")) in max9867_adc_dac_event()
63 else if (!strcmp(w->name, "DACR")) in max9867_adc_dac_event()
69 max9867->adc_dac_active |= BIT(adc_dac); in max9867_adc_dac_event()
[all …]
/Linux-v6.1/Documentation/networking/device_drivers/ethernet/ti/
Dcpsw_switchdev.rst1 .. SPDX-License-Identifier: GPL-2.0
17 ip -d link show dev sw0p1 | grep switchid
23 Dual mac mode
26 - The new (cpsw_new.c) driver is operating in dual-emac mode by default, thus
30 - optimized promiscuous mode: The P0_UNI_FLOOD (both ports) is enabled in
32 So, Ports in promiscuous mode will keep possibility of mcast and vlan
34 to the same bridge, but without enabling "switch" mode, or to different
36 - learning disabled on ports as it make not too much sense for
37 segregated ports - no forwarding in HW.
38 - enabled basic support for devlink.
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/usb/
Dmediatek,mtu3.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Chunfeng Yun <chunfeng.yun@mediatek.com>
14 - $ref: "usb-drd.yaml"
23 - enum:
24 - mediatek,mt2712-mtu3
25 - mediatek,mt8173-mtu3
26 - mediatek,mt8183-mtu3
27 - mediatek,mt8188-mtu3
[all …]
Ddwc2.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Rob Herring <robh@kernel.org>
13 - $ref: usb-drd.yaml#
14 - $ref: usb-hcd.yaml#
19 - const: brcm,bcm2835-usb
20 - const: hisilicon,hi6220-usb
21 - const: ingenic,jz4775-otg
22 - const: ingenic,jz4780-otg
[all …]
/Linux-v6.1/drivers/regulator/
Dwm8350-regulator.c1 // SPDX-License-Identifier: GPL-2.0+
3 // wm8350.c -- Voltage and current regulation for the Wolfson WM8350 PMIC
99 switch (isink) { in wm8350_isink_enable()
101 switch (wm8350->pmic.isink_A_dcdc) { in wm8350_isink_enable()
109 1 << (wm8350->pmic.isink_A_dcdc - in wm8350_isink_enable()
113 return -EINVAL; in wm8350_isink_enable()
117 switch (wm8350->pmic.isink_B_dcdc) { in wm8350_isink_enable()
125 1 << (wm8350->pmic.isink_B_dcdc - in wm8350_isink_enable()
129 return -EINVAL; in wm8350_isink_enable()
133 return -EINVAL; in wm8350_isink_enable()
[all …]
/Linux-v6.1/drivers/platform/chrome/
Dcros_typec_switch.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * This driver provides the ability to configure Type-C muxes and retimers which are controlled by
29 /* Driver-specific data. */
48 return cros_ec_cmd(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, sizeof(req), NULL, 0); in cros_typec_cmd_mux_set()
51 static int cros_typec_get_mux_state(unsigned long mode, struct typec_altmode *alt) in cros_typec_get_mux_state() argument
53 int ret = -EOPNOTSUPP; in cros_typec_get_mux_state()
55 if (mode == TYPEC_STATE_SAFE) in cros_typec_get_mux_state()
57 else if (mode == TYPEC_STATE_USB) in cros_typec_get_mux_state()
59 else if (alt && alt->svid == USB_TYPEC_DP_SID) in cros_typec_get_mux_state()
74 return cros_ec_cmd(sdata->ec, 0, EC_CMD_TYPEC_CONTROL, &req, sizeof(req), NULL, 0); in cros_typec_send_clear_event()
[all …]
/Linux-v6.1/drivers/gpu/drm/amd/amdgpu/
Datombios_crtc.c2 * Copyright 2007-8 Advanced Micro Devices, Inc.
32 #include "atom-bits.h"
40 struct drm_display_mode *mode, in amdgpu_atombios_crtc_overscan_setup() argument
43 struct drm_device *dev = crtc->dev; in amdgpu_atombios_crtc_overscan_setup()
52 args.ucCRTC = amdgpu_crtc->crtc_id; in amdgpu_atombios_crtc_overscan_setup()
54 switch (amdgpu_crtc->rmx_type) { in amdgpu_atombios_crtc_overscan_setup()
56 args.usOverscanTop = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
57 args.usOverscanBottom = cpu_to_le16((adjusted_mode->crtc_vdisplay - mode->crtc_vdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
58 args.usOverscanLeft = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
59 args.usOverscanRight = cpu_to_le16((adjusted_mode->crtc_hdisplay - mode->crtc_hdisplay) / 2); in amdgpu_atombios_crtc_overscan_setup()
[all …]
/Linux-v6.1/drivers/mfd/
Ducb1x00-ts.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Touchscreen driver for UCB1x00-based touchscreens
8 * 21-Jan-2002 <jco@ict.es> :
10 * Added support for synchronous A/D mode. This mode is useful to
34 #include <asm/mach-types.h>
56 struct input_dev *idev = ts->idev; in ucb1x00_ts_evt_add()
67 struct input_dev *idev = ts->idev; in ucb1x00_ts_event_release()
75 * Switch to interrupt mode.
79 ucb1x00_reg_write(ts->ucb, UCB_TS_CR, in ucb1x00_ts_mode_int()
86 * Switch to pressure mode, and read pressure. We don't need to wait
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dqcom-ipq8062-smb208.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 #include "qcom-ipq8062.dtsi"
7 compatible = "qcom,rpm-smb208-regulators";
10 regulator-min-microvolt = <1050000>;
11 regulator-max-microvolt = <1150000>;
13 qcom,switch-mode-frequency = <1200000>;
17 regulator-min-microvolt = <1050000>;
18 regulator-max-microvolt = <1150000>;
20 qcom,switch-mode-frequency = <1200000>;
24 regulator-min-microvolt = < 800000>;
[all …]
Dqcom-ipq8064-v2.0-smb208.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "qcom-ipq8064-v2.0.dtsi"
7 compatible = "qcom,rpm-smb208-regulators";
10 regulator-min-microvolt = <1050000>;
11 regulator-max-microvolt = <1150000>;
13 qcom,switch-mode-frequency = <1200000>;
17 regulator-min-microvolt = <1050000>;
18 regulator-max-microvolt = <1150000>;
20 qcom,switch-mode-frequency = <1200000>;
24 regulator-min-microvolt = < 800000>;
[all …]
Dqcom-ipq8064-smb208.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "qcom-ipq8064.dtsi"
7 compatible = "qcom,rpm-smb208-regulators";
10 regulator-min-microvolt = <1050000>;
11 regulator-max-microvolt = <1150000>;
13 qcom,switch-mode-frequency = <1200000>;
17 regulator-min-microvolt = <1050000>;
18 regulator-max-microvolt = <1150000>;
20 qcom,switch-mode-frequency = <1200000>;
24 regulator-min-microvolt = < 800000>;
[all …]

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