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/Linux-v6.6/drivers/soc/mediatek/
Dmtk-mmsys.c14 #include <linux/soc/mediatek/mtk-mmsys.h>
16 #include "mtk-mmsys.h"
17 #include "mt8167-mmsys.h"
18 #include "mt8173-mmsys.h"
19 #include "mt8183-mmsys.h"
20 #include "mt8186-mmsys.h"
21 #include "mt8188-mmsys.h"
22 #include "mt8192-mmsys.h"
23 #include "mt8195-mmsys.h"
24 #include "mt8365-mmsys.h"
[all …]
DKconfig76 tristate "MediaTek MMSYS Support"
82 Subsystem (MMSYS).
/Linux-v6.6/Documentation/devicetree/bindings/arm/mediatek/
Dmediatek,mmsys.yaml4 $id: http://devicetree.org/schemas/arm/mediatek/mediatek,mmsys.yaml#
7 title: MediaTek mmsys controller
13 The MediaTek mmsys system controller provides clock control, routing control,
14 and miscellaneous control in mmsys partition.
24 - mediatek,mt2701-mmsys
25 - mediatek,mt2712-mmsys
26 - mediatek,mt6765-mmsys
27 - mediatek,mt6779-mmsys
28 - mediatek,mt6795-mmsys
29 - mediatek,mt6797-mmsys
[all …]
/Linux-v6.6/arch/arm/boot/dts/mediatek/
Dmt7623n.dtsi51 mmsys: syscon@14000000 { label
52 compatible = "mediatek,mt7623-mmsys",
53 "mediatek,mt2701-mmsys",
65 clocks = <&mmsys CLK_MM_SMI_LARB0>,
66 <&mmsys CLK_MM_SMI_LARB0>;
133 <&mmsys CLK_MM_SMI_COMMON>,
144 clocks = <&mmsys CLK_MM_DISP_OVL>;
153 clocks = <&mmsys CLK_MM_DISP_RDMA>;
162 clocks = <&mmsys CLK_MM_DISP_WDMA>;
171 clocks = <&mmsys CLK_MM_MDP_BLS_26M>,
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/media/
Dmediatek-mdp.txt36 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
37 <&mmsys CLK_MM_MUTEX_32K>;
46 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
47 <&mmsys CLK_MM_MUTEX_32K>;
55 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
62 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
69 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
76 clocks = <&mmsys CLK_MM_MDP_WDMA>;
84 clocks = <&mmsys CLK_MM_MDP_WROT0>;
92 clocks = <&mmsys CLK_MM_MDP_WROT1>;
Dmediatek,mdp3-rdma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
90 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
91 <&mmsys CLK_MM_MDP_RSZ1>;
Dmediatek,mdp3-rsz.yaml67 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
76 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
/Linux-v6.6/drivers/clk/mediatek/
DKconfig30 bool "Clock driver for MediaTek MT2701 mmsys"
33 This driver supports MediaTek MT2701 mmsys clocks.
110 tristate "Clock driver for MediaTek MT2712 mmsys"
113 This driver supports MediaTek MT2712 mmsys clocks.
154 tristate "Clock driver for MediaTek MT6765 mmsys"
157 This driver supports MediaTek MT6765 mmsys clocks.
222 tristate "Clock driver for MediaTek MT6779 mmsys"
225 This driver supports MediaTek MT6779 mmsys clocks.
287 tristate "Clock driver for MediaTek MT6795 mmsys"
291 This driver supports MediaTek MT6795 mmsys clocks.
[all …]
/Linux-v6.6/arch/arm64/boot/dts/mediatek/
Dmt8173.dtsi987 mmsys: syscon@14000000 { label
988 compatible = "mediatek,mt8173-mmsys", "syscon";
1004 clocks = <&mmsys CLK_MM_MDP_RDMA0>,
1005 <&mmsys CLK_MM_MUTEX_32K>;
1014 clocks = <&mmsys CLK_MM_MDP_RDMA1>,
1015 <&mmsys CLK_MM_MUTEX_32K>;
1023 clocks = <&mmsys CLK_MM_MDP_RSZ0>;
1030 clocks = <&mmsys CLK_MM_MDP_RSZ1>;
1037 clocks = <&mmsys CLK_MM_MDP_RSZ2>;
1044 clocks = <&mmsys CLK_MM_MDP_WDMA>;
[all …]
Dmt8167.dtsi127 mmsys: syscon@14000000 { label
128 compatible = "mediatek,mt8167-mmsys", "syscon";
136 clocks = <&mmsys CLK_MM_SMI_COMMON>,
137 <&mmsys CLK_MM_SMI_COMMON>;
146 clocks = <&mmsys CLK_MM_SMI_LARB0>,
147 <&mmsys CLK_MM_SMI_LARB0>;
Dmt8183.dtsi908 <&mmsys CLK_MM_SMI_COMMON>,
909 <&mmsys CLK_MM_SMI_LARB0>,
910 <&mmsys CLK_MM_SMI_LARB1>,
911 <&mmsys CLK_MM_GALS_COMM0>,
912 <&mmsys CLK_MM_GALS_COMM1>,
913 <&mmsys CLK_MM_GALS_CCU2MM>,
914 <&mmsys CLK_MM_GALS_IPU12MM>,
915 <&mmsys CLK_MM_GALS_IMG2MM>,
916 <&mmsys CLK_MM_GALS_CAM2MM>,
917 <&mmsys CLK_MM_GALS_IPU2MM>;
[all …]
Dmt8192.dtsi563 <&mmsys CLK_MM_SMI_INFRA>,
564 <&mmsys CLK_MM_SMI_COMMON>,
565 <&mmsys CLK_MM_SMI_GALS>,
566 <&mmsys CLK_MM_SMI_IOMMU>;
1400 mmsys: syscon@14000000 { label
1401 compatible = "mediatek,mt8192-mmsys", "syscon";
1414 clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
1423 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1424 <&mmsys CLK_MM_SMI_INFRA>,
1425 <&mmsys CLK_MM_SMI_GALS>,
[all …]
Dmt8186.dtsi974 <&mmsys CLK_MM_SMI_INFRA>,
975 <&mmsys CLK_MM_SMI_COMMON>,
976 <&mmsys CLK_MM_SMI_GALS>,
977 <&mmsys CLK_MM_SMI_IOMMU>;
1702 mmsys: syscon@14000000 { label
1703 compatible = "mediatek,mt8186-mmsys", "syscon";
1715 clocks = <&mmsys CLK_MM_DISP_MUTEX0>;
1726 clocks = <&mmsys CLK_MM_SMI_COMMON>, <&mmsys CLK_MM_SMI_COMMON>,
1727 <&mmsys CLK_MM_SMI_GALS>, <&mmsys CLK_MM_SMI_GALS>;
1735 clocks = <&mmsys CLK_MM_SMI_COMMON>,
[all …]
Dmt2712e.dtsi993 mmsys: syscon@14000000 { label
994 compatible = "mediatek,mt2712-mmsys", "syscon";
1005 clocks = <&mmsys CLK_MM_SMI_LARB0>,
1006 <&mmsys CLK_MM_SMI_LARB0>;
1014 clocks = <&mmsys CLK_MM_SMI_COMMON>,
1015 <&mmsys CLK_MM_SMI_COMMON>;
1025 clocks = <&mmsys CLK_MM_SMI_LARB4>,
1026 <&mmsys CLK_MM_SMI_LARB4>;
1036 clocks = <&mmsys CLK_MM_SMI_LARB5>,
1037 <&mmsys CLK_MM_SMI_LARB5>;
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/display/mediatek/
Dmediatek,hdmi.yaml103 clocks = <&mmsys CLK_MM_HDMI_PIXEL>,
104 <&mmsys CLK_MM_HDMI_PLLCK>,
105 <&mmsys CLK_MM_HDMI_AUDIO>,
106 <&mmsys CLK_MM_HDMI_SPDIF>;
112 mediatek,syscon-hdmi = <&mmsys 0x900>;
Dmediatek,dsi.yaml106 clocks = <&mmsys CLK_MM_DSI0_MM>,
107 <&mmsys CLK_MM_DSI0_IF>,
110 resets = <&mmsys MT8183_MMSYS_SW0_RST_B_DISP_DSI0>;
Dmediatek,od.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
59 clocks = <&mmsys CLK_MM_DISP_OD>;
Dmediatek,split.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
66 clocks = <&mmsys CLK_MM_DISP_SPLIT0>;
Dmediatek,ufoe.yaml19 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
69 clocks = <&mmsys CLK_MM_DISP_UFOE>;
Dmediatek,postmask.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
80 clocks = <&mmsys CLK_MM_DISP_POSTMASK0>;
Dmediatek,dpi.yaml86 clocks = <&mmsys CLK_MM_DPI_PIXEL>,
87 <&mmsys CLK_MM_DPI_ENGINE>,
Dmediatek,gamma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
87 clocks = <&mmsys CLK_MM_DISP_GAMMA>;
Dmediatek,wdma.yaml18 Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
85 clocks = <&mmsys CLK_MM_DISP_WDMA0>;
/Linux-v6.6/drivers/gpu/drm/mediatek/
Dmtk_drm_drv.c315 { .compatible = "mediatek,mt2701-mmsys",
317 { .compatible = "mediatek,mt7623-mmsys",
319 { .compatible = "mediatek,mt2712-mmsys",
321 { .compatible = "mediatek,mt8167-mmsys",
323 { .compatible = "mediatek,mt8173-mmsys",
325 { .compatible = "mediatek,mt8183-mmsys",
327 { .compatible = "mediatek,mt8186-mmsys",
331 { .compatible = "mediatek,mt8192-mmsys",
333 { .compatible = "mediatek,mt8195-mmsys",
462 * 2. For multi mmsys architecture, crtc path data are located in in mtk_drm_kms_init()
[all …]
/Linux-v6.6/Documentation/devicetree/bindings/pwm/
Dmediatek,pwm-disp.yaml75 clocks = <&mmsys CLK_MM_DISP_PWM026M>,
76 <&mmsys CLK_MM_DISP_PWM0MM>;

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