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/Linux-v6.1/drivers/gpu/drm/panel/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
37 NT35596 1080x1920 video mode panel as found in some Asus
41 tristate "Boe BF060Y8M-AJ0 panel"
46 Say Y here if you want to enable support for Boe BF060Y8M-AJ0
48 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to
58 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
59 24 bit RGB per pixel. It provides a MIPI DSI interface to
60 the host and has a built-in LED backlight.
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/Linux-v6.1/drivers/soundwire/
Dmipi_disco.c1 // SPDX-License-Identifier: (GPL-2.0 OR BSD-3-Clause)
2 // Copyright(c) 2015-17 Intel Corporation.
5 * MIPI Discovery And Configuration (DisCo) Specification for SoundWire
27 * sdw_master_read_prop() - Read Master properties
32 struct sdw_master_prop *prop = &bus->prop; in sdw_master_read_prop()
37 device_property_read_u32(bus->dev, in sdw_master_read_prop()
38 "mipi-sdw-sw-interface-revision", in sdw_master_read_prop()
39 &prop->revision); in sdw_master_read_prop()
43 "mipi-sdw-link-%d-subproperties", bus->link_id); in sdw_master_read_prop()
45 link = device_get_named_child_node(bus->dev, name); in sdw_master_read_prop()
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/Linux-v6.1/Documentation/devicetree/bindings/display/exynos/
Dexynos_dsim.txt1 Exynos MIPI DSI Master
4 - compatible: value should be one of the following
5 "samsung,exynos3250-mipi-dsi" /* for Exynos3250/3472 SoCs */
6 "samsung,exynos4210-mipi-dsi" /* for Exynos4 SoCs */
7 "samsung,exynos5410-mipi-dsi" /* for Exynos5410/5420/5440 SoCs */
8 "samsung,exynos5422-mipi-dsi" /* for Exynos5422/5800 SoCs */
9 "samsung,exynos5433-mipi-dsi" /* for Exynos5433 SoCs */
10 - reg: physical base address and length of the registers set for the device
11 - interrupts: should contain DSI interrupt
12 - clocks: list of clock specifiers, must contain an entry for each required
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/Linux-v6.1/drivers/gpu/drm/
Ddrm_mipi_dbi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * MIPI Display Bus Interface (DBI) LCD controller support
43 * This library provides helpers for MIPI Display Bus Interface (DBI)
46 * Many controllers for tiny lcd displays are MIPI compliant and can use this
49 * MIPI compliant.
51 * Only MIPI Type 1 displays are supported since a full frame memory is needed.
53 * There are 3 MIPI DBI implementation types:
61 * 1. 9-bit with the Data/Command signal as the ninth bit
63 * 3. 8-bit with the Data/Command signal as a separate D/CX pin
107 if (!dbi->read_commands) in mipi_dbi_command_is_read()
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Ddrm_mipi_dsi.c2 * MIPI DSI Bus
4 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
21 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
43 * These functions contain some common logic and helpers to deal with MIPI DSI
46 * Helpers are provided for a number of standard MIPI DSI command as well as a
47 * subset of the MIPI DCS command set.
59 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
71 if (err != -ENODEV) in mipi_dsi_uevent()
75 dsi->name); in mipi_dsi_uevent()
92 .name = "mipi-dsi",
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/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dmixel,mipi-dsi-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Guido Günther <agx@sigxcpu.org>
13 The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
14 MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
18 in either MIPI-DSI PHY mode or LVDS PHY mode.
23 - fsl,imx8mq-mipi-dphy
24 - fsl,imx8qxp-mipi-dphy
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Dtransmit-amplitude.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/transmit-amplitude.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 Binding describing the peak-to-peak transmit amplitude for common PHYs
14 - Marek Behún <kabel@kernel.org>
17 tx-p2p-microvolt:
19 Transmit amplitude voltages in microvolts, peak-to-peak. If this property
21 'tx-p2p-microvolt-names' property must be provided and contain
22 corresponding mode names.
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/Linux-v6.1/drivers/gpu/drm/tiny/
Dpanel-mipi-dbi.c1 // SPDX-License-Identifier: GPL-2.0
3 * DRM driver for MIPI DBI compatible display panels
45 * MIPI commands to execute when the display pipeline is enabled.
53 * parameter: delay in miliseconds (the No Operation command is part of the MIPI Display
79 const struct panel_mipi_dbi_config *config = (struct panel_mipi_dbi_config *)fw->data; in panel_mipi_dbi_check_commands()
81 size_t size = fw->size, commands_len; in panel_mipi_dbi_check_commands()
86 return ERR_PTR(-EINVAL); in panel_mipi_dbi_check_commands()
89 if (memcmp(config->magic, panel_mipi_dbi_magic, sizeof(config->magic))) { in panel_mipi_dbi_check_commands()
90 dev_err(dev, "config: Bad magic: %15ph\n", config->magic); in panel_mipi_dbi_check_commands()
91 return ERR_PTR(-EINVAL); in panel_mipi_dbi_check_commands()
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/Linux-v6.1/include/drm/
Ddrm_mipi_dbi.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * MIPI Display Bus Interface (DBI) LCD controller support
21 * struct mipi_dbi - MIPI DBI interface
63 * @tx_buf9: Buffer used for Option 1 9-bit conversion
74 * struct mipi_dbi_dev - MIPI DBI device
93 * @mode: Fixed display mode
95 struct drm_display_mode mode; member
130 * @dbi: MIPI DBI interface
153 const struct drm_display_mode *mode,
157 const struct drm_display_mode *mode, unsigned int rotation);
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Ddrm_mipi_dsi.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * MIPI DSI Bus
5 * Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
20 /* use Low Power Mode to transmit message */
24 * struct mipi_dsi_msg - read/write DSI buffer
49 * struct mipi_dsi_packet - represents a MIPI DSI packet in protocol format
67 * struct mipi_dsi_host_ops - DSI bus operations
99 * struct mipi_dsi_host - DSI host device
114 /* DSI mode flags */
116 /* video mode */
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/Linux-v6.1/drivers/staging/media/atomisp/pci/
Dsh_css_sp.h1 /* SPDX-License-Identifier: GPL-2.0 */
95 * @brief Update the mipi frame information in host_sp_communication.
97 * @param[in] frame_num The mipi frame number.
98 * @param[in] frame The pointer to the mipi frame.
106 * @brief Update the mipi metadata information in host_sp_communication.
108 * @param[in] frame_num The mipi frame number.
109 * @param[in] metadata The pointer to the mipi metadata.
117 * @brief Update the nr of mipi frames to use in host_sp_communication.
119 * @param[in] num_frames The number of mipi frames to use.
194 * @brief Initialize the DMA software-mask in the debug mode.
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Dsh_css_mipi.c1 // SPDX-License-Identifier: GPL-2.0
37 * - A line is multiple of 4 bytes = 1 word.
38 * - Each frame has SOF and EOF (each 1 word).
39 * - Each line has format header and optionally SOL and EOL (each 1 word).
40 * - Odd and even lines of YUV420 format are different in bites per pixel size.
41 * - Custom size of embedded data.
42 * -- Interleaved frames are not taken into account.
43 * -- Lines are multiples of 8B, and not necessary of (custom 3B, or 7B
73 * in the non-continuous use scenario. in ia_css_mipi_frame_calculate_size()
97 * in the non-continuous use scenario. in ia_css_mipi_frame_calculate_size()
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/Linux-v6.1/Documentation/devicetree/bindings/display/panel/
Dpanel-mipi-dbi-spi.yaml1 # SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/display/panel/panel-mipi-dbi-spi.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: MIPI DBI SPI Panel
10 - Noralf Trønnes <noralf@tronnes.org>
13 This binding is for display panels using a MIPI DBI compatible controller
14 in SPI mode.
16 The MIPI Alliance Standard for Display Bus Interface defines the electrical
23 - Power:
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/Linux-v6.1/Documentation/devicetree/bindings/media/
Dvideo-interfaces.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/media/video-interfaces.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sakari Ailus <sakari.ailus@linux.intel.com>
11 - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
29 #address-cells = <1>;
30 #size-cells = <0>;
45 a common scheme using '#address-cells', '#size-cells' and 'reg' properties is
49 specify #address-cells, #size-cells properties independently for the 'port'
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/Linux-v6.1/include/media/
Dv4l2-mediabus.h1 /* SPDX-License-Identifier: GPL-2.0-only */
11 #include <linux/v4l2-mediabus.h>
38 * The client runs in master or in slave mode. By "Master mode" an operation
39 * mode is meant, when the client (e.g., a camera sensor) is producing
40 * horizontal and vertical synchronisation. In "Slave mode" the host is
47 * Note: in BT.656 mode HSYNC, FIELD, and VSYNC are unused
59 /* FIELD = 0/1 - Field1 (odd)/Field2 (even) */
61 /* FIELD = 1/0 - Field1 (odd)/Field2 (even) */
63 /* Active state of Sync-on-green (SoG) signal, 0/1 for LOW/HIGH respectively. */
70 /* Clock non-continuous mode support. */
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/Linux-v6.1/Documentation/devicetree/bindings/soundwire/
Dqcom,sdw.txt7 - compatible:
10 Definition: must be "qcom,soundwire-v<MAJOR>.<MINOR>.<STEP>",
12 "qcom,soundwire-v1.3.0"
13 "qcom,soundwire-v1.5.0"
14 "qcom,soundwire-v1.5.1"
15 "qcom,soundwire-v1.6.0"
16 - reg:
18 Value type: <prop-encoded-array>
22 - interrupts:
24 Value type: <prop-encoded-array>
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/Linux-v6.1/arch/arm64/boot/dts/renesas/
Dr8a774a1-hihope-rzg2m-ex-mipi-2.1.dts1 // SPDX-License-Identifier: GPL-2.0
4 * connected with aistarvision-mipi-v2-adapter board
9 /dts-v1/;
10 #include "r8a774a1-hihope-rzg2m-ex.dts"
11 #include "hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi"
14 model = "HopeRun HiHope RZ/G2M with sub board connected with aistarvision-mipi-v2-adapter board";
15 compatible = "hoperun,hihope-rzg2m", "renesas,r8a774a1";
19 * On RZ/G2M SoC LSI V1.3 CSI40 supports only 4 lane mode.
21 * imx219 as the imx219 endpoint driver supports only 2 lane mode.
/Linux-v6.1/Documentation/admin-guide/media/
Dimx.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
20 - Video De-Interlacing or Combining Block (VDIC)
26 re-ordering (for example UYVY to YUYV) within the same colorspace, and
27 packed <--> planar conversion. The IDMAC can also perform a simple
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/Linux-v6.1/Documentation/devicetree/bindings/media/i2c/
Dovti,ov02a10.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 - Dongchun Zhu <dongchun.zhu@mediatek.com>
13 description: |-
14 The Omnivision OV02A10 is a low-cost, high performance, 1/5-inch, 2 megapixel
17 @ 1600x1200 (UXGA) resolution transferred over a 1-lane MIPI interface. The
18 sensor output is available via CSI-2 serial data output.
21 - $ref: /schemas/media/video-interface-devices.yaml#
33 clock-names:
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/Linux-v6.1/Documentation/driver-api/media/
Dtx-rx.rst1 .. SPDX-License-Identifier: GPL-2.0
3 .. _transmitter-receiver:
9 these devices include a camera sensor, a TV tuner and a parallel or a CSI-2
13 ---------
17 MIPI CSI-2
20 CSI-2 is a data bus intended for transferring images from cameras to
21 the host SoC. It is defined by the `MIPI alliance`_.
23 .. _`MIPI alliance`: https://www.mipi.org/
31 .. _`BT.656`: https://en.wikipedia.org/wiki/ITU-R_BT.656
34 -------------------
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/Linux-v6.1/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@xilinx.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
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/Linux-v6.1/drivers/gpu/drm/tegra/
Dmipi-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "mipi-phy.h"
12 * Default D-PHY timings based on MIPI D-PHY specification. Derived from the
13 * valid ranges specified in Section 6.9, Table 14, Page 40 of the D-PHY
19 timing->clkmiss = 0; in mipi_dphy_timing_get_default()
20 timing->clkpost = 70 + 52 * period; in mipi_dphy_timing_get_default()
21 timing->clkpre = 8; in mipi_dphy_timing_get_default()
22 timing->clkprepare = 65; in mipi_dphy_timing_get_default()
23 timing->clksettle = 95; in mipi_dphy_timing_get_default()
24 timing->clktermen = 0; in mipi_dphy_timing_get_default()
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/Linux-v6.1/drivers/gpu/drm/i915/display/
Dvlv_dsi.c86 struct drm_encoder *encoder = &intel_dsi->base.base; in vlv_dsi_wait_for_fifo_empty()
87 struct drm_device *dev = encoder->dev; in vlv_dsi_wait_for_fifo_empty()
96 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
108 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
124 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
133 struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; in intel_dsi_host_transfer()
135 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
149 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
165 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
172 if (msg->rx_len) { in intel_dsi_host_transfer()
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/Linux-v6.1/drivers/gpu/drm/gma500/
Doaktrail.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2007-2011, Intel Corporation.
71 /* 0x61190 if MIPI */
78 /* Bit 0, Frequency, 15 bits,0 - 32767Hz */
82 /* if MIPI, 0x0000 if LVDS */
84 /* 0: Type-1, */
85 /* 1: Type-2, */
86 /* 2: Type-3, */
87 /* 3: Type-4 */
94 /* Bit 8, Minimum Supported Frame Rate, 6 bits, 0 - 63Hz */
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/Linux-v6.1/Documentation/driver-api/soundwire/
Dsummary.rst5 SoundWire is a new interface ratified in 2015 by the MIPI Alliance.
10 SoundWire is a 2-pin multi-drop interface with data and clock line. It
15 commands over a single two-pin interface.
23 (4) Device status monitoring, including interrupt-style alerts to the Master.
30 transmit or receiving mode (typically fixed direction but configurable
38 +---------------+ +---------------+
40 | Master |-------+-------------------------------| Slave |
42 | |-------|-------+-----------------------| |
43 +---------------+ | | +---------------+
47 +--+-------+--+
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