/Linux-v5.10/drivers/net/ |
D | mii.c | 3 mii.c: MII interface library 34 #include <linux/mii.h> 36 static u32 mii_get_an(struct mii_if_info *mii, u16 addr) in mii_get_an() argument 40 advert = mii->mdio_read(mii->dev, mii->phy_id, addr); in mii_get_an() 47 * @mii: MII interface 55 int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd) in mii_ethtool_gset() argument 57 struct net_device *dev = mii->dev; in mii_ethtool_gset() 65 if (mii->supports_gmii) in mii_ethtool_gset() 76 ecmd->phy_address = mii->phy_id; in mii_ethtool_gset() 81 bmcr = mii->mdio_read(dev, mii->phy_id, MII_BMCR); in mii_ethtool_gset() [all …]
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/Linux-v5.10/drivers/net/ethernet/stmicro/stmmac/ |
D | stmmac_mdio.c | 4 Provides Bus interface for MII registers 16 #include <linux/mii.h> 85 unsigned int mii_address = priv->hw->mii.addr; in stmmac_xgmac2_mdio_read() 86 unsigned int mii_data = priv->hw->mii.data; in stmmac_xgmac2_mdio_read() 90 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read() 109 value |= (priv->clk_csr << priv->hw->mii.clk_csr_shift) in stmmac_xgmac2_mdio_read() 110 & priv->hw->mii.clk_csr_mask; in stmmac_xgmac2_mdio_read() 113 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read() 118 /* Set the MII address register to read */ in stmmac_xgmac2_mdio_read() 122 /* Wait until any existing MII operation is complete */ in stmmac_xgmac2_mdio_read() [all …]
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D | dwmac100_core.c | 191 mac->mii.addr = MAC_MII_ADDR; in dwmac100_setup() 192 mac->mii.data = MAC_MII_DATA; in dwmac100_setup() 193 mac->mii.addr_shift = 11; in dwmac100_setup() 194 mac->mii.addr_mask = 0x0000F800; in dwmac100_setup() 195 mac->mii.reg_shift = 6; in dwmac100_setup() 196 mac->mii.reg_mask = 0x000007C0; in dwmac100_setup() 197 mac->mii.clk_csr_shift = 2; in dwmac100_setup() 198 mac->mii.clk_csr_mask = GENMASK(5, 2); in dwmac100_setup()
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/Linux-v5.10/drivers/net/phy/ |
D | mdio_devres.c | 9 struct mii_bus *mii; member 16 mdiobus_free(dr->mii); in devm_mdiobus_free() 38 dr->mii = mdiobus_alloc_size(sizeof_priv); in devm_mdiobus_alloc_size() 39 if (!dr->mii) { in devm_mdiobus_alloc_size() 45 return dr->mii; in devm_mdiobus_alloc_size() 53 mdiobus_unregister(dr->mii); in devm_mdiobus_unregister() 60 struct mii_bus *mii = match_data; in mdiobus_devres_match() local 62 return mii == res->mii; in mdiobus_devres_match() 68 * @bus: MII bus structure to register 93 dr->mii = bus; in __devm_mdiobus_register() [all …]
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D | mii_timestamper.c | 3 // Support for generic time stamping devices on MII buses. 19 * register_mii_tstamp_controller() - registers an MII time stamping device. 48 * unregister_mii_tstamp_controller() - unregisters an MII time stamping device. 71 * register_mii_timestamper - Enables a given port of an MII time stamper. 73 * @node: The device tree node of the MII time stamp controller. 104 * unregister_mii_timestamper - Disables a given MII time stamper.
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/Linux-v5.10/drivers/bcma/ |
D | driver_chipcommon_b.c | 36 void __iomem *mii = ccb->mii; in bcma_chipco_b_mii_write() local 38 writel(offset, mii + BCMA_CCB_MII_MNG_CTL); in bcma_chipco_b_mii_write() 39 bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100); in bcma_chipco_b_mii_write() 40 writel(value, mii + BCMA_CCB_MII_MNG_CMD_DATA); in bcma_chipco_b_mii_write() 41 bcma_wait_reg(bus, mii + BCMA_CCB_MII_MNG_CTL, 0x0100, 0x0000, 100); in bcma_chipco_b_mii_write() 51 ccb->mii = ioremap(ccb->core->addr_s[1], BCMA_CORE_SIZE); in bcma_core_chipcommon_b_init() 52 if (!ccb->mii) in bcma_core_chipcommon_b_init() 60 if (ccb->mii) in bcma_core_chipcommon_b_free() 61 iounmap(ccb->mii); in bcma_core_chipcommon_b_free()
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/Linux-v5.10/drivers/net/usb/ |
D | asix_devices.c | 69 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ 78 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in asix_get_phyid() 91 phy_reg = asix_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in asix_get_phyid() 104 return mii_link_ok(&dev->mii); in asix_get_link() 111 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in asix_ioctl() 176 mii_check_media(&dev->mii, 1, 1); in ax88172_link_reset() 177 mii_ethtool_gset(&dev->mii, &ecmd); in ax88172_link_reset() 208 asix_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, reset_bits); in asix_phy_reset() 215 if (asix_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR) in asix_phy_reset() 223 dev->mii.phy_id); in asix_phy_reset() [all …]
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D | sr9700.c | 19 #include <linux/mii.h> 242 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in sr9700_ioctl() 321 struct mii_if_info *mii; in sr9700_bind() local 337 mii = &dev->mii; in sr9700_bind() 338 mii->dev = netdev; in sr9700_bind() 339 mii->mdio_read = sr_mdio_read; in sr9700_bind() 340 mii->mdio_write = sr_mdio_write; in sr9700_bind() 341 mii->phy_id_mask = 0x1f; in sr9700_bind() 342 mii->reg_num_mask = 0x1f; in sr9700_bind() 369 sr_mdio_write(netdev, mii->phy_id, MII_BMCR, BMCR_RESET); in sr9700_bind() [all …]
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D | sr9800.c | 19 #include <linux/mii.h> 174 netdev_err(dev->net, "Failed to enable software MII access\n"); in sr_set_sw_mii() 184 netdev_err(dev->net, "Failed to enable hardware MII access\n"); in sr_set_hw_mii() 369 /* Get the PHY Identifier from the PHYSID1 & PHYSID2 MII registers */ 378 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID1); in sr_get_phyid() 389 phy_reg = sr_mdio_read(dev->net, dev->mii.phy_id, MII_PHYSID2); in sr_get_phyid() 485 return mii_link_ok(&dev->mii); in sr_get_link() 492 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); in sr_ioctl() 539 mii_check_media(&dev->mii, 1, 1); in sr9800_link_reset() 540 mii_ethtool_gset(&dev->mii, &ecmd); in sr9800_link_reset() [all …]
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D | smsc75xx.c | 13 #include <linux/mii.h> 188 /* confirm MII not busy */ in __smsc75xx_mdio_read() 191 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_read\n"); in __smsc75xx_mdio_read() 196 phy_id &= dev->mii.phy_id_mask; in __smsc75xx_mdio_read() 197 idx &= dev->mii.reg_num_mask; in __smsc75xx_mdio_read() 209 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); in __smsc75xx_mdio_read() 235 /* confirm MII not busy */ in __smsc75xx_mdio_write() 238 netdev_warn(dev->net, "MII is busy in smsc75xx_mdio_write\n"); in __smsc75xx_mdio_write() 250 phy_id &= dev->mii.phy_id_mask; in __smsc75xx_mdio_write() 251 idx &= dev->mii.reg_num_mask; in __smsc75xx_mdio_write() [all …]
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/Linux-v5.10/drivers/net/ethernet/samsung/sxgbe/ |
D | sxgbe_mdio.c | 13 #include <linux/mii.h> 27 #define SXGBE_MII_BUSY 0x00400000 /* mii busy */ 49 writel(reg, sp->ioaddr + sp->hw->mii.data); in sxgbe_mdio_ctrl_data() 60 writel(reg, sp->ioaddr + sp->hw->mii.addr); in sxgbe_mdio_c45() 74 writel(reg, sp->ioaddr + sp->hw->mii.addr); in sxgbe_mdio_c22() 82 const struct mii_regs *mii = &sp->hw->mii; in sxgbe_mdio_access() local 85 rc = sxgbe_mdio_busy_wait(sp->ioaddr, mii->data); in sxgbe_mdio_access() 99 return sxgbe_mdio_busy_wait(sp->ioaddr, mii->data); in sxgbe_mdio_access() 119 return readl(priv->ioaddr + priv->hw->mii.data) & 0xffff; in sxgbe_mdio_read() 153 netdev_err(ndev, "%s: mii bus allocation failed\n", __func__); in sxgbe_mdio_register() [all …]
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/Linux-v5.10/drivers/net/ethernet/freescale/ |
D | fsl_pq_mdio.c | 20 #include <linux/mii.h> 40 u32 miimcfg; /* MII management configuration reg */ 41 u32 miimcom; /* MII management command reg */ 42 u32 miimadd; /* MII management address reg */ 43 u32 miimcon; /* MII management control reg */ 44 u32 miimstat; /* MII management status reg */ 45 u32 miimind; /* MII management indication reg */ 55 struct fsl_pq_mii mii; member 61 /* Number of microseconds to wait for an MII register to respond */ 73 * @mii_offset: the offset of the MII registers within the memory map of the [all …]
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/Linux-v5.10/include/linux/ |
D | sungem_phy.h | 19 /* Structure used to statically define an mii/gii based PHY */ 68 /* MII definitions missing from mii.h */ 75 /* MII BCM5201 MULTIPHY interrupt register */ 84 /* MII BCM5201 MULTIPHY register bits */ 88 /* MII BCM5221 Additional registers */ 97 /* MII BCM5241 Additional registers */ 100 /* MII BCM5400 1000-BASET Control register */ 104 /* MII BCM5400 AUXCONTROL register */ 108 /* MII BCM5400 AUXSTATUS register */
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D | mii.h | 3 * linux/mii.h: definitions for MII-compatible transceivers 14 #include <uapi/linux/mii.h> 33 extern int mii_link_ok (struct mii_if_info *mii); 34 extern int mii_nway_restart (struct mii_if_info *mii); 35 extern int mii_ethtool_gset(struct mii_if_info *mii, struct ethtool_cmd *ecmd); 37 struct mii_if_info *mii, struct ethtool_link_ksettings *cmd); 38 extern int mii_ethtool_sset(struct mii_if_info *mii, struct ethtool_cmd *ecmd); 40 struct mii_if_info *mii, const struct ethtool_link_ksettings *cmd); 41 extern int mii_check_gmii_support(struct mii_if_info *mii); 42 extern void mii_check_link (struct mii_if_info *mii); [all …]
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D | mii_timestamper.h | 3 * Support for generic time stamping devices on MII buses. 16 * struct mii_timestamper - Callback interface to MII time stamping devices. 19 * the MII time stamping device promises to deliver it using 24 * @txtstamp: Requests a Tx timestamp for 'skb'. The MII time stamping 66 * struct mii_timestamping_ctrl - MII time stamping controller interface. 72 * MII timestamper instance or PTR_ERR.
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/Linux-v5.10/Documentation/devicetree/bindings/ptp/ |
D | timestamper.txt | 1 Time stamps from MII bus snooping devices 3 This binding supports non-PHY devices that snoop the MII bus and 6 alone MII time stamping drivers use this binding to specify the 9 Non-PHY MII time stamping drivers typically talk to the control 12 time stamping channels, each of which snoops on a MII bus. 15 stamping channel from the controller device to that phy's MII bus. 40 In this example, time stamps from the MII bus attached to phy@1 will
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/Linux-v5.10/drivers/pinctrl/ |
D | pinctrl-falcon.c | 136 MFP_FALCON(GPIO64, MII, GPIO, NONE, NONE), 137 MFP_FALCON(GPIO65, MII, GPIO, NONE, NONE), 138 MFP_FALCON(GPIO66, MII, GPIO, NONE, NONE), 139 MFP_FALCON(GPIO67, MII, GPIO, NONE, NONE), 140 MFP_FALCON(GPIO68, MII, GPIO, NONE, NONE), 141 MFP_FALCON(GPIO69, MII, GPIO, NONE, NONE), 142 MFP_FALCON(GPIO70, MII, GPIO, NONE, NONE), 143 MFP_FALCON(GPIO71, MII, GPIO, NONE, NONE), 144 MFP_FALCON(GPIO72, MII, GPIO, NONE, NONE), 145 MFP_FALCON(GPIO73, MII, GPIO, NONE, NONE), [all …]
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D | pinctrl-xway.c | 160 MFP_XWAY(GPIO44, GPIO, MII, SIN, GPHY), 163 MFP_XWAY(GPIO47, GPIO, MII, GPHY, SIN), 352 MFP_XWAY(GPIO0, GPIO, EXIN, MII, TDM), 356 MFP_XWAY(GPIO4, GPIO, GPT, EPHY, MII), 357 MFP_XWAY(GPIO5, GPIO, MII, ASC, GPT), 358 MFP_XWAY(GPIO6, GPIO, MII, ASC, EXIN), 359 MFP_XWAY(GPIO7, GPIO, SPI, MII, JTAG), 360 MFP_XWAY(GPIO8, GPIO, SPI, MII, JTAG), 361 MFP_XWAY(GPIO9, GPIO, SPI, MII, JTAG), 362 MFP_XWAY(GPIO10, GPIO, SPI, MII, JTAG), [all …]
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/Linux-v5.10/drivers/net/mdio/ |
D | mdio-i2c.c | 96 struct mii_bus *mii; in mdio_i2c_alloc() local 101 mii = mdiobus_alloc(); in mdio_i2c_alloc() 102 if (!mii) in mdio_i2c_alloc() 105 snprintf(mii->id, MII_BUS_ID_SIZE, "i2c:%s", dev_name(parent)); in mdio_i2c_alloc() 106 mii->parent = parent; in mdio_i2c_alloc() 107 mii->read = i2c_mii_read; in mdio_i2c_alloc() 108 mii->write = i2c_mii_write; in mdio_i2c_alloc() 109 mii->priv = i2c; in mdio_i2c_alloc() 111 return mii; in mdio_i2c_alloc()
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/Linux-v5.10/Documentation/devicetree/bindings/pinctrl/ |
D | marvell,kirkwood-pinctrl.txt | 33 mii(col) 35 mii(crs) 41 mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col) 43 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs) 47 mpp35 35 gpio, mii(rxerr) 71 mii(col), mii-1(rxerr) 73 mii(crs), sata0(prsnt) 79 mpp14 14 gpio, sdio(d0), uart1(rxd), mii(col) 81 mpp16 16 gpio, sdio(d2), uart0(cts), uart1(rxd), mii(crs) 100 mpp35 35 gpio, ge1(rxerr), sata0(act), mii(rxerr) [all …]
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D | marvell,armada-37xx-pinctrl.txt | 120 - functions mii, gpio 144 - functions ptp, mii 148 - functions ptp, mii 152 - functions mii, mii_err 190 rgmii_pins: mii-pins { 192 function = "mii";
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/Linux-v5.10/drivers/net/ethernet/smsc/ |
D | epic100.c | 85 #include <linux/mii.h> 280 signed char phys[4]; /* MII device addresses. */ 284 struct mii_if_info mii; member 371 ep->mii.dev = dev; in epic_init_one() 372 ep->mii.mdio_read = mdio_read; in epic_init_one() 373 ep->mii.mdio_write = mdio_write; in epic_init_one() 374 ep->mii.phy_id_mask = 0x1f; in epic_init_one() 375 ep->mii.reg_num_mask = 0x1f; in epic_init_one() 406 /* Magic?! If we don't set this bit the MII interface won't work. */ in epic_init_one() 411 /* Turn on the MII transceiver. */ in epic_init_one() [all …]
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/Linux-v5.10/Documentation/devicetree/bindings/soc/ti/ |
D | ti,pruss.yaml | 25 - an Ethernet MII_RT module with two MII ports 238 mii-rt@[a-f0-9]+$: 241 MII-RT sub-module represented as a SysCon. 248 - const: ti,pruss-mii 256 mii-g-rt@[a-f0-9]+$: 259 communication protocols (G stands for Gigabit). MII-G-RT sub-module 267 - const: ti,pruss-mii-g 369 pruss_mii_rt: mii-rt@32000 { 370 compatible = "ti,pruss-mii", "syscon"; 423 pruss1_mii_rt: mii-rt@32000 { [all …]
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/Linux-v5.10/arch/mips/include/asm/octeon/ |
D | cvmx-helper-board.h | 55 * Fake IPD port, the RGMII/MII interface may use different PHY, use 61 * Return the MII PHY address associated with the given IPD 62 * port. A result of -1 means there isn't a MII capable PHY 63 * connected to this port. On chips supporting multiple MII 72 * @ipd_port: Octeon IPD port to get the MII address for. 74 * Returns MII PHY address and bus number or -1.
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/Linux-v5.10/drivers/net/ethernet/micrel/ |
D | ks8851_common.c | 21 #include <linux/mii.h> 416 mii_check_link(&ks->mii); in ks8851_irq() 509 mii_check_link(&ks->mii); in ks8851_net_open() 688 return generic_mii_ioctl(&ks->mii, if_mii(req), cmd, NULL); in ks8851_net_ioctl() 728 mii_ethtool_get_link_ksettings(&ks->mii, cmd); in ks8851_get_link_ksettings() 737 return mii_ethtool_set_link_ksettings(&ks->mii, cmd); in ks8851_set_link_ksettings() 743 return mii_link_ok(&ks->mii); in ks8851_get_link() 749 return mii_nway_restart(&ks->mii); in ks8851_nway_reset() 908 /* MII interface controls */ 911 * ks8851_phy_reg - convert MII register into a KS8851 register [all …]
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