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/Linux-v5.15/Documentation/devicetree/bindings/pci/
Drockchip-pcie-ep.txt4 - compatible: Should contain "rockchip,rk3399-pcie-ep"
5 - reg: Two register ranges as listed in the reg-names property
6 - reg-names: Must include the following names
7 - "apb-base"
8 - "mem-base"
9 - clocks: Must contain an entry for each entry in clock-names.
10 See ../clocks/clock-bindings.txt for details.
11 - clock-names: Must include the following entries:
12 - "aclk"
13 - "aclk-perf"
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Dcdns-pcie-ep.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/pci/cdns-pcie-ep.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: "cdns-pcie.yaml#"
16 cdns,max-outbound-regions:
17 description: maximum number of outbound regions
Dcdns-pcie-host.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/pci/cdns-pcie-host.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: "/schemas/pci/pci-bus.yaml#"
14 - $ref: "cdns-pcie.yaml#"
17 cdns,max-outbound-regions:
18 description: maximum number of outbound regions
25 cdns,no-bar-match-nbits:
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Dcdns,cdns-pcie-ep.yaml1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
4 $id: http://devicetree.org/schemas/pci/cdns,cdns-pcie-ep.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tom Joseph <tjoseph@cadence.com>
13 - $ref: "cdns-pcie-ep.yaml#"
14 - $ref: "pci-ep.yaml#"
18 const: cdns,cdns-pcie-ep
23 reg-names:
25 - const: reg
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/Linux-v5.15/drivers/pci/controller/
Dpcie-rockchip-ep.c1 // SPDX-License-Identifier: GPL-2.0+
7 * Author: Shawn Lin <shawn.lin@rock-chips.com>
8 * Simon Xue <xxm@rock-chips.com>
15 #include <linux/pci-epc.h>
17 #include <linux/pci-epf.h>
20 #include "pcie-rockchip.h"
23 * struct rockchip_pcie_ep - private data for PCIe endpoint controller driver
26 * @max_regions: maximum number of regions supported by hardware
27 * @ob_region_map: bitmask of mapped outbound regions
28 * @ob_addr: base addresses in the AXI bus where the outbound regions start
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Dpcie-iproc.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2014 Hauke Mehrtens <hauke@hauke-m.de>
9 #include <linux/pci-ecam.h>
17 #include <linux/irqchip/arm-gic-v3.h>
25 #include "pcie-iproc.h"
63 /* derive the enum index of the outbound/inbound mapping registers */
67 * Maximum number of outbound mapping window sizes that can be supported by any
92 * struct iproc_pcie_ob_map - iProc PCIe outbound mapping controller-specific
94 * @window_sizes: list of supported outbound mapping window sizes in MB
95 * @nr_sizes: number of supported outbound mapping window sizes
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/Linux-v5.15/drivers/scsi/pm8001/
Dpm8001_defs.h2 * PMC-Sierra 8001/8081/8088/8089 SAS/SATA based host adapters driver
4 * Copyright (c) 2008-2009 USI Co., Ltd.
18 * 3. Neither the names of the above-listed copyright holders nor the names
68 DATA_DIR_OUT = 0x02, /* OUTBOUND */
77 /* driver compile-time configuration */
78 #define PM8001_MAX_CCB 1024 /* max ccbs supported */
84 /* Inbound/Outbound queue size */
89 #define PM8001_MAX_PHYS 16 /* max. possible phys */
90 #define PM8001_MAX_PORTS 16 /* max. possible ports */
91 #define PM8001_MAX_DEVICES 2048 /* max supported device */
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/Linux-v5.15/drivers/rapidio/devices/
Dtsi721.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * RapidIO mport driver for Tsi721 PCIExpress-to-SRIO bridge
19 #include <linux/dma-mapping.h>
32 static int pcie_mrrs = -1;
47 * tsi721_lcread - read from local SREP config space
55 * success or %-EINVAL on failure.
60 struct tsi721_device *priv = mport->priv; in tsi721_lcread()
63 return -EINVAL; /* only 32-bit access is supported */ in tsi721_lcread()
65 *data = ioread32(priv->regs + offset); in tsi721_lcread()
71 * tsi721_lcwrite - write into local SREP config space
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/Linux-v5.15/drivers/pci/controller/cadence/
Dpcie-cadence-ep.c1 // SPDX-License-Identifier: GPL-2.0
4 // Author: Cyrille Pitchen <cyrille.pitchen@free-electrons.com>
9 #include <linux/pci-epc.h>
13 #include "pcie-cadence.h"
29 fn = fn + first_vf_offset + ((vfn - 1) * stride); in cdns_pcie_get_fn_from_vfn()
39 struct cdns_pcie *pcie = &ep->pcie; in cdns_pcie_ep_write_header()
43 dev_err(&epc->dev, "Only Virtual Function #1 has deviceID\n"); in cdns_pcie_ep_write_header()
44 return -EINVAL; in cdns_pcie_ep_write_header()
47 cdns_pcie_ep_fn_writew(pcie, fn, reg, hdr->deviceid); in cdns_pcie_ep_write_header()
51 cdns_pcie_ep_fn_writew(pcie, fn, PCI_DEVICE_ID, hdr->deviceid); in cdns_pcie_ep_write_header()
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/Linux-v5.15/include/linux/
Drio.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
24 #define RIO_NO_HOPCOUNT -1
56 * 0 RapidIO outbound doorbells
57 * 1-15 RapidIO memory regions
63 * 2 RapidIO outbound mailboxes
89 * struct rio_switch - RIO switch info
92 * @port_ok: Status of each port (one bit per port) - OK=1 or UNINIT=0
93 * @ops: pointer to switch-specific operations
95 * @nextdev: Array of per-port pointers to the next attached device
107 * struct rio_switch_ops - Per-switch operations
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/Linux-v5.15/drivers/scsi/esas2r/
Desas2r_init.c5 * Copyright (c) 2001-2013 ATTO Technology, Inc.
21 * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
40 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
50 mem_desc->esas2r_param = mem_desc->size + align; in esas2r_initmem_alloc()
51 mem_desc->virt_addr = NULL; in esas2r_initmem_alloc()
52 mem_desc->phys_addr = 0; in esas2r_initmem_alloc()
53 mem_desc->esas2r_data = dma_alloc_coherent(&a->pcid->dev, in esas2r_initmem_alloc()
54 (size_t)mem_desc-> in esas2r_initmem_alloc()
56 (dma_addr_t *)&mem_desc-> in esas2r_initmem_alloc()
60 if (mem_desc->esas2r_data == NULL) { in esas2r_initmem_alloc()
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/Linux-v5.15/arch/powerpc/platforms/4xx/
Dpci.c2 * PCI / PCI-X / PCI-Express support for 4xx parts
29 #include <asm/pci-bridge.h>
32 #include <asm/dcr-regs.h>
61 if (dev->devfn != 0 || dev->bus->self != NULL) in fixup_ppc4xx_pci_bridge()
64 hose = pci_bus_to_host(dev->bus); in fixup_ppc4xx_pci_bridge()
68 if (!of_device_is_compatible(hose->dn, "ibm,plb-pciex") && in fixup_ppc4xx_pci_bridge()
69 !of_device_is_compatible(hose->dn, "ibm,plb-pcix") && in fixup_ppc4xx_pci_bridge()
70 !of_device_is_compatible(hose->dn, "ibm,plb-pci")) in fixup_ppc4xx_pci_bridge()
73 if (of_device_is_compatible(hose->dn, "ibm,plb440epx-pci") || in fixup_ppc4xx_pci_bridge()
74 of_device_is_compatible(hose->dn, "ibm,plb440grx-pci")) { in fixup_ppc4xx_pci_bridge()
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/Linux-v5.15/drivers/scsi/aacraid/
Daacraid.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
9 * Copyright (c) 2000-2010 Adaptec, Inc.
10 * 2010-2015 PMC-Sierra, Inc. (aacraid@pmc-sierra.com)
11 * 2016-2017 Microsemi Corp. (aacraid@microsemi.com)
33 /*------------------------------------------------------------------------------
35 *----------------------------------------------------------------------------*/
60 /* Bit definitions in IOA->Host Interrupt Register */
89 # define AAC_DRIVER_BRANCH "-custom"
94 #define AAC_NUM_IO_FIB (1024 - AAC_NUM_MGT_FIB)
105 /* Thor: 5 phys. buses: #0: empty, 1-4: 256 targets each */
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/Linux-v5.15/drivers/parisc/
Dccio-dma.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 ** ccio-dma.c:
4 ** DMA management routines for first generation cache-coherent machines.
9 ** (c) Copyright 2000 Hewlett-Packard Company
15 ** the I/O MMU - basically what x86 does.
17 ** Philipp Rumpf has a "Real Mode" driver for PCX-W machines at:
18 ** CVSROOT=:pserver:anonymous@198.186.203.37:/cvsroot/linux-parisc
19 ** cvs -z3 co linux/arch/parisc/kernel/dma-rm.c
21 ** I've rewritten his code to work under TPG's tree. See ccio-rm-dma.c.
24 ** o outbound DMA is slower - U2 won't prefetch data (GSC+ XQL signal).
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/Linux-v5.15/drivers/misc/habanalabs/common/
Dhabanalabs.h1 /* SPDX-License-Identifier: GPL-2.0
3 * Copyright 2016-2019 HabanaLabs, Ltd.
19 #include <linux/dma-direction.h>
27 #include <linux/io-64-nonatomic-lo-hi.h>
33 * bits[63:61] - Encode mmap type
34 * bits[45:0] - mmap offset value
39 #define HL_MMAP_TYPE_SHIFT (61 - PAGE_SHIFT)
81 * enum hl_mmu_page_table_locaion - mmu page table location
82 * @MMU_DR_PGT: page-table is located on device DRAM.
83 * @MMU_HR_PGT: page-table is located on host memory.
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/Linux-v5.15/include/rdma/
Dib_verbs.h1 /* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
18 #include <linux/dma-mapping.h>
204 if (attr->gid_type == IB_GID_TYPE_IB) in rdma_gid_attr_network_type()
207 if (attr->gid_type == IB_GID_TYPE_ROCE) in rdma_gid_attr_network_type()
210 if (ipv6_addr_v4mapped((struct in6_addr *)&attr->gid)) in rdma_gid_attr_network_type()
240 * This device supports a per-device lkey or stag that can be
342 /* Max size of RNDV header */
344 /* Max number of entries in tag matching list */
348 /* Max number of outstanding list operations */
350 /* Max number of SGE in tag matching entry */
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/Linux-v5.15/drivers/message/fusion/
Dmptbase.c8 * Copyright (c) 1999-2008 LSI Corporation
9 * (mailto:DL-MPTFusionLinux@lsi.com)
12 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
26 LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
45 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
47 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
61 #include <linux/dma-mapping.h>
68 /*=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=-=*/
106 " debug level - refer to mptdebug.h - (default=0)");
112 "Enable detection of Firmware fault and halt Firmware on fault - (default=0)");
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/Linux-v5.15/drivers/misc/habanalabs/goya/
Dgoya.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright 2016-2019 HabanaLabs, Ltd.
23 * - Range registers (When MMU is enabled, DMA RR does NOT protect host)
24 * - MMU
27 * - Range registers (protect the first 512MB)
28 * - MMU (isolation between users)
31 * - Range registers
32 * - Protection bits
44 * - checks DMA pointer
45 * - WREG, MSG_PROT are not allowed.
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