Home
last modified time | relevance | path

Searched +full:lpc +full:- +full:io +full:- +full:reg (Results 1 – 25 of 46) sorted by relevance

12

/Linux-v5.15/Documentation/devicetree/bindings/ipmi/
Daspeed,ast2400-kcs-bmc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/ipmi/aspeed,ast2400-kcs-bmc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
13 The Aspeed BMC SoCs typically use the Keyboard-Controller-Style (KCS)
14 interfaces on the LPC bus for in-band IPMI communication with their host.
19 - description: Channel ID derived from reg
22 - aspeed,ast2400-kcs-bmc-v2
23 - aspeed,ast2500-kcs-bmc-v2
[all …]
Dnpcm7xx-kcs-bmc.txt5 used to perform in-band IPMI communication with their host.
8 - compatible : should be one of
9 "nuvoton,npcm750-kcs-bmc"
10 - interrupts : interrupt generated by the controller
11 - kcs_chan : The KCS channel number in the controller
16 compatible = "nuvoton,npcm750-lpc-kcs", "simple-mfd", "syscon";
17 reg = <0xf0007000 0x40>;
18 reg-io-width = <1>;
20 #address-cells = <1>;
21 #size-cells = <1>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/serial/
D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - if:
16 - required:
17 - aspeed,lpc-io-reg
18 - required:
19 - aspeed,lpc-interrupts
20 - required:
[all …]
/Linux-v5.15/drivers/char/ipmi/
Dkcs_bmc_aspeed.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2015-2018, Intel Corporation.
6 #define pr_fmt(fmt) "aspeed-kcs-bmc: " fmt
11 #include <linux/io.h>
28 #define DEVICE_NAME "ast-kcs-bmc"
35 * LPCyE Enable LPC channel y
36 * IBFIEy Input Buffer Full IRQ Enable for LPC channel y
37 * IRQxEy Assert SerIRQ x for LPC channel y (Deprecated, use IDyIRQX, IRQXEy)
38 * IDyIRQX Use the specified 4-bit SerIRQ for LPC channel y
39 * SELyIRQX SerIRQ polarity for LPC channel y (low: 0, high: 1)
[all …]
/Linux-v5.15/arch/arm/boot/dts/
Daspeed-bmc-amd-ethanolx.dts1 // SPDX-License-Identifier: GPL-2.0
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
11 compatible = "amd,ethanolx-bmc", "aspeed,ast2500";
14 reg = <0x80000000 0x20000000>;
17 reserved-memory {
18 #address-cells = <1>;
19 #size-cells = <1>;
25 compatible = "shared-dma-pool";
[all …]
Daspeed-bmc-asrock-e3c246d4i.dts1 // SPDX-License-Identifier: GPL-2.0+
2 /dts-v1/;
4 #include "aspeed-g5.dtsi"
5 #include <dt-bindings/gpio/aspeed-gpio.h>
6 #include <dt-bindings/i2c/i2c.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
11 compatible = "asrock,e3c246d4i-bmc", "aspeed,ast2500";
18 stdout-path = &uart5;
23 reg = <0x80000000 0x20000000>;
27 compatible = "gpio-leds";
[all …]
Daspeed-bmc-facebook-elbert.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "ast2600-facebook-netbmc-common.dtsi"
10 compatible = "facebook,elbert-bmc", "aspeed,ast2600";
19 * 8 child channels of PCA9548 2-0075.
31 * 8 child channels of PCA9548 5-0075.
44 stdout-path = &uart5;
47 spi_gpio: spi-gpio {
48 num-chipselects = <1>;
49 cs-gpios = <&gpio0 ASPEED_GPIO(X, 0) GPIO_ACTIVE_LOW>;
[all …]
Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
[all …]
Daspeed-bmc-facebook-tiogapass.dts1 // SPDX-License-Identifier: GPL-2.0+
4 /dts-v1/;
6 #include "aspeed-g5.dtsi"
7 #include <dt-bindings/gpio/aspeed-gpio.h>
8 #include <dt-bindings/i2c/i2c.h>
12 compatible = "facebook,tiogapass-bmc", "aspeed,ast2500";
39 stdout-path = &uart5;
44 reg = <0x80000000 0x20000000>;
47 iio-hwmon {
48 compatible = "iio-hwmon";
[all …]
Daspeed-g4.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
9 interrupt-parent = <&vic>;
35 #address-cells = <1>;
36 #size-cells = <0>;
39 compatible = "arm,arm926ej-s";
41 reg = <0>;
47 reg = <0x40000000 0>;
[all …]
Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
42 reg = <0>;
[all …]
Daspeed-bmc-inspur-nf5280m6.dts1 // SPDX-License-Identifier: GPL-2.0
3 /dts-v1/;
5 #include "aspeed-g5.dtsi"
6 #include <dt-bindings/gpio/aspeed-gpio.h>
7 #include <dt-bindings/i2c/i2c.h>
8 #include <dt-bindings/leds/leds-pca955x.h>
12 compatible = "inspur,nf5280m6-bmc", "aspeed,ast2500";
15 stdout-path = &uart5;
20 reg = <0x80000000 0x40000000>;
23 reserved-memory {
[all …]
Dnuvoton-common-npcm7xx.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 #include <dt-bindings/interrupt-controller/arm-gic.h>
6 #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>
7 #include <dt-bindings/reset/nuvoton,npcm7xx-reset.h>
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&gic>;
16 compatible = "fixed-clock";
17 #clock-cells = <0>;
18 clock-frequency = <25000000>;
[all …]
/Linux-v5.15/Documentation/devicetree/bindings/pinctrl/
Daspeed,ast2500-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2500-scu", "syscon", "simple-mfd"
18 "aspeed,g5-scu", "syscon", "simple-mfd"
25 const: aspeed,ast2500-pinctrl
26 reg:
[all …]
/Linux-v5.15/drivers/tty/serial/8250/
D8250_aspeed_vuart.c1 // SPDX-License-Identifier: GPL-2.0+
61 * at what IO port and interrupt number the host side will appear
62 * to the host on the Host <-> BMC LPC bus. It could be different on a
66 static inline u8 aspeed_vuart_readb(struct aspeed_vuart *vuart, u8 reg) in aspeed_vuart_readb() argument
68 return readb(vuart->port->port.membase + reg); in aspeed_vuart_readb()
71 static inline void aspeed_vuart_writeb(struct aspeed_vuart *vuart, u8 val, u8 reg) in aspeed_vuart_writeb() argument
73 writeb(val, vuart->port->port.membase + reg); in aspeed_vuart_writeb()
85 return snprintf(buf, PAGE_SIZE - 1, "0x%x\n", addr); in lpc_address_show()
91 return -EINVAL; in aspeed_vuart_set_lpc_address()
121 u8 reg; in sirq_show() local
[all …]
/Linux-v5.15/drivers/gpu/drm/gma500/
Doaktrail_lvds_i2c.c2 * Copyright (c) 2002-2010, Intel Corporation.
27 #include <linux/i2c-algo-bit.h>
30 #include <linux/io.h>
41 * LPC GPIO based I2C bus for LVDS of Atom E6xx
44 /*-----------------------------------------------------------------------------
45 * LPC Register Offsets. Used for LVDS GPIO Bit Bashing. Registers are part
47 ----------------------------------------------------------------------------*/
63 #define LPC_READ_REG(chan, r) inl((chan)->reg + (r))
64 #define LPC_WRITE_REG(chan, r, val) outl((val), (chan)->reg + (r))
134 struct drm_device *dev = encoder->dev; in oaktrail_lvds_i2c_init()
[all …]
/Linux-v5.15/drivers/reset/
Dreset-simple.c1 // SPDX-License-Identifier: GPL-2.0-or-later
11 * Maxime Ripard <maxime.ripard@free-electrons.com>
17 #include <linux/io.h>
21 #include <linux/reset-controller.h>
22 #include <linux/reset/reset-simple.h>
39 u32 reg; in reset_simple_update() local
41 spin_lock_irqsave(&data->lock, flags); in reset_simple_update()
43 reg = readl(data->membase + (bank * reg_width)); in reset_simple_update()
44 if (assert ^ data->active_low) in reset_simple_update()
45 reg |= BIT(offset); in reset_simple_update()
[all …]
/Linux-v5.15/arch/powerpc/kernel/
Dlegacy_serial.c1 // SPDX-License-Identifier: GPL-2.0
11 #include <asm/io.h>
16 #include <asm/pci-bridge.h>
17 #include <asm/ppc-pci.h>
43 {.type = "tsi-bridge",},
46 {.compatible = "simple-bus",},
47 {.compatible = "wrs,epld-localbus",},
52 static int legacy_serial_console = -1;
60 offset = offset << p->regshift; in tsi_serial_in()
62 tmp = readl(p->membase + (UART_IIR & ~3)); in tsi_serial_in()
[all …]
/Linux-v5.15/drivers/edac/
Damd8111_edac.c1 // SPDX-License-Identifier: GPL-2.0-only
18 #include <asm/io.h>
37 static int edac_pci_read_dword(struct pci_dev *dev, int reg, u32 *val32) in edac_pci_read_dword() argument
41 ret = pci_read_config_dword(dev, reg, val32); in edac_pci_read_dword()
44 " PCI Access Read Error at 0x%x\n", reg); in edac_pci_read_dword()
49 static void edac_pci_read_byte(struct pci_dev *dev, int reg, u8 *val8) in edac_pci_read_byte() argument
53 ret = pci_read_config_byte(dev, reg, val8); in edac_pci_read_byte()
56 " PCI Access Read Error at 0x%x\n", reg); in edac_pci_read_byte()
59 static void edac_pci_write_dword(struct pci_dev *dev, int reg, u32 val32) in edac_pci_write_dword() argument
63 ret = pci_write_config_dword(dev, reg, val32); in edac_pci_write_dword()
[all …]
/Linux-v5.15/drivers/watchdog/
Dit8712f_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright (c) 2006-2007 Jorge Boncompte - DTI2 <jorge@dti2.net>
11 * IT8712F EC-LPC I/O Preliminary Specification 0.8.2
12 * IT8712F EC-LPC I/O Preliminary Specification 0.9.3
16 * software is provided AS-IS with no warranties.
31 #include <linux/io.h>
36 MODULE_AUTHOR("Jorge Boncompte - DTI2 <jorge@dti2.net>");
53 /* Dog Food address - We use the game port address */
56 #define REG 0x2e /* The register to read/write */ macro
92 static int superio_inb(int reg) in superio_inb() argument
[all …]
Dit87_wdt.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * for ITE IT87xx Environment Control - Low Pin Count Input / Output
12 * Data-sheets: Publicly available at the ITE website
24 #include <linux/io.h>
38 /* IO Ports */
39 #define REG 0x2e macro
108 * Try to reserve REG and REG + 1 for exclusive access. in superio_enter()
110 if (!request_muxed_region(REG, 2, WATCHDOG_NAME)) in superio_enter()
111 return -EBUSY; in superio_enter()
113 outb(0x87, REG); in superio_enter()
[all …]
/Linux-v5.15/drivers/clk/st/
Dclk-flexgen.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * clk-flexgen.c
5 * Copyright (C) ST-Microelectronics SA 2013
6 * Author: Maxime Coquelin <maxime.coquelin@st.com> for ST-Microelectronics.
10 #include <linux/clk-provider.h>
13 #include <linux/io.h>
36 /* Pre-divisor's gate */
38 /* Pre-divisor */
56 struct clk_hw *pgate_hw = &flexgen->pgate.hw; in flexgen_enable()
57 struct clk_hw *fgate_hw = &flexgen->fgate.hw; in flexgen_enable()
[all …]
/Linux-v5.15/drivers/mcb/
Dmcb-parse.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/io.h>
9 #include "mcb-internal.h"
52 return -ENOMEM; in chameleon_parse_gdd()
54 reg1 = readl(&gdd->reg1); in chameleon_parse_gdd()
55 reg2 = readl(&gdd->reg2); in chameleon_parse_gdd()
56 offset = readl(&gdd->offset); in chameleon_parse_gdd()
57 size = readl(&gdd->size); in chameleon_parse_gdd()
59 mdev->id = GDD_DEV(reg1); in chameleon_parse_gdd()
60 mdev->rev = GDD_REV(reg1); in chameleon_parse_gdd()
[all …]
/Linux-v5.15/drivers/hwmon/
Dit87.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * it87.c - Part of lm_sensors, Linux kernel modules for hardware
6 * The IT8705F is an LPC-based Super I/O part that contains UARTs, a
14 * Supports: IT8603E Super I/O chip w/LPC interface
15 * IT8620E Super I/O chip w/LPC interface
16 * IT8622E Super I/O chip w/LPC interface
17 * IT8623E Super I/O chip w/LPC interface
18 * IT8628E Super I/O chip w/LPC interface
19 * IT8705F Super I/O chip w/LPC interface
20 * IT8712F Super I/O chip w/LPC interface
[all …]
/Linux-v5.15/drivers/i2c/busses/
Di2c-mlxcpld.c1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0
5 * Copyright (C) 2016-2020 Mellanox Technologies
11 #include <linux/io.h>
32 /* LPC I2C registers */
43 /* LPC I2C masks and parametres */
82 for (i = 0; i < len - len % 4; i += 4) in mlxcpld_i2c_lpc_write_buf()
92 for (i = 0; i < len - len % 4; i += 4) in mlxcpld_i2c_lpc_read_buf()
101 u32 addr = priv->base_addr + offs; in mlxcpld_i2c_read_comm()
126 u32 addr = priv->base_addr + offs; in mlxcpld_i2c_write_comm()
150 * Returns 0 if OK, other - in case of invalid parameters.
[all …]

12