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/Linux-v5.10/Documentation/fb/
Dviafb.modes14 # Scan Frequency 31.469 kHz 59.94 Hz
29 # D: 25.175 MHz, H: 31.469 kHz, V: 59.94 Hz
32 # D: 24.823 MHz, H: 39.780 kHz, V: 60.00 Hz
39 # Scan Frequency 37.500 kHz 75.00 Hz
53 # D: 31.50 MHz, H: 37.500 kHz, V: 75.00 Hz
60 # Scan Frequency 43.269 kHz 85.00 Hz
74 # D: 36.000 MHz, H: 43.269 kHz, V: 85.00 Hz
81 # Scan Frequency 50.900 kHz 100.00 Hz
95 # D: 43.163 MHz, H: 50.900 kHz, V: 100.00 Hz
102 # Scan Frequency 61.800 kHz 120.00 Hz
[all …]
/Linux-v5.10/sound/ppc/
Dawacs.h112 #define SAMPLERATE_48000 (0x0 << 3) /* 48 or 44.1 kHz */
113 #define SAMPLERATE_32000 (0x1 << 3) /* 32 or 29.4 kHz */
114 #define SAMPLERATE_24000 (0x2 << 3) /* 24 or 22.05 kHz */
115 #define SAMPLERATE_19200 (0x3 << 3) /* 19.2 or 17.64 kHz */
116 #define SAMPLERATE_16000 (0x4 << 3) /* 16 or 14.7 kHz */
117 #define SAMPLERATE_12000 (0x5 << 3) /* 12 or 11.025 kHz */
118 #define SAMPLERATE_9600 (0x6 << 3) /* 9.6 or 8.82 kHz */
119 #define SAMPLERATE_8000 (0x7 << 3) /* 8 or 7.35 kHz */
172 #define RATE_48000 (0x0 << 8) /* 48 kHz */
173 #define RATE_44100 (0x0 << 8) /* 44.1 kHz */
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/Linux-v5.10/include/sound/
Dasoundef.h27 #define IEC958_AES0_PRO_FS_44100 (1<<6) /* 44.1kHz */
28 #define IEC958_AES0_PRO_FS_48000 (2<<6) /* 48kHz */
29 #define IEC958_AES0_PRO_FS_32000 (3<<6) /* 32kHz */
114 #define IEC958_AES3_CON_FS_44100 (0<<0) /* 44.1kHz */
116 #define IEC958_AES3_CON_FS_48000 (2<<0) /* 48kHz */
117 #define IEC958_AES3_CON_FS_32000 (3<<0) /* 32kHz */
118 #define IEC958_AES3_CON_FS_22050 (4<<0) /* 22.05kHz */
119 #define IEC958_AES3_CON_FS_24000 (6<<0) /* 24kHz */
120 #define IEC958_AES3_CON_FS_88200 (8<<0) /* 88.2kHz */
121 #define IEC958_AES3_CON_FS_768000 (9<<0) /* 768kHz */
[all …]
Demu10k1.h178 #define HCFG_BAUD_RATE 0x00080000 /* 0 = 48kHz, 1 = 44.1kHz */
587 #define ADCCR_SAMPLERATE_48 0x00000000 /* 48kHz sample rate */
588 #define ADCCR_SAMPLERATE_44 0x00000001 /* 44.1kHz sample rate */
589 #define ADCCR_SAMPLERATE_32 0x00000002 /* 32kHz sample rate */
590 #define ADCCR_SAMPLERATE_24 0x00000003 /* 24kHz sample rate */
591 #define ADCCR_SAMPLERATE_22 0x00000004 /* 22.05kHz sample rate */
592 #define ADCCR_SAMPLERATE_16 0x00000005 /* 16kHz sample rate */
593 #define ADCCR_SAMPLERATE_11 0x00000006 /* 11.025kHz sample rate */
594 #define ADCCR_SAMPLERATE_8 0x00000007 /* 8kHz sample rate */
595 #define A_ADCCR_SAMPLERATE_12 0x00000006 /* 12kHz sample rate */
[all …]
Ddesignware_i2s.h16 * @sample_rate: sampling frequency (8Khz, 16Khz, 32Khz, 44Khz, 48Khz)
/Linux-v5.10/Documentation/devicetree/bindings/sound/
Dti,j721e-cpb-audio.yaml16 In order to support 48KHz and 44.1KHz family of sampling rates the parent
17 clock for AUDIO_REFCLK2 needs to be changed between PLL4 (for 48KHz) and
18 PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via
22 48KHz family:
26 44.1KHz family:
31 48KHz family:
84 - description: Parent for CPB_McASP auxclk (for 48KHz)
85 - description: Parent for CPB_McASP auxclk (for 44.1KHz)
87 - description: Parent for CPB_SCKI clock (for 48KHz)
88 - description: Parent for CPB_SCKI clock (for 44.1KHz)
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Dti,j721e-cpb-ivi-audio.yaml21 In order to support 48KHz and 44.1KHz family of sampling rates the parent clock
22 for AUDIO_REFCLK0 needs to be changed between PLL4 (for 48KHz) and PLL15 (for
23 44.1KHz). The same PLLs are used for McASP0's AUXCLK clock via different
28 Clocking setup for 48KHz family:
35 Clocking setup for 44.1KHz family:
74 - description: Parent for CPB_McASP auxclk (for 48KHz)
75 - description: Parent for CPB_McASP auxclk (for 44.1KHz)
77 - description: Parent for CPB_SCKI clock (for 48KHz)
78 - description: Parent for CPB_SCKI clock (for 44.1KHz)
80 - description: Parent for IVI_McASP auxclk (for 48KHz)
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/Linux-v5.10/drivers/gpu/drm/amd/display/include/
Dgrph_object_ctrl_defs.h128 uint32_t pixel_clk; /* in KHz */
160 uint32_t crystal_frequency; /* in KHz */
161 uint32_t min_input_pxl_clk_pll_frequency; /* in KHz */
162 uint32_t max_input_pxl_clk_pll_frequency; /* in KHz */
163 uint32_t min_output_pxl_clk_pll_frequency; /* in KHz */
164 uint32_t max_output_pxl_clk_pll_frequency; /* in KHz */
172 uint32_t default_display_engine_pll_frequency; /* in KHz */
173 uint32_t external_clock_source_frequency_for_dp; /* in KHz */
174 uint32_t smu_gpu_pll_output_freq; /* in KHz */
177 uint32_t default_memory_clk; /* in KHz */
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/Linux-v5.10/Documentation/devicetree/bindings/clock/
Dlpc1850-creg-clk.txt5 32 kHz oscillator driver with power up/down and clock gating. Next
6 is a fixed divider that creates a 1 kHz clock from the 32 kHz osc.
9 The 32 kHz can also be routed to other peripherials to enable low
21 Shall contain a phandle to the fixed 32 kHz crystal.
28 0 1 kHz clock
29 1 32 kHz Oscillator
/Linux-v5.10/drivers/video/fbdev/core/
Dmodedb.c38 /* 640x400 @ 70 Hz, 31.5 kHz hsync */
42 /* 640x480 @ 60 Hz, 31.5 kHz hsync */
46 /* 800x600 @ 56 Hz, 35.15 kHz hsync */
50 /* 1024x768 @ 87 Hz interlaced, 35.5 kHz hsync */
54 /* 640x400 @ 85 Hz, 37.86 kHz hsync */
58 /* 640x480 @ 72 Hz, 36.5 kHz hsync */
62 /* 640x480 @ 75 Hz, 37.50 kHz hsync */
66 /* 800x600 @ 60 Hz, 37.8 kHz hsync */
71 /* 640x480 @ 85 Hz, 43.27 kHz hsync */
75 /* 1152x864 @ 89 Hz interlaced, 44 kHz hsync */
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/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
Dnv40.c47 u32 ref = 27000, khz = 0; in read_pll_1() local
50 khz = ref * N / M; in read_pll_1()
52 return khz >> P; in read_pll_1()
66 u32 ref = 27000, khz = 0; in read_pll_2() local
69 khz = ref * N1 / M1; in read_pll_2()
72 khz = khz * N2 / M2; in read_pll_2()
74 khz = 0; in read_pll_2()
78 return khz >> P; in read_pll_2()
124 nv40_clk_calc_pll(struct nv40_clk *clk, u32 reg, u32 khz, in nv40_clk_calc_pll() argument
135 if (khz < pll.vco1.max_freq) in nv40_clk_calc_pll()
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Dgt215.c187 gt215_clk_info(struct nvkm_clk *base, int idx, u32 khz, in gt215_clk_info() argument
196 switch (khz) { in gt215_clk_info()
199 return khz; in gt215_clk_info()
202 return khz; in gt215_clk_info()
205 return khz; in gt215_clk_info()
208 sdiv = min((sclk * 2) / khz, (u32)65); in gt215_clk_info()
210 diff = ((khz + 3000) - oclk); in gt215_clk_info()
235 gt215_pll_info(struct nvkm_clk *base, int idx, u32 pll, u32 khz, in gt215_pll_info() argument
248 ret = gt215_clk_info(&clk->base, idx, khz, info); in gt215_pll_info()
249 diff = khz - ret; in gt215_pll_info()
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/Linux-v5.10/drivers/media/dvb-frontends/
Dtda8261.h12 TDA8261_STEP_2000 = 0, /* 2000 kHz */
13 TDA8261_STEP_1000, /* 1000 kHz */
14 TDA8261_STEP_500, /* 500 kHz */
15 TDA8261_STEP_250, /* 250 kHz */
16 TDA8261_STEP_125 /* 125 kHz */
Dmxl5xx_defs.h400 MXL_HYDRA_STEP_SIZE_24_XTAL_102_05KHZ, /* 102.05 KHz for 24 MHz XTAL */
401 MXL_HYDRA_STEP_SIZE_24_XTAL_204_10KHZ, /* 204.10 KHz for 24 MHz XTAL */
402 MXL_HYDRA_STEP_SIZE_24_XTAL_306_15KHZ, /* 306.15 KHz for 24 MHz XTAL */
403 MXL_HYDRA_STEP_SIZE_24_XTAL_408_20KHZ, /* 408.20 KHz for 24 MHz XTAL */
405 MXL_HYDRA_STEP_SIZE_27_XTAL_102_05KHZ, /* 102.05 KHz for 27 MHz XTAL */
406 MXL_HYDRA_STEP_SIZE_27_XTAL_204_35KHZ, /* 204.35 KHz for 27 MHz XTAL */
407 MXL_HYDRA_STEP_SIZE_27_XTAL_306_52KHZ, /* 306.52 KHz for 27 MHz XTAL */
408 MXL_HYDRA_STEP_SIZE_27_XTAL_408_69KHZ, /* 408.69 KHz for 27 MHz XTAL */
704 MXL_HYDRA_DISEQC_CARRIER_FREQ_22KHZ = 0, /* DiSEqC signal frequency of 22 KHz */
705 MXL_HYDRA_DISEQC_CARRIER_FREQ_33KHZ, /* DiSEqC signal frequency of 33 KHz */
[all …]
/Linux-v5.10/Documentation/sound/cards/
Daudiophile-usb.rst48 * sample rate from 8kHz to 96kHz
57 * 16-bit/48kHz ==> 4 channels in + 4 channels out
61 * 24-bit/48kHz ==> 4 channels in + 2 channels out,
66 * 24-bit/96kHz ==> 2 channels in _or_ 2 channels out (half duplex only)
197 - 16bits 48kHz mode with Di disabled
204 - 16bits 48kHz mode with Di enabled
234 - 24bits 48kHz mode with Di disabled
241 - 24bits 48kHz mode with Di enabled
249 - 24bits 96kHz mode
266 - 16bits 48kHz mode with only the Do port enabled
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/Linux-v5.10/arch/x86/kernel/cpu/
Daperfmperf.c3 * x86 APERF/MPERF KHz calculation for
21 unsigned int khz; member
37 * calculate kHz, save snapshot
64 s->khz = div64_u64((cpu_khz * aperf_delta), mperf_delta); in aperfmperf_snapshot_khz()
93 return per_cpu(samples.khz, cpu); in aperfmperf_get_khz()
131 return per_cpu(samples.khz, cpu); in arch_freq_get_on_cpu()
136 return per_cpu(samples.khz, cpu); in arch_freq_get_on_cpu()
/Linux-v5.10/Documentation/i2c/busses/
Di2c-ismt.rst21 Specify the bus speed in kHz.
27 80 kHz
28 100 kHz
29 400 kHz
30 1000 kHz
/Linux-v5.10/include/linux/
Dclocksource.h156 * clocksource_khz2mult - calculates mult from khz and shift
157 * @khz: Clocksource frequency in KHz
160 * Helper functions that converts a khz counter frequency to a timsource
163 static inline u32 clocksource_khz2mult(u32 khz, u32 shift_constant) in clocksource_khz2mult() argument
165 return clocksource_freq2mult(khz, shift_constant, NSEC_PER_MSEC); in clocksource_khz2mult()
219 * clocksource_register_hz/khz
240 static inline int clocksource_register_khz(struct clocksource *cs, u32 khz) in clocksource_register_khz() argument
242 return __clocksource_register_scale(cs, 1000, khz); in clocksource_register_khz()
250 static inline void __clocksource_update_freq_khz(struct clocksource *cs, u32 khz) in __clocksource_update_freq_khz() argument
252 __clocksource_update_freq_scale(cs, 1000, khz); in __clocksource_update_freq_khz()
/Linux-v5.10/drivers/cpufreq/
Dpowernow-k6.c26 static unsigned int busfreq; /* FSB, in 10 kHz */
36 MODULE_PARM_DESC(bus_frequency, "Bus frequency in kHz");
157 unsigned khz; in powernow_k6_cpu_init() local
163 khz = cpu_khz; in powernow_k6_cpu_init()
165 if (khz >= usual_frequency_table[i].freq - FREQ_RANGE && in powernow_k6_cpu_init()
166 khz <= usual_frequency_table[i].freq + FREQ_RANGE) { in powernow_k6_cpu_init()
167 khz = usual_frequency_table[i].freq; in powernow_k6_cpu_init()
184 khz); in powernow_k6_cpu_init()
197 pr_err("invalid bus_frequency parameter, allowed range 50000 - 150000 kHz\n"); in powernow_k6_cpu_init()
201 busfreq = khz / max_multiplier; in powernow_k6_cpu_init()
/Linux-v5.10/arch/arm/mach-omap1/
Dtimer32k.c61 * 32KHz OS timer
64 * 32KHz synchronous timer. The 32KHz synchronous timer is used to keep track
65 * of time in addition to the 32KHz OS timer. Using only the 32KHz OS timer
67 * with the 32KHz synchronized timer.
154 IRQF_TIMER | IRQF_IRQPOLL, "32KHz timer", NULL)) in omap_init_32k_timer()
155 pr_err("Failed to request irq %d(32KHz timer)\n", INT_OS_TIMER); in omap_init_32k_timer()
/Linux-v5.10/sound/pci/ca0106/
Dca0106.h144 * bit 12 0 = 48 Khz / 1 = 96 Khz Analog out on SB Live 24bit.
203 * Playback rate [23:16] (2 bits per channel) (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
232 #define SPCS_SAMPLERATE_44 0x00000000 /* 44.1kHz sample rate */
233 #define SPCS_SAMPLERATE_48 0x02000000 /* 48kHz sample rate */
234 #define SPCS_SAMPLERATE_32 0x03000000 /* 32kHz sample rate */
407 /* Estimated sample rate [19:0] Relative to 48kHz. 0x8000 = 1.0
416 * Sample output rate [1:0] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
417 * Sample input rate [3:2] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
419 * Record rate [9:8] (0=48kHz, 1=Not available, 2=96kHz, 3=192Khz)
421 * I2S input rate master mode [15:14] (0=48kHz, 1=44.1kHz, 2=96kHz, 3=192Khz)
[all …]
/Linux-v5.10/arch/arm/plat-omap/
DKconfig72 timer provides more intra-tick resolution than the 32KHz timer,
76 bool "Use 32KHz timer"
80 Select this option if you want to enable the OMAP 32KHz timer.
82 support for no tick during idle. The 32KHz timer provides less
83 intra-tick resolution than OMAP_MPU_TIMER. The 32KHz timer is
/Linux-v5.10/drivers/gpu/drm/radeon/
Datombios.h445 ULONG ulClockFreq:24; // in unit of 10kHz
447 ULONG ulClockFreq:24; // in unit of 10kHz
584 ULONG ulTargetEngineClock; //In 10Khz unit
589 ULONG ulTargetEngineClock; //In 10Khz unit
598 ULONG ulTargetMemoryClock; //In 10Khz unit
603 ULONG ulTargetMemoryClock; //In 10Khz unit
612 ULONG ulDefaultEngineClock; //In 10Khz unit
613 ULONG ulDefaultMemoryClock; //In 10Khz unit
676 USHORT usPixelClock; // in 10KHz; for bios convenient
692 USHORT usPixelClock; // in 10KHz; for bios convenient
[all …]
/Linux-v5.10/Documentation/arm/sunxi/
Dclocks.rst18 24MHz 32kHz
26 When you are about to suspend, you switch the CPU Mux to the 32kHz
29 24Mhz 32kHz
39 32kHz
/Linux-v5.10/drivers/gpu/drm/amd/include/
Datombios.h479 ULONG ulClockFreq:24; // in unit of 10kHz
481 ULONG ulClockFreq:24; // in unit of 10kHz
687 ULONG ulTargetEngineClock; //In 10Khz unit
692 ULONG ulTargetEngineClock; //In 10Khz unit
698 ULONG ulTargetEngineClock; //In 10Khz unit
708 ULONG ulTargetMemoryClock; //In 10Khz unit
713 ULONG ulTargetMemoryClock; //In 10Khz unit
722 ULONG ulDefaultEngineClock; //In 10Khz unit
723 ULONG ulDefaultMemoryClock; //In 10Khz unit
740 ASIC_INIT_CLOCK_PARAMETERS asSclkClock; //In 10Khz unit
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