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/Linux-v5.10/arch/mips/boot/dts/ingenic/
Djz4740.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4740-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
8 compatible = "ingenic,jz4740";
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
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Djz4725b.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4725b-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-mxu1.0";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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Djz4770.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4770-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
6 #address-cells = <1>;
7 #size-cells = <1>;
11 #address-cells = <1>;
12 #size-cells = <0>;
16 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
20 clock-names = "cpu";
24 cpuintc: interrupt-controller {
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Djz4780.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/clock/jz4780-cgu.h>
3 #include <dt-bindings/clock/ingenic,tcu.h>
4 #include <dt-bindings/dma/jz4780-dma.h>
7 #address-cells = <1>;
8 #size-cells = <1>;
12 #address-cells = <1>;
13 #size-cells = <0>;
17 compatible = "ingenic,xburst-fpu1.0-mxu1.1";
21 clock-names = "cpu";
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/Linux-v5.10/Documentation/devicetree/bindings/rtc/
Dingenic,rtc.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/rtc/ingenic,rtc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Ingenic SoCs Real-Time Clock DT bindings
10 - Paul Cercueil <paul@crapouillou.net>
13 - $ref: rtc.yaml#
18 - enum:
19 - ingenic,jz4740-rtc
20 - ingenic,jz4760-rtc
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/Linux-v5.10/drivers/rtc/
Drtc-jz4740.c1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2009-2010, Lars-Peter Clausen <lars@metafoo.de>
5 * JZ4740 SoC RTC driver
16 #include <linux/rtc.h>
57 struct rtc_device *rtc; member
64 static inline uint32_t jz4740_rtc_reg_read(struct jz4740_rtc *rtc, size_t reg) in jz4740_rtc_reg_read() argument
66 return readl(rtc->base + reg); in jz4740_rtc_reg_read()
69 static int jz4740_rtc_wait_write_ready(struct jz4740_rtc *rtc) in jz4740_rtc_wait_write_ready() argument
75 ctrl = jz4740_rtc_reg_read(rtc, JZ_REG_RTC_CTRL); in jz4740_rtc_wait_write_ready()
76 } while (!(ctrl & JZ_RTC_CTRL_WRDY) && --timeout); in jz4740_rtc_wait_write_ready()
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
3 # Makefile for RTC class/drivers.
6 ccflags-$(CONFIG_RTC_DEBUG) := -DDEBUG
8 obj-$(CONFIG_RTC_LIB) += lib.o
9 obj-$(CONFIG_RTC_SYSTOHC) += systohc.o
10 obj-$(CONFIG_RTC_CLASS) += rtc-core.o
11 obj-$(CONFIG_RTC_MC146818_LIB) += rtc-mc146818-lib.o
12 rtc-core-y := class.o interface.o
14 rtc-core-$(CONFIG_RTC_NVMEM) += nvmem.o
15 rtc-core-$(CONFIG_RTC_INTF_DEV) += dev.o
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # RTC class/drivers configuration
19 Generic RTC class support. If you say yes here, you will
26 bool "Set system time from RTC on startup and resume"
30 the value read from a specified RTC device. This is useful to avoid
34 string "RTC used to set the system time"
38 The RTC device that will be used to (re)initialize the system
44 This clock should be battery-backed, so that it reads the correct
45 time when the system boots from a power-off state. Otherwise, your
50 sleep states. Do not specify an RTC here unless it stays powered
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/Linux-v5.10/Documentation/devicetree/bindings/timer/
Dingenic,tcu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
11 Documentation/mips/ingenic-tcu.rst.
14 - Paul Cercueil <paul@crapouillou.net>
21 - ingenic,jz4740-tcu
22 - ingenic,jz4725b-tcu
23 - ingenic,jz4770-tcu
24 - ingenic,jz4780-tcu
25 - ingenic,x1000-tcu
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/Linux-v5.10/Documentation/devicetree/bindings/clock/
Dingenic,cgu.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The CGU in an Ingenic SoC provides all the clocks generated on-chip. It
16 - Paul Cercueil <paul@crapouillou.net>
23 - ingenic,jz4740-cgu
24 - ingenic,jz4725b-cgu
25 - ingenic,jz4770-cgu
26 - ingenic,jz4780-cgu
27 - ingenic,x1000-cgu
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/Linux-v5.10/Documentation/mips/
Dingenic-tcu.rst1 .. SPDX-License-Identifier: GPL-2.0
7 The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
11 - JZ4725B, JZ4750, JZ4755 only have six TCU channels. The other SoCs all
14 - JZ4725B introduced a separate channel, called Operating System Timer
15 (OST). It is a 32-bit programmable timer. On JZ4760B and above, it is
16 64-bit.
18 - Each one of the TCU channels has its own clock, which can be reparented to three
19 different clocks (pclk, ext, rtc), gated, and reclocked, through their TCSR register.
21 - The watchdog and OST hardware blocks also feature a TCSR register with the same
23 - The TCU registers used to gate/ungate can also gate/ungate the watchdog and
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/Linux-v5.10/drivers/clk/ingenic/
Djz4740-cgu.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4740 SoC CGU driver
9 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/jz4740-cgu.h>
51 0x0, 0x1, -1, 0x3,
67 [JZ4740_CLK_RTC] = { "rtc", CGU_CLK_EXT },
71 .parents = { JZ4740_CLK_EXT, -1, -1, -1 },
96 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
98 CGU_REG_CPCCR, 21, 1, 1, -1, -1, -1,
105 .parents = { JZ4740_CLK_PLL, -1, -1, -1 },
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Dtcu.c1 // SPDX-License-Identifier: GPL-2.0
8 #include <linux/clk-provider.h>
10 #include <linux/mfd/ingenic-tcu.h>
16 #include <dt-bindings/clock/ingenic,tcu.h>
22 #define pr_fmt(fmt) "ingenic-tcu-clk: " fmt
67 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_enable()
68 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_enable()
70 regmap_write(tcu->map, TCU_REG_TSCR, BIT(info->gate_bit)); in ingenic_tcu_enable()
78 const struct ingenic_tcu_clk_info *info = tcu_clk->info; in ingenic_tcu_disable()
79 struct ingenic_tcu *tcu = tcu_clk->tcu; in ingenic_tcu_disable()
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/Linux-v5.10/drivers/watchdog/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
16 on-line as fast as possible after a lock-up. There's both a watchdog
21 <file:Documentation/watchdog/watchdog-api.rst> in the kernel source.
51 bool "Update boot-enabled watchdog until userspace takes over"
218 tristate "Watchdog device controlled through GPIO-line"
223 controlled through GPIO-line.
341 module will be called mlx-wdt.
375 More details: ARM DEN0029B - Server Base System Architecture (SBSA)
443 The Intel Footbridge chip contains a built-in watchdog circuit. Say Y
451 "If in doubt, leave it out" - say N.
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/Linux-v5.10/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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