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Searched +full:ipq8064 +full:- +full:mdio (Results 1 – 9 of 9) sorted by relevance

/Linux-v6.1/Documentation/devicetree/bindings/net/
Dqcom,ipq8064-mdio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/net/qcom,ipq8064-mdio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm ipq806x MDIO bus controller
10 - Ansuel Smith <ansuelsmth@gmail.com>
13 The ipq806x soc have a MDIO dedicated controller that is
17 - $ref: "mdio.yaml#"
21 const: qcom,ipq8064-mdio
30 - compatible
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/Linux-v6.1/drivers/net/mdio/
Dmdio-ipq8064.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Qualcomm IPQ8064 MDIO interface driver
47 return regmap_read_poll_timeout(priv->base, MII_ADDR_REG_ADDR, busy, in ipq8064_mdio_wait_busy()
56 struct ipq8064_mdio *priv = bus->priv; in ipq8064_mdio_read()
62 return -EOPNOTSUPP; in ipq8064_mdio_read()
67 regmap_write(priv->base, MII_ADDR_REG_ADDR, miiaddr); in ipq8064_mdio_read()
74 regmap_read(priv->base, MII_DATA_REG_ADDR, &ret_val); in ipq8064_mdio_read()
82 struct ipq8064_mdio *priv = bus->priv; in ipq8064_mdio_write()
86 return -EOPNOTSUPP; in ipq8064_mdio_write()
88 regmap_write(priv->base, MII_DATA_REG_ADDR, data); in ipq8064_mdio_write()
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DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
3 # MDIO Layer Configuration
7 tristate "MDIO bus device drivers"
9 MDIO devices and driver infrastructure code.
20 loadable module or built-in.
27 FWNODE MDIO bus (Ethernet PHY) accessors
35 OpenFirmware MDIO bus (Ethernet PHY) accessors
42 ACPI MDIO bus (Ethernet PHY) accessors
50 tristate "Allwinner sun4i MDIO interface support"
53 This driver supports the MDIO interface found in the network
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DMakefile1 # SPDX-License-Identifier: GPL-2.0
2 # Makefile for Linux MDIO bus drivers
4 obj-$(CONFIG_ACPI_MDIO) += acpi_mdio.o
5 obj-$(CONFIG_FWNODE_MDIO) += fwnode_mdio.o
6 obj-$(CONFIG_OF_MDIO) += of_mdio.o
8 obj-$(CONFIG_MDIO_ASPEED) += mdio-aspeed.o
9 obj-$(CONFIG_MDIO_BCM_IPROC) += mdio-bcm-iproc.o
10 obj-$(CONFIG_MDIO_BCM_UNIMAC) += mdio-bcm-unimac.o
11 obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o
12 obj-$(CONFIG_MDIO_CAVIUM) += mdio-cavium.o
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/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,ipq8064-pinctrl.txt1 Qualcomm IPQ8064 TLMM block
4 - compatible: "qcom,ipq8064-pinctrl"
5 - reg: Should be the base address and length of the TLMM block.
6 - interrupts: Should be the parent IRQ of the TLMM block.
7 - interrupt-controller: Marks the device node as an interrupt controller.
8 - #interrupt-cells: Should be two.
9 - gpio-controller: Marks the device node as a GPIO controller.
10 - #gpio-cells : Should be two.
13 - gpio-ranges: see ../gpio/gpio.txt
17 - gpio-reserved-ranges: see ../gpio/gpio.txt
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/Linux-v6.1/drivers/pinctrl/qcom/
Dpinctrl-ipq8064.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include "pinctrl-msm.h"
222 .mux_bit = -1, \
225 .oe_bit = -1, \
226 .in_bit = -1, \
227 .out_bit = -1, \
228 .intr_enable_bit = -1, \
229 .intr_status_bit = -1, \
230 .intr_target_bit = -1, \
231 .intr_target_kpss_val = -1, \
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/Linux-v6.1/arch/arm/boot/dts/
Dqcom-ipq8064-rb3011.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-ipq8064.dtsi"
3 #include <dt-bindings/input/input.h>
4 #include <dt-bindings/leds/common.h>
7 model = "MikroTik RB3011UiAS-RM";
14 mdio-gpio0 = &mdio0;
15 mdio-gpio1 = &mdio1;
20 stdout-path = "serial0:115200n8";
28 mdio0: mdio-0 {
30 compatible = "virtual,mdio-gpio";
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Dqcom-ipq8064.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/mfd/qcom-rpm.h>
6 #include <dt-bindings/clock/qcom,rpmcc.h>
7 #include <dt-bindings/clock/qcom,gcc-ipq806x.h>
8 #include <dt-bindings/clock/qcom,lcc-ipq806x.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/reset/qcom,gcc-ipq806x.h>
11 #include <dt-bindings/soc/qcom,gsbi.h>
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/Linux-v6.1/drivers/net/dsa/qca/
Dqca8k-8xxx.c1 // SPDX-License-Identifier: GPL-2.0
4 * Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
18 #include <linux/mdio.h>
42 u16 *cached_lo = &priv->mdio_cache.lo; in qca8k_set_lo()
43 struct mii_bus *bus = priv->bus; in qca8k_set_lo()
49 ret = bus->write(bus, phy_id, regnum, lo); in qca8k_set_lo()
51 dev_err_ratelimited(&bus->dev, in qca8k_set_lo()
61 u16 *cached_hi = &priv->mdio_cache.hi; in qca8k_set_hi()
62 struct mii_bus *bus = priv->bus; in qca8k_set_hi()
68 ret = bus->write(bus, phy_id, regnum, hi); in qca8k_set_hi()
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