Searched +full:interrupt +full:- +full:names (Results 1 – 25 of 1212) sorted by relevance
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/Linux-v6.1/arch/arm/boot/dts/ |
D | s5pv210.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2013-2014 Samsung Electronics, Co. Ltd. 19 #include <dt-bindings/clock/s5pv210.h> 20 #include <dt-bindings/clock/s5pv210-audss.h> 23 #address-cells = <1>; 24 #size-cells = <1>; 45 #address-cells = <1>; 46 #size-cells = <0>; 50 compatible = "arm,cortex-a8"; 55 xxti: oscillator-0 { [all …]
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D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/marvell,mmp2.h> 7 #include <dt-bindings/power/marvell,mmp2.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 17 enable-method = "marvell,mmp3-smp"; 22 next-level-cache = <&l2>; [all …]
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D | omap2430.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 15 compatible = "ti,omap2-l4-wkup", "simple-bus"; 16 #address-cells = <1>; 17 #size-cells = <1>; 21 compatible = "ti,omap2-prcm"; 25 #address-cells = <1>; 26 #size-cells = <0>; 34 compatible = "ti,omap2-scm", "simple-bus"; 36 #address-cells = <1>; [all …]
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D | omap3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 8 #include <dt-bindings/bus/ti-sysc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/pinctrl/omap.h> 15 interrupt-parent = <&intc>; 16 #address-cells = <1>; 17 #size-cells = <1>; 33 #address-cells = <1>; [all …]
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D | hi3620.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2012-2013 HiSilicon Ltd. 6 * Copyright (C) 2012-2013 Linaro Ltd. 11 #include <dt-bindings/clock/hi3620-clock.h> 14 #address-cells = <1>; 15 #size-cells = <1>; 26 compatible = "fixed-clock"; 27 #clock-cells = <0>; 28 clock-frequency = <26000000>; 29 clock-output-names = "apb_pclk"; [all …]
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D | hisi-x5hd2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 3 * Copyright (c) 2013-2014 Linaro Ltd. 4 * Copyright (c) 2013-2014 HiSilicon Limited. 7 #include <dt-bindings/clock/hix5hd2-clock.h> 10 #address-cells = <1>; 11 #size-cells = <1>; 17 gic: interrupt-controller@f8a01000 { 18 compatible = "arm,cortex-a9-gic"; 19 #interrupt-cells = <3>; 20 #address-cells = <0>; [all …]
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D | stm32mp151.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) 3 * Copyright (C) STMicroelectronics 2017 - All Rights Reserved 6 #include <dt-bindings/interrupt-controller/arm-gic.h> 7 #include <dt-bindings/clock/stm32mp1-clks.h> 8 #include <dt-bindings/reset/stm32mp1-resets.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 19 compatible = "arm,cortex-a7"; [all …]
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D | mmp2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/marvell,mmp2.h> 8 #include <dt-bindings/power/marvell,mmp2.h> 9 #include <dt-bindings/clock/marvell,mmp2-audio.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 compatible = "simple-bus"; 28 interrupt-parent = <&intc>; [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/pci/ |
D | rockchip-pcie-host.txt | 4 - #address-cells: Address representation for root ports, set to <3> 5 - #size-cells: Size representation for root ports, set to <2> 6 - #interrupt-cells: specifies the number of cells needed to encode an 7 interrupt source. The value must be 1. 8 - compatible: Should contain "rockchip,rk3399-pcie" 9 - reg: Two register ranges as listed in the reg-names property 10 - reg-names: Must include the following names 11 - "axi-base" 12 - "apb-base" 13 - clocks: Must contain an entry for each entry in clock-names. [all …]
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D | mediatek-pcie.txt | 4 - compatible: Should contain one of the following strings: 5 "mediatek,mt2701-pcie" 6 "mediatek,mt2712-pcie" 7 "mediatek,mt7622-pcie" 8 "mediatek,mt7623-pcie" 9 "mediatek,mt7629-pcie" 10 "airoha,en7523-pcie" 11 - device_type: Must be "pci" 12 - reg: Base addresses and lengths of the root ports. 13 - reg-names: Names of the above areas to use during resource lookup. [all …]
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/Linux-v6.1/Documentation/devicetree/bindings/display/tegra/ |
D | nvidia,tegra20-host1x.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/display/tegra/nvidia,tegra20-host1x.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Thierry Reding <thierry.reding@gmail.com> 11 - Jon Hunter <jonathanh@nvidia.com> 13 description: The host1x top-level node defines a number of children, each 19 - enum: 20 - nvidia,tegra20-host1x 21 - nvidia,tegra30-host1x [all …]
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/Linux-v6.1/arch/arm64/boot/dts/hisilicon/ |
D | hi3670.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 9 #include <dt-bindings/interrupt-controller/arm-gic.h> 10 #include <dt-bindings/clock/hi3670-clock.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <2>; 25 #size-cells = <0>; 27 cpu-map { [all …]
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D | hi3660.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/clock/hi3660-clock.h> 10 #include <dt-bindings/thermal/thermal.h> 14 interrupt-parent = <&gic>; 15 #address-cells = <2>; 16 #size-cells = <2>; 19 compatible = "arm,psci-0.2"; 24 #address-cells = <2>; 25 #size-cells = <0>; [all …]
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D | hi6220.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 9 #include <dt-bindings/reset/hisi,hi6220-resets.h> 10 #include <dt-bindings/clock/hi6220-clock.h> 11 #include <dt-bindings/pinctrl/hisi.h> 12 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 21 compatible = "arm,psci-0.2"; [all …]
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D | hi3798cv200.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd. 8 #include <dt-bindings/clock/histb-clock.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #include <dt-bindings/phy/phy.h> 12 #include <dt-bindings/reset/ti-syscon.h> 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; [all …]
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/Linux-v6.1/arch/mips/boot/dts/ingenic/ |
D | jz4770.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4770-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 16 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 20 clock-names = "cpu"; 24 cpuintc: interrupt-controller { [all …]
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D | jz4780.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4780-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 4 #include <dt-bindings/dma/jz4780-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 21 clock-names = "cpu"; [all …]
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D | x1000.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/ingenic,x1000-cgu.h> 4 #include <dt-bindings/dma/x1000-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu1.0-mxu1.1"; 21 clock-names = "cpu"; [all …]
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D | jz4725b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4725b-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 16 compatible = "ingenic,xburst-mxu1.0"; 20 clock-names = "cpu"; 24 cpuintc: interrupt-controller { [all …]
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D | x1830.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,tcu.h> 3 #include <dt-bindings/clock/ingenic,x1830-cgu.h> 4 #include <dt-bindings/dma/x1830-dma.h> 7 #address-cells = <1>; 8 #size-cells = <1>; 12 #address-cells = <1>; 13 #size-cells = <0>; 17 compatible = "ingenic,xburst-fpu2.0-mxu2.0"; 21 clock-names = "cpu"; [all …]
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D | jz4740.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/clock/ingenic,jz4740-cgu.h> 3 #include <dt-bindings/clock/ingenic,tcu.h> 6 #address-cells = <1>; 7 #size-cells = <1>; 11 #address-cells = <1>; 12 #size-cells = <0>; 16 compatible = "ingenic,xburst-mxu1.0"; 20 clock-names = "cpu"; 24 cpuintc: interrupt-controller { [all …]
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/Linux-v6.1/arch/arm64/boot/dts/ti/ |
D | k3-j721s2-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2021 Texas Instruments Incorporated - https://www.ti.com/ 10 compatible = "mmio-sram"; 12 #address-cells = <1>; 13 #size-cells = <1>; 16 atf-sram@0 { 20 tifs-sram@1f0000 { 24 l3cache-sram@200000 { 29 gic500: interrupt-controller@1800000 { 30 compatible = "arm,gic-v3"; [all …]
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D | k3-j721e-main.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 5 * Copyright (C) 2016-2020 Texas Instruments Incorporated - https://www.ti.com/ 7 #include <dt-bindings/phy/phy.h> 8 #include <dt-bindings/phy/phy-ti.h> 9 #include <dt-bindings/mux/mux.h> 10 #include <dt-bindings/mux/ti-serdes.h> 13 cmn_refclk: clock-cmnrefclk { 14 #clock-cells = <0>; 15 compatible = "fixed-clock"; 16 clock-frequency = <0>; [all …]
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/Linux-v6.1/arch/arm64/boot/dts/xilinx/ |
D | zynqmp.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2014 - 2021, Xilinx, Inc. 15 #include <dt-bindings/dma/xlnx-zynqmp-dpdma.h> 16 #include <dt-bindings/power/xlnx-zynqmp-power.h> 17 #include <dt-bindings/reset/xlnx-zynqmp-resets.h> 21 #address-cells = <2>; 22 #size-cells = <2>; 25 #address-cells = <1>; 26 #size-cells = <0>; 29 compatible = "arm,cortex-a53"; [all …]
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/Linux-v6.1/arch/mips/boot/dts/brcm/ |
D | bcm6362.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 3 #include "dt-bindings/clock/bcm6362-clock.h" 4 #include "dt-bindings/reset/bcm6362-reset.h" 5 #include "dt-bindings/soc/bcm6362-pm.h" 8 #address-cells = <1>; 9 #size-cells = <1>; 13 #address-cells = <1>; 14 #size-cells = <0>; 16 mips-hpt-frequency = <200000000>; 32 periph_osc: periph-osc { [all …]
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