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/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dfsl,imx8mm-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Freescale IMX8MM IOMUX Controller
10 - Anson Huang <Anson.Huang@nxp.com>
13 Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory
18 const: fsl,imx8mm-iomuxc
37 be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last
38 integer CONFIG is the pad setting value like pull-up on this pin. Please
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mm.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mm-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/imx8mm-power.h>
11 #include <dt-bindings/reset/imx8mq-reset.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mm-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
Dimx8mm-ddr4-evk.dts1 // SPDX-License-Identifier: GPL-2.0+
6 /dts-v1/;
8 #include "imx8mm-evk.dtsi"
12 compatible = "fsl,imx8mm-ddr4-evk", "fsl,imx8mm";
15 pinctrl-0 = <&pinctrl_gpio_led_2>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&pinctrl_gpmi_nand>;
26 nand-on-flash-bbt;
30 &iomuxc {
31 pinctrl_gpmi_nand: gpmi-nand {
Dimx8mm-icore-mx8mm-ctouch2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "imx8mm.dtsi"
10 #include "imx8mm-icore-mx8mm.dtsi"
14 compatible = "engicam,icore-mx8mm-ctouch2", "engicam,icore-mx8mm",
15 "fsl,imx8mm";
18 stdout-path = &uart2;
27 clock-frequency = <400000>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_i2c2>;
[all …]
Dimx8mm-icore-mx8mm-edimm2.2.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include "imx8mm.dtsi"
10 #include "imx8mm-icore-mx8mm.dtsi"
14 compatible = "engicam,icore-mx8mm-edimm2.2", "engicam,icore-mx8mm",
15 "fsl,imx8mm";
18 stdout-path = &uart2;
27 clock-frequency = <400000>;
28 pinctrl-names = "default";
29 pinctrl-0 = <&pinctrl_i2c2>;
[all …]
Dimx8mm-venice-gw72xx-0x-imx219.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw72xx-0x", "fsl,imx8mm";
16 reg_cam: regulator-cam {
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_cam>;
19 compatible = "regulator-fixed";
20 regulator-name = "reg_cam";
[all …]
Dimx8mm-venice-gw73xx-0x-imx219.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
8 #include "imx8mm-pinfunc.h"
10 /dts-v1/;
14 compatible = "gw,imx8mm-gw73xx-0x", "fsl,imx8mm";
16 reg_cam: regulator-cam {
17 pinctrl-names = "default";
18 pinctrl-0 = <&pinctrl_reg_cam>;
19 compatible = "regulator-fixed";
20 regulator-name = "reg_cam";
[all …]
Dimx8mm-venice-gw72xx-0x-rs232-rts.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw72xx-0x";
24 gpio-hog;
26 output-low;
[all …]
Dimx8mm-venice-gw73xx-0x-rs232-rts.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
24 gpio-hog;
26 output-low;
[all …]
Dimx8mm-venice-gw72xx-0x-rs422.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
Dimx8mm-venice-gw73xx-0x-rs422.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven low (in-active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be low
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
Dimx8mm-venice-gw72xx-0x-rs485.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be pulled high
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
Dimx8mm-venice-gw73xx-0x-rs485.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 * - GPIO1_0 rs485_term selects on-chip termination
7 * - GPIO4_0 rs485_en needs to be driven high (active)
8 * - GPIO4_2 rs485_hd needs to be driven high (active)
9 * - UART4_TX is DE for RS485 transmitter
10 * - RS485_EN needs to be pulled high
11 * - RS485_HALF needs to be pulled high
14 #include <dt-bindings/gpio/gpio.h>
16 #include "imx8mm-pinfunc.h"
18 /dts-v1/;
[all …]
Dimx8mm-evk.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright 2019-2020 NXP
6 /dts-v1/;
8 #include <dt-bindings/usb/pd.h>
9 #include "imx8mm-evk.dtsi"
13 compatible = "fsl,imx8mm-evk", "fsl,imx8mm";
21 operating-points-v2 = <&ddrc_opp_table>;
23 ddrc_opp_table: opp-table {
24 compatible = "operating-points-v2";
26 opp-25M {
[all …]
Dimx93.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx93-clock.h>
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/input/input.h>
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/power/fsl,imx93-power.h>
12 #include "imx93-pinfunc.h"
15 interrupt-parent = <&gic>;
16 #address-cells = <2>;
17 #size-cells = <2>;
[all …]
Dimx8mn.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/clock/imx8mn-clock.h>
7 #include <dt-bindings/power/imx8mn-power.h>
8 #include <dt-bindings/reset/imx8mq-reset.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/arm-gic.h>
12 #include <dt-bindings/thermal/thermal.h>
14 #include "imx8mn-pinfunc.h"
17 interrupt-parent = <&gic>;
[all …]
Dimx8mm-kontron-bl.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 /dts-v1/;
8 #include "imx8mm-kontron-sl.dtsi"
12 compatible = "kontron,imx8mm-bl", "kontron,imx8mm-sl", "fsl,imx8mm";
19 osc_can: clock-osc-can {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <16000000>;
23 clock-output-names = "osc-can";
27 compatible = "gpio-leds";
[all …]
Dimx8mm-tqma8mqml-mba8mx.dts1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 /dts-v1/;
8 #include "imx8mm-tqma8mqml.dtsi"
12 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML on MBa8Mx";
13 compatible = "tq,imx8mm-tqma8mqml-mba8mx", "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
24 reg_usdhc2_vmmc: regulator-vmmc {
25 compatible = "regulator-fixed";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
[all …]
Dimx8mm-kontron-bl-osm-s.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 /dts-v1/;
8 #include "imx8mm-kontron-osm-s.dtsi"
11 model = "Kontron BL i.MX8MM OSM-S (N802X S)";
12 compatible = "kontron,imx8mm-bl-osm-s", "kontron,imx8mm-osm-s", "fsl,imx8mm";
19 osc_can: clock-osc-can {
20 compatible = "fixed-clock";
21 #clock-cells = <0>;
22 clock-frequency = <40000000>;
23 clock-output-names = "osc-can";
[all …]
Dimx8mm-kontron-sl.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include "imx8mm.dtsi"
10 compatible = "kontron,imx8mm-sl", "fsl,imx8mm";
23 stdout-path = &uart3;
28 cpu-supply = <&reg_vdd_arm>;
32 cpu-supply = <&reg_vdd_arm>;
36 cpu-supply = <&reg_vdd_arm>;
40 cpu-supply = <&reg_vdd_arm>;
44 operating-points-v2 = <&ddrc_opp_table>;
46 ddrc_opp_table: opp-table {
[all …]
Dimx8mm-mx8menlo.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Copyright 2021-2022 Marek Vasut <marex@denx.de>
6 /dts-v1/;
8 #include "imx8mm-verdin.dtsi"
13 "toradex,verdin-imx8mm",
14 "fsl,imx8mm";
16 /delete-node/ gpio-keys;
19 compatible = "gpio-leds";
20 pinctrl-names = "default";
21 pinctrl-0 = <&pinctrl_led>;
[all …]
Dimx8mm-kontron-osm-s.dtsi1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
6 #include <dt-bindings/interrupt-controller/irq.h>
7 #include "imx8mm.dtsi"
10 model = "Kontron OSM-S i.MX8MM (N802X SOM)";
11 compatible = "kontron,imx8mm-osm-s", "fsl,imx8mm";
24 stdout-path = &uart3;
29 cpu-supply = <&reg_vdd_arm>;
33 cpu-supply = <&reg_vdd_arm>;
37 cpu-supply = <&reg_vdd_arm>;
41 cpu-supply = <&reg_vdd_arm>;
[all …]
Dimx8mm-var-som-symphony.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include "imx8mm-var-som.dtsi"
11 model = "Variscite VAR-SOM-MX8MM Symphony evaluation board";
12 compatible = "variscite,var-som-mx8mm-symphony", "variscite,var-som-mx8mm", "fsl,imx8mm";
14 reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
15 compatible = "regulator-fixed";
16 pinctrl-names = "default";
17 pinctrl-0 = <&pinctrl_reg_usdhc2_vmmc>;
18 regulator-name = "VSD_3V3";
[all …]
/Linux-v6.1/drivers/pci/controller/dwc/
Dpci-imx6.c1 // SPDX-License-Identifier: GPL-2.0
17 #include <linux/mfd/syscon/imx6q-iomuxc-gpr.h>
18 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
36 #include "pcie-designware.h"
45 #define to_imx6_pcie(x) dev_get_drvdata((x)->dev)
53 IMX8MM, enumerator
104 /* PCIe Port Logic registers (memory-mapped) */
117 /* PHY registers (not memory-mapped) */
154 WARN_ON(imx6_pcie->drvdata->variant != IMX8MQ && in imx6_pcie_grp_offset()
155 imx6_pcie->drvdata->variant != IMX8MM && in imx6_pcie_grp_offset()
[all …]
/Linux-v6.1/drivers/pinctrl/freescale/
Dpinctrl-imx8mm.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright 2017-2018 NXP
13 #include "pinctrl-imx.h"
323 .gpr_compatible = "fsl,imx8mm-iomuxc-gpr",
327 { .compatible = "fsl,imx8mm-iomuxc", .data = &imx8mm_pinctrl_info, },
339 .name = "imx8mm-pinctrl",

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