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/Linux-v6.1/sound/soc/img/
Dimg-i2s-out.c3 * IMG I2S output controller driver
69 struct img_i2s_out *i2s = dev_get_drvdata(dev); in img_i2s_out_runtime_suspend() local
71 clk_disable_unprepare(i2s->clk_ref); in img_i2s_out_runtime_suspend()
72 clk_disable_unprepare(i2s->clk_sys); in img_i2s_out_runtime_suspend()
79 struct img_i2s_out *i2s = dev_get_drvdata(dev); in img_i2s_out_runtime_resume() local
82 ret = clk_prepare_enable(i2s->clk_sys); in img_i2s_out_runtime_resume()
88 ret = clk_prepare_enable(i2s->clk_ref); in img_i2s_out_runtime_resume()
91 clk_disable_unprepare(i2s->clk_sys); in img_i2s_out_runtime_resume()
98 static inline void img_i2s_out_writel(struct img_i2s_out *i2s, u32 val, in img_i2s_out_writel() argument
101 writel(val, i2s->base + reg); in img_i2s_out_writel()
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Dimg-i2s-in.c3 * IMG I2S input controller driver
67 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_suspend() local
69 clk_disable_unprepare(i2s->clk_sys); in img_i2s_in_runtime_suspend()
76 struct img_i2s_in *i2s = dev_get_drvdata(dev); in img_i2s_in_runtime_resume() local
79 ret = clk_prepare_enable(i2s->clk_sys); in img_i2s_in_runtime_resume()
88 static inline void img_i2s_in_writel(struct img_i2s_in *i2s, u32 val, u32 reg) in img_i2s_in_writel() argument
90 writel(val, i2s->base + reg); in img_i2s_in_writel()
93 static inline u32 img_i2s_in_readl(struct img_i2s_in *i2s, u32 reg) in img_i2s_in_readl() argument
95 return readl(i2s->base + reg); in img_i2s_in_readl()
98 static inline void img_i2s_in_ch_writel(struct img_i2s_in *i2s, u32 chan, in img_i2s_in_ch_writel() argument
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/Linux-v6.1/sound/soc/rockchip/
Drockchip_i2s.c4 * ALSA SoC Audio Layer - Rockchip I2S Controller driver
25 #define DRV_NAME "rockchip-i2s"
49 * I2S controller hopes to start the tx and rx together,
63 static int i2s_pinctrl_select_bclk_on(struct rk_i2s_dev *i2s) in i2s_pinctrl_select_bclk_on() argument
67 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_on)) in i2s_pinctrl_select_bclk_on()
68 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_on); in i2s_pinctrl_select_bclk_on()
71 dev_err(i2s->dev, "bclk enable failed %d\n", ret); in i2s_pinctrl_select_bclk_on()
76 static int i2s_pinctrl_select_bclk_off(struct rk_i2s_dev *i2s) in i2s_pinctrl_select_bclk_off() argument
81 if (!IS_ERR(i2s->pinctrl) && !IS_ERR_OR_NULL(i2s->bclk_off)) in i2s_pinctrl_select_bclk_off()
82 ret = pinctrl_select_state(i2s->pinctrl, i2s->bclk_off); in i2s_pinctrl_select_bclk_off()
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/Linux-v6.1/sound/soc/hisilicon/
Dhi6210-i2s.c3 * linux/sound/soc/m8m/hi6210_i2s.c - I2S IP driver
32 #include "hi6210-i2s.h"
81 static inline void hi6210_write_reg(struct hi6210_i2s *i2s, int reg, u32 val) in hi6210_write_reg() argument
83 writel(val, i2s->base + reg); in hi6210_write_reg()
86 static inline u32 hi6210_read_reg(struct hi6210_i2s *i2s, int reg) in hi6210_read_reg() argument
88 return readl(i2s->base + reg); in hi6210_read_reg()
94 struct hi6210_i2s *i2s = dev_get_drvdata(cpu_dai->dev); in hi6210_i2s_startup() local
99 regmap_read(i2s->sysctrl, SC_PERIPH_RSTSTAT2, &val); in hi6210_i2s_startup()
101 regmap_write(i2s->sysctrl, SC_PERIPH_RSTDIS2, BIT(4)); in hi6210_i2s_startup()
103 for (n = 0; n < i2s->clocks; n++) { in hi6210_i2s_startup()
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/Linux-v6.1/sound/soc/tegra/
Dtegra210_i2s.c3 // tegra210_i2s.c - Tegra210 I2S driver
31 * is required to select i2s4b for it to be functional for I2S
50 struct tegra210_i2s *i2s = dev_get_drvdata(dev); in tegra210_i2s_set_clock_rate() local
54 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
56 /* No need to set rates if I2S is being operated in slave */ in tegra210_i2s_set_clock_rate()
60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
62 dev_err(dev, "can't set I2S bit clock rate %u, err: %d\n", in tegra210_i2s_set_clock_rate()
67 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
69 * Other I/O modules in AHUB can use i2s bclk as reference in tegra210_i2s_set_clock_rate()
73 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
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Dtegra30_i2s.c3 * tegra30_i2s.c - Tegra30 I2S driver
37 #define DRV_NAME "tegra30-i2s"
41 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_suspend() local
43 regcache_cache_only(i2s->regmap, true); in tegra30_i2s_runtime_suspend()
45 clk_disable_unprepare(i2s->clk_i2s); in tegra30_i2s_runtime_suspend()
52 struct tegra30_i2s *i2s = dev_get_drvdata(dev); in tegra30_i2s_runtime_resume() local
55 ret = clk_prepare_enable(i2s->clk_i2s); in tegra30_i2s_runtime_resume()
61 regcache_cache_only(i2s->regmap, false); in tegra30_i2s_runtime_resume()
62 regcache_mark_dirty(i2s->regmap); in tegra30_i2s_runtime_resume()
64 ret = regcache_sync(i2s->regmap); in tegra30_i2s_runtime_resume()
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Dtegra20_i2s.c3 * tegra20_i2s.c - Tegra20 I2S driver
35 #define DRV_NAME "tegra20-i2s"
39 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_suspend() local
41 regcache_cache_only(i2s->regmap, true); in tegra20_i2s_runtime_suspend()
43 clk_disable_unprepare(i2s->clk_i2s); in tegra20_i2s_runtime_suspend()
50 struct tegra20_i2s *i2s = dev_get_drvdata(dev); in tegra20_i2s_runtime_resume() local
53 ret = reset_control_assert(i2s->reset); in tegra20_i2s_runtime_resume()
57 ret = clk_prepare_enable(i2s->clk_i2s); in tegra20_i2s_runtime_resume()
65 ret = reset_control_deassert(i2s->reset); in tegra20_i2s_runtime_resume()
69 regcache_cache_only(i2s->regmap, false); in tegra20_i2s_runtime_resume()
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/Linux-v6.1/sound/soc/stm/
Dstm32_i2s.c3 * STM32 ALSA SoC Digital Audio Interface (I2S) driver.
143 /* Registers below apply to I2S version 1.1 and more */
205 * struct stm32_i2s_data - private data of I2S
206 * @regmap_conf: I2S register map configuration pointer
207 * @regmap: I2S register map pointer
213 * @i2sclk: kernel clock feeding the I2S clock generator
214 * @i2smclk: master clock from I2S mclk provider
216 * @x8kclk: I2S parent clock for sampling frequencies multiple of 8kHz
217 * @x11kclk: I2S parent clock for sampling frequencies multiple of 11kHz
219 * @phys_addr: I2S registers physical base address
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/Linux-v6.1/sound/soc/adi/
Daxi-i2s.c60 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_trigger() local
83 regmap_update_bits(i2s->regmap, AXI_I2S_REG_CTRL, mask, val); in axi_i2s_trigger()
91 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_hw_params() local
98 bclk_div = DIV_ROUND_UP(clk_get_rate(i2s->clk_ref), bclk_rate) / 2 - 1; in axi_i2s_hw_params()
100 regmap_write(i2s->regmap, AXI_I2S_REG_CLK_CTRL, (word_size << 16) | in axi_i2s_hw_params()
109 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_startup() local
118 regmap_write(i2s->regmap, AXI_I2S_REG_RESET, mask); in axi_i2s_startup()
122 &i2s->rate_constraints); in axi_i2s_startup()
126 return clk_prepare_enable(i2s->clk_ref); in axi_i2s_startup()
132 struct axi_i2s *i2s = snd_soc_dai_get_drvdata(dai); in axi_i2s_shutdown() local
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/Linux-v6.1/sound/soc/xtensa/
Dxtfpga-i2s.c3 * Xtfpga I2S controller driver
17 #define DRV_NAME "xtfpga-i2s"
46 * I2S controller operation:
76 unsigned (*tx_fn)(struct xtfpga_i2s *i2s,
126 * If I2S interface is configured with smaller sample resolution, only
131 struct xtfpga_i2s *i2s, struct snd_pcm_runtime *runtime, \
137 for (; i2s->tx_fifo_level < i2s->tx_fifo_high; \
138 i2s->tx_fifo_level += 2) { \
140 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
142 i2s->regs + XTFPGA_I2S_CHAN0_DATA); \
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/Linux-v6.1/sound/soc/jz4740/
Djz4740-i2s.c26 #include "jz4740-i2s.h"
107 static inline uint32_t jz4740_i2s_read(const struct jz4740_i2s *i2s, in jz4740_i2s_read() argument
110 return readl(i2s->base + reg); in jz4740_i2s_read()
113 static inline void jz4740_i2s_write(const struct jz4740_i2s *i2s, in jz4740_i2s_write() argument
116 writel(value, i2s->base + reg); in jz4740_i2s_write()
122 struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); in jz4740_i2s_startup() local
129 ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL); in jz4740_i2s_startup()
131 jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl); in jz4740_i2s_startup()
133 ret = clk_prepare_enable(i2s->clk_i2s); in jz4740_i2s_startup()
137 conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF); in jz4740_i2s_startup()
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/Linux-v6.1/sound/soc/sunxi/
Dsun4i-i2s.c181 /* Register fields for i2s */
194 unsigned long (*get_bclk_parent_rate)(const struct sun4i_i2s *i2s);
203 int (*set_chan_cfg)(const struct sun4i_i2s *i2s,
206 int (*set_fmt)(const struct sun4i_i2s *i2s, unsigned int fmt);
223 /* Register fields for i2s */
276 static unsigned long sun4i_i2s_get_bclk_parent_rate(const struct sun4i_i2s *i2s) in sun4i_i2s_get_bclk_parent_rate() argument
278 return i2s->mclk_freq; in sun4i_i2s_get_bclk_parent_rate()
281 static unsigned long sun8i_i2s_get_bclk_parent_rate(const struct sun4i_i2s *i2s) in sun8i_i2s_get_bclk_parent_rate() argument
283 return clk_get_rate(i2s->mod_clk); in sun8i_i2s_get_bclk_parent_rate()
286 static int sun4i_i2s_get_bclk_div(struct sun4i_i2s *i2s, in sun4i_i2s_get_bclk_div() argument
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/Linux-v6.1/sound/soc/samsung/
Di2s.c3 // ALSA SoC Audio Layer - Samsung I2S Controller driver
8 #include <dt-bindings/sound/samsung-i2s.h>
27 #include "i2s.h"
28 #include "i2s-regs.h"
99 /* The I2S controller's core clock */
102 /* Clock for generating I2S signals */
108 /* Cache of selected I2S registers for system suspend */
126 /* A flag indicating the I2S slave mode operation */
131 static inline bool is_secondary(struct i2s_dai *i2s) in is_secondary() argument
133 return i2s->drv->id == SAMSUNG_I2S_ID_SECONDARY; in is_secondary()
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Ds3c-i2s-v2.c3 // ALSA Soc Audio Layer - I2S core for newer Samsung SoCs.
21 #include "regs-i2s-v2.h"
22 #include "s3c-i2s-v2.h"
61 static void s3c2412_snd_txctrl(struct s3c_i2sv2_info *i2s, int on) in s3c2412_snd_txctrl() argument
63 void __iomem *regs = i2s->regs; in s3c2412_snd_txctrl()
91 dev_err(i2s->dev, "TXEN: Invalid MODE %x in IISMOD\n", in s3c2412_snd_txctrl()
120 dev_err(i2s->dev, "TXDIS: Invalid MODE %x in IISMOD\n", in s3c2412_snd_txctrl()
134 static void s3c2412_snd_rxctrl(struct s3c_i2sv2_info *i2s, int on) in s3c2412_snd_rxctrl() argument
136 void __iomem *regs = i2s->regs; in s3c2412_snd_rxctrl()
164 dev_err(i2s->dev, "RXEN: Invalid MODE %x in IISMOD\n", in s3c2412_snd_rxctrl()
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Ds3c2412-i2s.c3 // ALSA Soc Audio Layer - S3C2412 I2S driver
23 #include "regs-i2s-v2.h"
24 #include "s3c2412-i2s.h"
90 struct s3c_i2sv2_info *i2s = snd_soc_dai_get_drvdata(cpu_dai); in s3c2412_i2s_hw_params() local
95 iismod = readl(i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_hw_params()
107 writel(iismod, i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_hw_params()
116 struct s3c_i2sv2_info *i2s = snd_soc_component_get_drvdata(component); in s3c2412_i2s_suspend() local
120 i2s->suspend_iismod = readl(i2s->regs + S3C2412_IISMOD); in s3c2412_i2s_suspend()
121 i2s->suspend_iiscon = readl(i2s->regs + S3C2412_IISCON); in s3c2412_i2s_suspend()
122 i2s->suspend_iispsr = readl(i2s->regs + S3C2412_IISPSR); in s3c2412_i2s_suspend()
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Ds3c-i2s-v2.h3 * ALSA Soc Audio Layer - S3C_I2SV2 I2S driver
10 /* This code is the core support for the I2S block found in a number of
11 * Samsung SoC devices which is unofficially named I2S-V2. Currently the
12 * S3C2412 and the S3C64XX series use this block to provide 1 or 2 I2S
27 /* Set this flag for I2S controllers that have the bit IISMOD[12]
33 * struct s3c_i2sv2_info - S3C I2S-V2 information
37 * @master: True if the I2S core is the I2S bit clock master.
45 * I2S channel such as the register mappings and clock sources.
80 * s3c_i2sv2_probe - probe for i2s device helper
82 * @i2s: Our local i2s structure to fill in.
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/Linux-v6.1/Documentation/devicetree/bindings/sound/
Dallwinner,sun4i-a10-i2s.yaml4 $id: http://devicetree.org/schemas/sound/allwinner,sun4i-a10-i2s.yaml#
7 title: Allwinner A10 I2S Controller
19 - const: allwinner,sun4i-a10-i2s
20 - const: allwinner,sun6i-a31-i2s
21 - const: allwinner,sun8i-a83t-i2s
22 - const: allwinner,sun8i-h3-i2s
24 - const: allwinner,sun8i-r40-i2s
25 - const: allwinner,sun8i-h3-i2s
27 - const: allwinner,sun8i-v3-i2s
28 - const: allwinner,sun8i-h3-i2s
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Drockchip-i2s.yaml4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
7 title: Rockchip I2S controller
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
19 - const: rockchip,rk3066-i2s
22 - rockchip,px30-i2s
23 - rockchip,rk1808-i2s
24 - rockchip,rk3036-i2s
25 - rockchip,rk3128-i2s
26 - rockchip,rk3188-i2s
27 - rockchip,rk3228-i2s
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Dnvidia,tegra210-i2s.yaml4 $id: http://devicetree.org/schemas/sound/nvidia,tegra210-i2s.yaml#
7 title: Tegra210 I2S Controller
10 The Inter-IC Sound (I2S) controller implements full-duplex,
12 interfaces. It can interface with I2S compatible devices.
13 I2S controller can operate both in master and slave mode.
24 pattern: "^i2s@[0-9a-f]*$"
28 - const: nvidia,tegra210-i2s
31 - nvidia,tegra234-i2s
32 - nvidia,tegra194-i2s
33 - nvidia,tegra186-i2s
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Dsamsung-i2s.yaml4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
7 title: Samsung SoC I2S controller
16 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
18 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
29 samsung,exynos7-i2s: with all the available features of Exynos5 I2S.
30 Exynos7 I2S has 7.1 channel TDM support for capture, secondary FIFO
38 - samsung,s3c6410-i2s
39 - samsung,s5pv210-i2s
40 - samsung,exynos5420-i2s
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Drockchip,i2s-tdm.yaml4 $id: http://devicetree.org/schemas/sound/rockchip,i2s-tdm.yaml#
7 title: Rockchip I2S/TDM Controller
10 The Rockchip I2S/TDM Controller is a Time Division Multiplexed
20 - rockchip,px30-i2s-tdm
21 - rockchip,rk1808-i2s-tdm
22 - rockchip,rk3308-i2s-tdm
23 - rockchip,rk3568-i2s-tdm
24 - rockchip,rv1126-i2s-tdm
101 rockchip,i2s-rx-route:
104 Defines the mapping of I2S RX sdis to I2S data bus lines.
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Dimg,i2s-in.txt1 Imagination Technologies I2S Input Controller
5 - compatible : Compatible list, must contain "img,i2s-in"
19 "rx" Single DMA channel used by all active I2S channels
21 - img,i2s-channels : Number of I2S channels instantiated in the I2S in block
25 - interrupts : Contains the I2S in interrupts. Depending on
27 or an interrupt per I2S channel. For the case where there is
31 - resets: Contains a phandle to the I2S in reset signal
37 i2s_in: i2s-in@18100800 {
38 compatible = "img,i2s-in";
45 img,i2s-channels = <6>;
/Linux-v6.1/sound/soc/qcom/qdsp6/
Dq6prm.h6 /* Clock ID for Primary I2S IBIT */
8 /* Clock ID for Primary I2S EBIT */
10 /* Clock ID for Secondary I2S IBIT */
12 /* Clock ID for Secondary I2S EBIT */
14 /* Clock ID for Tertiary I2S IBIT */
16 /* Clock ID for Tertiary I2S EBIT */
18 /* Clock ID for Quartnery I2S IBIT */
20 /* Clock ID for Quartnery I2S EBIT */
22 /* Clock ID for Speaker I2S IBIT */
24 /* Clock ID for Speaker I2S EBIT */
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/Linux-v6.1/sound/soc/intel/avs/boards/
DKconfig8 tristate "da7219 I2S board"
13 This adds support for AVS with DA7219 I2S codec configuration.
34 tristate "I2S test board"
36 This adds support for I2S test-board which can be used to verify
37 transfer over I2S interface with SSP loopback scenarios.
40 tristate "max98357A I2S board"
45 This adds support for AVS with MAX98357A I2S codec configuration.
50 tristate "max98373 I2S board"
55 This adds support for AVS with MAX98373 I2S codec configuration.
60 tristate "nau8825 I2S board"
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/Linux-v6.1/sound/soc/intel/boards/
DKconfig7 has an audio controller with a DSP and I2S or DMIC port, then
44 tristate "Haswell with RT5640 I2S codec"
88 tristate "Broadwell with RT286 I2S codec"
239 Up boards and provides access to I2S signals on the Low-Speed
251 tristate "SKL with RT286 I2S mode"
259 with RT286 I2S audio codec.
264 tristate "SKL with NAU88L25 and SSM4567 in I2S Mode"
272 This adds support for ASoC Onboard Codec I2S machine driver. This will
278 tristate "SKL with NAU88L25 and MAX98357A in I2S Mode"
286 This adds support for ASoC Onboard Codec I2S machine driver. This will
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