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/Linux-v6.1/Documentation/devicetree/bindings/mmc/
Dmtk-sd.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/mmc/mtk-sd.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Chaotian Jing <chaotian.jing@mediatek.com>
11 - Wenbin Mei <wenbin.mei@mediatek.com>
14 - $ref: mmc-controller.yaml#
19 - enum:
20 - mediatek,mt2701-mmc
21 - mediatek,mt2712-mmc
[all …]
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8173-evb.dts1 // SPDX-License-Identifier: GPL-2.0-only
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
13 compatible = "mediatek,mt8173-evb", "mediatek,mt8173";
30 compatible = "hdmi-connector";
36 remote-endpoint = <&hdmi0_out>;
42 compatible = "linux,extcon-usb-gpio";
43 id-gpio = <&pio 16 GPIO_ACTIVE_HIGH>;
47 compatible = "regulator-fixed";
48 regulator-name = "usb_vbus";
[all …]
Dmt8173-elm.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/regulator/dlg,da9211-regulator.h>
9 #include <dt-bindings/gpio/gpio.h>
25 compatible = "pwm-backlight";
27 power-supply = <&bl_fixed_reg>;
28 enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
30 pinctrl-names = "default";
31 pinctrl-0 = <&panel_backlight_en_pins>;
[all …]
Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
18 stdout-path = "serial0:115200n8";
27 pp1800_ldo_g: regulator-1v8-g {
28 compatible = "regulator-fixed";
29 regulator-name = "pp1800_ldo_g";
30 regulator-always-on;
31 regulator-boot-on;
[all …]
Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
26 stdout-path = "serial0:115200n8";
35 pp3300_z5: regulator-pp3300-ldo-z5 {
36 compatible = "regulator-fixed";
37 regulator-name = "pp3300_ldo_z5";
38 regulator-always-on;
39 regulator-boot-on;
40 regulator-min-microvolt = <3300000>;
[all …]
/Linux-v6.1/drivers/mmc/host/
Dmtk-sd.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, 2022 MediaTek Inc.
10 #include <linux/delay.h>
11 #include <linux/dma-mapping.h>
36 #include <linux/mmc/slot-gpio.h>
43 /*--------------------------------------------------------------------------*/
45 /*--------------------------------------------------------------------------*/
52 /*--------------------------------------------------------------------------*/
54 /*--------------------------------------------------------------------------*/
91 /*--------------------------------------------------------------------------*/
[all …]
Dsdhci-xenon-phy.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
12 #include <linux/delay.h>
16 #include "sdhci-pltfm.h"
17 #include "sdhci-xenon.h"
200 static int xenon_alloc_emmc_phy(struct sdhci_host *host) in xenon_alloc_emmc_phy()
206 params = devm_kzalloc(mmc_dev(host->mmc), sizeof(*params), GFP_KERNEL); in xenon_alloc_emmc_phy()
208 return -ENOMEM; in xenon_alloc_emmc_phy()
210 priv->phy_params = params; in xenon_alloc_emmc_phy()
211 if (priv->phy_type == EMMC_5_0_PHY) in xenon_alloc_emmc_phy()
[all …]
Dsdhci-esdhc-imx.c1 // SPDX-License-Identifier: GPL-2.0
5 * derived from the OF-version.
14 #include <linux/delay.h>
23 #include <linux/mmc/slot-gpio.h>
28 #include "sdhci-cqhci.h"
29 #include "sdhci-pltfm.h"
30 #include "sdhci-esdhc.h"
82 #define ESDHC_TUNE_CTRL_MAX ((1 << 7) - 1)
126 * There is an INT DMA ERR mismatch between eSDHC and STD SDHC SPEC:
128 * but bit28 is used as the INT DMA ERR in fsl eSDHC design.
[all …]
Ddw_mmc-exynos.c1 // SPDX-License-Identifier: GPL-2.0-or-later
19 #include "dw_mmc-pltfm.h"
20 #include "dw_mmc-exynos.h"
22 /* Variations in Exynos specific dw-mshc controller */
53 .compatible = "samsung,exynos4210-dw-mshc",
56 .compatible = "samsung,exynos4412-dw-mshc",
59 .compatible = "samsung,exynos5250-dw-mshc",
62 .compatible = "samsung,exynos5420-dw-mshc",
65 .compatible = "samsung,exynos5420-dw-mshc-smu",
68 .compatible = "samsung,exynos7-dw-mshc",
[all …]
Dsdhci-of-dwcmshc.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/dma-mapping.h>
21 #include "sdhci-pltfm.h"
73 ((addr | (SZ_128M - 1)) == ((addr + len - 1) | (SZ_128M - 1)))
90 int vendor_specific_area1; /* P_VENDOR_SPECIFIC_AREA reg */
99 dma_addr_t addr, int len, unsigned int cmd) in dwcmshc_adma_write_desc() argument
101 int tmplen, offset; in dwcmshc_adma_write_desc()
104 sdhci_adma_write_desc(host, desc, addr, len, cmd); in dwcmshc_adma_write_desc()
108 offset = addr & (SZ_128M - 1); in dwcmshc_adma_write_desc()
109 tmplen = SZ_128M - offset; in dwcmshc_adma_write_desc()
[all …]
Dsdhci-msm.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/mmc/host/sdhci-msm.c - Qualcomm SDHCI Platform driver
5 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
10 #include <linux/delay.h>
22 #include "sdhci-pltfm.h"
121 #define INVALID_TUNING_PHASE -1
135 /* Max load for eMMC Vdd-io supply */
139 msm_host->var_ops->msm_readl_relaxed(host, offset)
142 msm_host->var_ops->msm_writel_relaxed(val, host, offset)
261 int pwr_irq; /* power irq */
[all …]
Dsunxi-mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
4 * (C) Copyright 2007-2011 Reuuimlla Technology Co., Ltd.
5 * (C) Copyright 2007-2011 Aaron Maoye <leafy.myeh@reuuimllatech.com>
6 * (C) Copyright 2013-2014 O2S GmbH <www.o2s.ch>
7 * (C) Copyright 2013-2014 David Lanzendörfer <david.lanzendoerfer@o2s.ch>
8 * (C) Copyright 2013-2014 Hans de Goede <hdegoede@redhat.com>
13 #include <linux/clk/sunxi-ng.h>
14 #include <linux/delay.h>
16 #include <linux/dma-mapping.h>
27 #include <linux/mmc/slot-gpio.h>
[all …]
Dsdhci-xenon.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * Date: 2016-8-24
15 #include <linux/delay.h>
22 #include "sdhci-pltfm.h"
23 #include "sdhci-xenon.h"
25 static int xenon_enable_internal_clk(struct sdhci_host *host) in xenon_enable_internal_clk()
42 dev_err(mmc_dev(host->mmc), "Internal clock never stabilised.\n"); in xenon_enable_internal_clk()
43 return -ETIMEDOUT; in xenon_enable_internal_clk()
51 /* Set SDCLK-off-while-idle */
92 host->mmc->caps |= MMC_CAP_WAIT_WHILE_BUSY; in xenon_enable_sdhc()
[all …]
Drenesas_sdhi_core.c1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-19 Renesas Electronics Corporation
6 * Copyright (C) 2016-19 Sang Engineering, Wolfram Sang
7 * Copyright (C) 2016-17 Horms Solutions, Simon Horman
13 * Copyright 2004-2005 Phil Blundell
14 * Copyright 2007-2008 OpenedHand Ltd.
22 #include <linux/delay.h>
28 #include <linux/mmc/slot-gpio.h>
31 #include <linux/pinctrl/pinctrl-state.h>
61 static void renesas_sdhi_sdbuf_width(struct tmio_mmc_host *host, int width) in renesas_sdhi_sdbuf_width()
[all …]
Dsdhci-of-esdhc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
17 #include <linux/delay.h>
22 #include <linux/dma-mapping.h>
26 #include "sdhci-pltfm.h"
27 #include "sdhci-esdhc.h"
35 const unsigned int sd_dflt_max_clk;
36 const unsigned int max_clk[MMC_TIMING_NUM];
65 { .compatible = "fsl,ls1021a-esdhc", .data = &ls1021a_esdhc_clk},
66 { .compatible = "fsl,ls1046a-esdhc", .data = &ls1046a_esdhc_clk},
67 { .compatible = "fsl,ls1012a-esdhc", .data = &ls1012a_esdhc_clk},
[all …]
Dsdhci.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * linux/drivers/mmc/host/sdhci.h - Secure Digital Host Controller Interface driver
7 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
166 #define SDHCI_INT_ALL_MASK ((unsigned int)-1)
188 #define SDHCI_CTRL_HS400 0x0005 /* Non-standard */
235 #define SDHCI_SUPPORT_HS400 0x80000000 /* Non-standard */
244 /* 4C-4F reserved for more max current */
251 /* 55-57 reserved */
256 /* 60-FB reserved */
264 #define SDHCI_PRESET_FOR_HS400 0x74 /* Non-standard */
[all …]
Dsdhci-tegra.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/delay.h>
7 #include <linux/dma-mapping.h>
25 #include <linux/mmc/slot-gpio.h>
31 #include "sdhci-cqhci.h"
32 #include "sdhci-pltfm.h"
183 static u16 tegra_sdhci_readw(struct sdhci_host *host, int reg) in tegra_sdhci_readw()
187 const struct sdhci_tegra_soc_data *soc_data = tegra_host->soc_data; in tegra_sdhci_readw()
189 if (unlikely((soc_data->nvquirks & NVQUIRK_FORCE_SDHCI_SPEC_200) && in tegra_sdhci_readw()
195 return readw(host->ioaddr + reg); in tegra_sdhci_readw()
[all …]
Dsdhci.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * linux/drivers/mmc/host/sdhci.c - Secure Digital Host Controller Interface driver
5 * Copyright (C) 2005-2008 Pierre Ossman, All Rights Reserved.
9 * - JMicron (hardware and technical support)
13 #include <linux/delay.h>
19 #include <linux/dma-mapping.h>
33 #include <linux/mmc/slot-gpio.h>
40 pr_debug("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
43 pr_err("%s: " DRIVER_NAME ": " f, mmc_hostname(host->mmc), ## x)
47 static unsigned int debug_quirks = 0;
[all …]
Dmeson-gx-mmc.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/delay.h>
17 #include <linux/dma-mapping.h>
21 #include <linux/mmc/slot-gpio.h>
24 #include <linux/clk-provider.h>
31 #define DRIVER_NAME "meson-gx-mmc"
51 #define CLK_TX_DELAY_MASK(h) (h->data->tx_delay_mask)
52 #define CLK_RX_DELAY_MASK(h) (h->data->rx_delay_mask)
53 #define CLK_ALWAYS_ON(h) (h->data->always_on)
54 #define CLK_IRQ_SDIO_SLEEP(h) (h->data->irq_sdio_sleep)
[all …]
Ddw_mmc.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/dma-mapping.h>
28 #include <linux/delay.h>
39 #include <linux/mmc/slot-gpio.h>
74 ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \
79 u32 des4; /* Lower 32-bits of Buffer Address Pointer 1*/
80 u32 des5; /* Upper 32-bits of Buffer Address Pointer 1*/
82 u32 des6; /* Lower 32-bits of Next Descriptor Address */
83 u32 des7; /* Upper 32-bits of Next Descriptor Address */
98 ((d)->des1 = ((d)->des1 & cpu_to_le32(0x03ffe000)) | (cpu_to_le32((s) & 0x1fff)))
[all …]
/Linux-v6.1/include/linux/mmc/
Dhost.h1 /* SPDX-License-Identifier: GPL-2.0-only */
12 #include <linux/fault-inject.h>
17 #include <linux/dma-direction.h>
18 #include <linux/blk-crypto-profile.h>
21 unsigned int clock; /* clock rate */
23 unsigned int power_delay_ms; /* waiting for stable power */
125 int err);
129 int (*request_atomic)(struct mmc_host *host,
141 * ios->clock might be 0. For some controllers, setting 0Hz
151 * 1 for a read-only card
[all …]
/Linux-v6.1/arch/arm64/boot/dts/rockchip/
Drk3399-rock960.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 #include "rk3399-opp.dtsi"
10 #include <dt-bindings/interrupt-controller/irq.h>
19 sdio_pwrseq: sdio-pwrseq {
20 compatible = "mmc-pwrseq-simple";
22 clock-names = "ext_clock";
23 pinctrl-names = "default";
24 pinctrl-0 = <&wifi_enable_h>;
25 reset-gpios = <&gpio0 RK_PB2 GPIO_ACTIVE_LOW>;
28 vcc12v_dcin: vcc12v-dcin {
[all …]
Drk3399-rock-4c-plus.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/leds/common.h>
11 #include "rk3399-t-opp.dtsi"
15 compatible = "radxa,rock-4c-plus", "rockchip,rk3399";
23 stdout-path = "serial2:1500000n8";
26 clkin_gmac: external-gmac-clock {
27 compatible = "fixed-clock";
28 clock-frequency = <125000000>;
29 clock-output-names = "clkin_gmac";
[all …]
Drk3399-rock-pi-4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/leds/common.h>
10 #include <dt-bindings/pwm/pwm.h>
12 #include "rk3399-opp.dtsi"
21 stdout-path = "serial2:1500000n8";
24 clkin_gmac: external-gmac-clock {
25 compatible = "fixed-clock";
26 clock-frequency = <125000000>;
[all …]
Drk3399-gru.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * Copyright 2016-2017 Google, Inc
8 #include <dt-bindings/input/input.h>
10 #include "rk3399-op1-opp.dtsi"
19 stdout-path = "serial2:115200n8";
28 * - Rails that only connect to the EC (or devices that the EC talks to)
30 * - Rails _are_ included if the rails go to the AP even if the AP
39 * - The EC controls the enable and the EC always enables a rail as
41 * - The rails are actually connected to each other by a jumper and
46 ppvar_sys: ppvar-sys {
[all …]