Lines Matching +full:hs400 +full:- +full:cmd +full:- +full:int +full:- +full:delay
1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <linux/dma-mapping.h>
28 #include <linux/delay.h>
39 #include <linux/mmc/slot-gpio.h>
74 ((d)->des2 = ((d)->des2 & cpu_to_le32(0x03ffe000)) | \
79 u32 des4; /* Lower 32-bits of Buffer Address Pointer 1*/
80 u32 des5; /* Upper 32-bits of Buffer Address Pointer 1*/
82 u32 des6; /* Lower 32-bits of Next Descriptor Address */
83 u32 des7; /* Upper 32-bits of Next Descriptor Address */
98 ((d)->des1 = ((d)->des1 & cpu_to_le32(0x03ffe000)) | (cpu_to_le32((s) & 0x1fff)))
109 static int dw_mci_req_show(struct seq_file *s, void *v) in dw_mci_req_show()
111 struct dw_mci_slot *slot = s->private; in dw_mci_req_show()
113 struct mmc_command *cmd; in dw_mci_req_show() local
118 spin_lock_bh(&slot->host->lock); in dw_mci_req_show()
119 mrq = slot->mrq; in dw_mci_req_show()
122 cmd = mrq->cmd; in dw_mci_req_show()
123 data = mrq->data; in dw_mci_req_show()
124 stop = mrq->stop; in dw_mci_req_show()
126 if (cmd) in dw_mci_req_show()
128 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", in dw_mci_req_show()
129 cmd->opcode, cmd->arg, cmd->flags, in dw_mci_req_show()
130 cmd->resp[0], cmd->resp[1], cmd->resp[2], in dw_mci_req_show()
131 cmd->resp[2], cmd->error); in dw_mci_req_show()
134 data->bytes_xfered, data->blocks, in dw_mci_req_show()
135 data->blksz, data->flags, data->error); in dw_mci_req_show()
138 "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", in dw_mci_req_show()
139 stop->opcode, stop->arg, stop->flags, in dw_mci_req_show()
140 stop->resp[0], stop->resp[1], stop->resp[2], in dw_mci_req_show()
141 stop->resp[2], stop->error); in dw_mci_req_show()
144 spin_unlock_bh(&slot->host->lock); in dw_mci_req_show()
150 static int dw_mci_regs_show(struct seq_file *s, void *v) in dw_mci_regs_show()
152 struct dw_mci *host = s->private; in dw_mci_regs_show()
154 pm_runtime_get_sync(host->dev); in dw_mci_regs_show()
158 seq_printf(s, "CMD:\t0x%08x\n", mci_readl(host, CMD)); in dw_mci_regs_show()
163 pm_runtime_put_autosuspend(host->dev); in dw_mci_regs_show()
171 struct mmc_host *mmc = slot->mmc; in dw_mci_init_debugfs()
172 struct dw_mci *host = slot->host; in dw_mci_init_debugfs()
175 root = mmc->debugfs_root; in dw_mci_init_debugfs()
181 debugfs_create_u32("state", S_IRUSR, root, &host->state); in dw_mci_init_debugfs()
183 &host->pending_events); in dw_mci_init_debugfs()
185 &host->completed_events); in dw_mci_init_debugfs()
187 fault_create_debugfs_attr("fail_data_crc", root, &host->fail_data_crc); in dw_mci_init_debugfs()
201 if (readl_poll_timeout_atomic(host->regs + SDMMC_CTRL, ctrl, in dw_mci_ctrl_reset()
204 dev_err(host->dev, in dw_mci_ctrl_reset()
227 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_wait_while_busy()
231 dev_err(host->dev, "Busy; trying anyway\n"); in dw_mci_wait_while_busy()
235 static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) in mci_send_cmd() argument
237 struct dw_mci *host = slot->host; in mci_send_cmd()
238 unsigned int cmd_status = 0; in mci_send_cmd()
242 dw_mci_wait_while_busy(host, cmd); in mci_send_cmd()
243 mci_writel(host, CMD, SDMMC_CMD_START | cmd); in mci_send_cmd()
245 if (readl_poll_timeout_atomic(host->regs + SDMMC_CMD, cmd_status, in mci_send_cmd()
248 dev_err(&slot->mmc->class_dev, in mci_send_cmd()
249 "Timeout sending command (cmd %#x arg %#x status %#x)\n", in mci_send_cmd()
250 cmd, arg, cmd_status); in mci_send_cmd()
253 static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) in dw_mci_prepare_command() argument
256 struct dw_mci *host = slot->host; in dw_mci_prepare_command()
259 cmd->error = -EINPROGRESS; in dw_mci_prepare_command()
260 cmdr = cmd->opcode; in dw_mci_prepare_command()
262 if (cmd->opcode == MMC_STOP_TRANSMISSION || in dw_mci_prepare_command()
263 cmd->opcode == MMC_GO_IDLE_STATE || in dw_mci_prepare_command()
264 cmd->opcode == MMC_GO_INACTIVE_STATE || in dw_mci_prepare_command()
265 (cmd->opcode == SD_IO_RW_DIRECT && in dw_mci_prepare_command()
266 ((cmd->arg >> 9) & 0x1FFFF) == SDIO_CCCR_ABORT)) in dw_mci_prepare_command()
268 else if (cmd->opcode != MMC_SEND_STATUS && cmd->data) in dw_mci_prepare_command()
271 if (cmd->opcode == SD_SWITCH_VOLTAGE) { in dw_mci_prepare_command()
278 WARN_ON(slot->host->state != STATE_SENDING_CMD); in dw_mci_prepare_command()
279 slot->host->state = STATE_SENDING_CMD11; in dw_mci_prepare_command()
289 * ever called with a non-zero clock. That shouldn't happen in dw_mci_prepare_command()
293 clk_en_a &= ~(SDMMC_CLKEN_LOW_PWR << slot->id); in dw_mci_prepare_command()
299 if (cmd->flags & MMC_RSP_PRESENT) { in dw_mci_prepare_command()
302 if (cmd->flags & MMC_RSP_136) in dw_mci_prepare_command()
306 if (cmd->flags & MMC_RSP_CRC) in dw_mci_prepare_command()
309 if (cmd->data) { in dw_mci_prepare_command()
311 if (cmd->data->flags & MMC_DATA_WRITE) in dw_mci_prepare_command()
315 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &slot->flags)) in dw_mci_prepare_command()
321 static u32 dw_mci_prep_stop_abort(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_prep_stop_abort() argument
326 if (!cmd->data) in dw_mci_prep_stop_abort()
329 stop = &host->stop_abort; in dw_mci_prep_stop_abort()
330 cmdr = cmd->opcode; in dw_mci_prep_stop_abort()
340 stop->opcode = MMC_STOP_TRANSMISSION; in dw_mci_prep_stop_abort()
341 stop->arg = 0; in dw_mci_prep_stop_abort()
342 stop->flags = MMC_RSP_R1B | MMC_CMD_AC; in dw_mci_prep_stop_abort()
344 stop->opcode = SD_IO_RW_DIRECT; in dw_mci_prep_stop_abort()
345 stop->arg |= (1 << 31) | (0 << 28) | (SDIO_CCCR_ABORT << 9) | in dw_mci_prep_stop_abort()
346 ((cmd->arg >> 28) & 0x7); in dw_mci_prep_stop_abort()
347 stop->flags = MMC_RSP_SPI_R5 | MMC_RSP_R5 | MMC_CMD_AC; in dw_mci_prep_stop_abort()
352 cmdr = stop->opcode | SDMMC_CMD_STOP | in dw_mci_prep_stop_abort()
355 if (!test_bit(DW_MMC_CARD_NO_USE_HOLD, &host->slot->flags)) in dw_mci_prep_stop_abort()
363 unsigned int cto_clks; in dw_mci_set_cto()
364 unsigned int cto_div; in dw_mci_set_cto()
365 unsigned int cto_ms; in dw_mci_set_cto()
374 host->bus_hz); in dw_mci_set_cto()
392 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_cto()
393 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_set_cto()
394 mod_timer(&host->cto_timer, in dw_mci_set_cto()
396 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_cto()
400 struct mmc_command *cmd, u32 cmd_flags) in dw_mci_start_command() argument
402 host->cmd = cmd; in dw_mci_start_command()
403 dev_vdbg(host->dev, in dw_mci_start_command()
405 cmd->arg, cmd_flags); in dw_mci_start_command()
407 mci_writel(host, CMDARG, cmd->arg); in dw_mci_start_command()
411 mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); in dw_mci_start_command()
420 struct mmc_command *stop = &host->stop_abort; in send_stop_abort()
422 dw_mci_start_command(host, stop, host->stop_cmdr); in send_stop_abort()
428 if (host->using_dma) { in dw_mci_stop_dma()
429 host->dma_ops->stop(host); in dw_mci_stop_dma()
430 host->dma_ops->cleanup(host); in dw_mci_stop_dma()
434 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_stop_dma()
439 struct mmc_data *data = host->data; in dw_mci_dma_cleanup()
441 if (data && data->host_cookie == COOKIE_MAPPED) { in dw_mci_dma_cleanup()
442 dma_unmap_sg(host->dev, in dw_mci_dma_cleanup()
443 data->sg, in dw_mci_dma_cleanup()
444 data->sg_len, in dw_mci_dma_cleanup()
446 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_dma_cleanup()
478 struct mmc_data *data = host->data; in dw_mci_dmac_complete_dma()
480 dev_vdbg(host->dev, "DMA complete\n"); in dw_mci_dmac_complete_dma()
482 if ((host->use_dma == TRANS_MODE_EDMAC) && in dw_mci_dmac_complete_dma()
483 data && (data->flags & MMC_DATA_READ)) in dw_mci_dmac_complete_dma()
485 dma_sync_sg_for_cpu(mmc_dev(host->slot->mmc), in dw_mci_dmac_complete_dma()
486 data->sg, in dw_mci_dmac_complete_dma()
487 data->sg_len, in dw_mci_dmac_complete_dma()
490 host->dma_ops->cleanup(host); in dw_mci_dmac_complete_dma()
497 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_dmac_complete_dma()
498 tasklet_schedule(&host->tasklet); in dw_mci_dmac_complete_dma()
502 static int dw_mci_idmac_init(struct dw_mci *host) in dw_mci_idmac_init()
504 int i; in dw_mci_idmac_init()
506 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
509 host->ring_size = in dw_mci_idmac_init()
513 for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; in dw_mci_idmac_init()
515 p->des6 = (host->sg_dma + in dw_mci_idmac_init()
519 p->des7 = (u64)(host->sg_dma + in dw_mci_idmac_init()
523 p->des0 = 0; in dw_mci_idmac_init()
524 p->des1 = 0; in dw_mci_idmac_init()
525 p->des2 = 0; in dw_mci_idmac_init()
526 p->des3 = 0; in dw_mci_idmac_init()
529 /* Set the last descriptor as the end-of-ring descriptor */ in dw_mci_idmac_init()
530 p->des6 = host->sg_dma & 0xffffffff; in dw_mci_idmac_init()
531 p->des7 = (u64)host->sg_dma >> 32; in dw_mci_idmac_init()
532 p->des0 = IDMAC_DES0_ER; in dw_mci_idmac_init()
537 host->ring_size = in dw_mci_idmac_init()
541 for (i = 0, p = host->sg_cpu; in dw_mci_idmac_init()
542 i < host->ring_size - 1; in dw_mci_idmac_init()
544 p->des3 = cpu_to_le32(host->sg_dma + in dw_mci_idmac_init()
546 p->des0 = 0; in dw_mci_idmac_init()
547 p->des1 = 0; in dw_mci_idmac_init()
550 /* Set the last descriptor as the end-of-ring descriptor */ in dw_mci_idmac_init()
551 p->des3 = cpu_to_le32(host->sg_dma); in dw_mci_idmac_init()
552 p->des0 = cpu_to_le32(IDMAC_DES0_ER); in dw_mci_idmac_init()
557 if (host->dma_64bit_address == 1) { in dw_mci_idmac_init()
558 /* Mask out interrupts - get Tx & Rx complete only */ in dw_mci_idmac_init()
564 mci_writel(host, DBADDRL, host->sg_dma & 0xffffffff); in dw_mci_idmac_init()
565 mci_writel(host, DBADDRU, (u64)host->sg_dma >> 32); in dw_mci_idmac_init()
568 /* Mask out interrupts - get Tx & Rx complete only */ in dw_mci_idmac_init()
574 mci_writel(host, DBADDR, host->sg_dma); in dw_mci_idmac_init()
580 static inline int dw_mci_prepare_desc64(struct dw_mci *host, in dw_mci_prepare_desc64()
582 unsigned int sg_len) in dw_mci_prepare_desc64()
584 unsigned int desc_len; in dw_mci_prepare_desc64()
587 int i; in dw_mci_prepare_desc64()
589 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc64()
592 unsigned int length = sg_dma_len(&data->sg[i]); in dw_mci_prepare_desc64()
594 u64 mem_addr = sg_dma_address(&data->sg[i]); in dw_mci_prepare_desc64()
600 length -= desc_len; in dw_mci_prepare_desc64()
608 if (readl_poll_timeout_atomic(&desc->des0, val, in dw_mci_prepare_desc64()
617 desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | in dw_mci_prepare_desc64()
624 desc->des4 = mem_addr & 0xffffffff; in dw_mci_prepare_desc64()
625 desc->des5 = mem_addr >> 32; in dw_mci_prepare_desc64()
636 desc_first->des0 |= IDMAC_DES0_FD; in dw_mci_prepare_desc64()
639 desc_last->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); in dw_mci_prepare_desc64()
640 desc_last->des0 |= IDMAC_DES0_LD; in dw_mci_prepare_desc64()
645 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc64()
646 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc64()
648 return -EINVAL; in dw_mci_prepare_desc64()
652 static inline int dw_mci_prepare_desc32(struct dw_mci *host, in dw_mci_prepare_desc32()
654 unsigned int sg_len) in dw_mci_prepare_desc32()
656 unsigned int desc_len; in dw_mci_prepare_desc32()
659 int i; in dw_mci_prepare_desc32()
661 desc_first = desc_last = desc = host->sg_cpu; in dw_mci_prepare_desc32()
664 unsigned int length = sg_dma_len(&data->sg[i]); in dw_mci_prepare_desc32()
666 u32 mem_addr = sg_dma_address(&data->sg[i]); in dw_mci_prepare_desc32()
672 length -= desc_len; in dw_mci_prepare_desc32()
680 if (readl_poll_timeout_atomic(&desc->des0, val, in dw_mci_prepare_desc32()
690 desc->des0 = cpu_to_le32(IDMAC_DES0_OWN | in dw_mci_prepare_desc32()
698 desc->des2 = cpu_to_le32(mem_addr); in dw_mci_prepare_desc32()
709 desc_first->des0 |= cpu_to_le32(IDMAC_DES0_FD); in dw_mci_prepare_desc32()
712 desc_last->des0 &= cpu_to_le32(~(IDMAC_DES0_CH | in dw_mci_prepare_desc32()
714 desc_last->des0 |= cpu_to_le32(IDMAC_DES0_LD); in dw_mci_prepare_desc32()
719 dev_dbg(host->dev, "descriptor is still owned by IDMAC.\n"); in dw_mci_prepare_desc32()
720 memset(host->sg_cpu, 0, DESC_RING_BUF_SZ); in dw_mci_prepare_desc32()
722 return -EINVAL; in dw_mci_prepare_desc32()
725 static int dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) in dw_mci_idmac_start_dma()
728 int ret; in dw_mci_idmac_start_dma()
730 if (host->dma_64bit_address == 1) in dw_mci_idmac_start_dma()
731 ret = dw_mci_prepare_desc64(host, host->data, sg_len); in dw_mci_idmac_start_dma()
733 ret = dw_mci_prepare_desc32(host, host->data, sg_len); in dw_mci_idmac_start_dma()
775 dmaengine_terminate_async(host->dms->ch); in dw_mci_edmac_stop_dma()
778 static int dw_mci_edmac_start_dma(struct dw_mci *host, in dw_mci_edmac_start_dma()
779 unsigned int sg_len) in dw_mci_edmac_start_dma()
783 struct scatterlist *sgl = host->data->sg; in dw_mci_edmac_start_dma()
785 u32 sg_elems = host->data->sg_len; in dw_mci_edmac_start_dma()
787 u32 fifo_offset = host->fifo_reg - host->regs; in dw_mci_edmac_start_dma()
788 int ret = 0; in dw_mci_edmac_start_dma()
792 cfg.dst_addr = host->phy_regs + fifo_offset; in dw_mci_edmac_start_dma()
802 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
807 ret = dmaengine_slave_config(host->dms->ch, &cfg); in dw_mci_edmac_start_dma()
809 dev_err(host->dev, "Failed to config edmac.\n"); in dw_mci_edmac_start_dma()
810 return -EBUSY; in dw_mci_edmac_start_dma()
813 desc = dmaengine_prep_slave_sg(host->dms->ch, sgl, in dw_mci_edmac_start_dma()
817 dev_err(host->dev, "Can't prepare slave sg.\n"); in dw_mci_edmac_start_dma()
818 return -EBUSY; in dw_mci_edmac_start_dma()
822 desc->callback = dw_mci_dmac_complete_dma; in dw_mci_edmac_start_dma()
823 desc->callback_param = (void *)host; in dw_mci_edmac_start_dma()
827 if (host->data->flags & MMC_DATA_WRITE) in dw_mci_edmac_start_dma()
828 dma_sync_sg_for_device(mmc_dev(host->slot->mmc), sgl, in dw_mci_edmac_start_dma()
831 dma_async_issue_pending(host->dms->ch); in dw_mci_edmac_start_dma()
836 static int dw_mci_edmac_init(struct dw_mci *host) in dw_mci_edmac_init()
839 host->dms = kzalloc(sizeof(struct dw_mci_dma_slave), GFP_KERNEL); in dw_mci_edmac_init()
840 if (!host->dms) in dw_mci_edmac_init()
841 return -ENOMEM; in dw_mci_edmac_init()
843 host->dms->ch = dma_request_chan(host->dev, "rx-tx"); in dw_mci_edmac_init()
844 if (IS_ERR(host->dms->ch)) { in dw_mci_edmac_init()
845 int ret = PTR_ERR(host->dms->ch); in dw_mci_edmac_init()
847 dev_err(host->dev, "Failed to get external DMA channel.\n"); in dw_mci_edmac_init()
848 kfree(host->dms); in dw_mci_edmac_init()
849 host->dms = NULL; in dw_mci_edmac_init()
858 if (host->dms) { in dw_mci_edmac_exit()
859 if (host->dms->ch) { in dw_mci_edmac_exit()
860 dma_release_channel(host->dms->ch); in dw_mci_edmac_exit()
861 host->dms->ch = NULL; in dw_mci_edmac_exit()
863 kfree(host->dms); in dw_mci_edmac_exit()
864 host->dms = NULL; in dw_mci_edmac_exit()
877 static int dw_mci_pre_dma_transfer(struct dw_mci *host, in dw_mci_pre_dma_transfer()
879 int cookie) in dw_mci_pre_dma_transfer()
882 unsigned int i, sg_len; in dw_mci_pre_dma_transfer()
884 if (data->host_cookie == COOKIE_PRE_MAPPED) in dw_mci_pre_dma_transfer()
885 return data->sg_len; in dw_mci_pre_dma_transfer()
889 * non-word-aligned buffers or lengths. Also, we don't bother in dw_mci_pre_dma_transfer()
892 if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) in dw_mci_pre_dma_transfer()
893 return -EINVAL; in dw_mci_pre_dma_transfer()
895 if (data->blksz & 3) in dw_mci_pre_dma_transfer()
896 return -EINVAL; in dw_mci_pre_dma_transfer()
898 for_each_sg(data->sg, sg, data->sg_len, i) { in dw_mci_pre_dma_transfer()
899 if (sg->offset & 3 || sg->length & 3) in dw_mci_pre_dma_transfer()
900 return -EINVAL; in dw_mci_pre_dma_transfer()
903 sg_len = dma_map_sg(host->dev, in dw_mci_pre_dma_transfer()
904 data->sg, in dw_mci_pre_dma_transfer()
905 data->sg_len, in dw_mci_pre_dma_transfer()
908 return -EINVAL; in dw_mci_pre_dma_transfer()
910 data->host_cookie = cookie; in dw_mci_pre_dma_transfer()
919 struct mmc_data *data = mrq->data; in dw_mci_pre_req()
921 if (!slot->host->use_dma || !data) in dw_mci_pre_req()
925 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_pre_req()
927 if (dw_mci_pre_dma_transfer(slot->host, mrq->data, in dw_mci_pre_req()
929 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_pre_req()
934 int err) in dw_mci_post_req()
937 struct mmc_data *data = mrq->data; in dw_mci_post_req()
939 if (!slot->host->use_dma || !data) in dw_mci_post_req()
942 if (data->host_cookie != COOKIE_UNMAPPED) in dw_mci_post_req()
943 dma_unmap_sg(slot->host->dev, in dw_mci_post_req()
944 data->sg, in dw_mci_post_req()
945 data->sg_len, in dw_mci_post_req()
947 data->host_cookie = COOKIE_UNMAPPED; in dw_mci_post_req()
950 static int dw_mci_get_cd(struct mmc_host *mmc) in dw_mci_get_cd()
952 int present; in dw_mci_get_cd()
954 struct dw_mci *host = slot->host; in dw_mci_get_cd()
955 int gpio_cd = mmc_gpio_get_cd(mmc); in dw_mci_get_cd()
958 if (((mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_get_cd()
962 if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { in dw_mci_get_cd()
963 if (mmc->caps & MMC_CAP_NEEDS_POLL) { in dw_mci_get_cd()
964 dev_info(&mmc->class_dev, in dw_mci_get_cd()
967 dev_info(&mmc->class_dev, in dw_mci_get_cd()
968 "card is non-removable.\n"); in dw_mci_get_cd()
970 set_bit(DW_MMC_CARD_PRESENT, &slot->flags); in dw_mci_get_cd()
977 present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) in dw_mci_get_cd()
980 spin_lock_bh(&host->lock); in dw_mci_get_cd()
981 if (present && !test_and_set_bit(DW_MMC_CARD_PRESENT, &slot->flags)) in dw_mci_get_cd()
982 dev_dbg(&mmc->class_dev, "card is present\n"); in dw_mci_get_cd()
984 !test_and_clear_bit(DW_MMC_CARD_PRESENT, &slot->flags)) in dw_mci_get_cd()
985 dev_dbg(&mmc->class_dev, "card is not present\n"); in dw_mci_get_cd()
986 spin_unlock_bh(&host->lock); in dw_mci_get_cd()
993 unsigned int blksz = data->blksz; in dw_mci_adjust_fifoth()
995 u32 fifo_width = 1 << host->data_shift; in dw_mci_adjust_fifoth()
998 int idx = ARRAY_SIZE(mszs) - 1; in dw_mci_adjust_fifoth()
1001 if (!host->use_dma) in dw_mci_adjust_fifoth()
1004 tx_wmark = (host->fifo_depth) / 2; in dw_mci_adjust_fifoth()
1005 tx_wmark_invers = host->fifo_depth - tx_wmark; in dw_mci_adjust_fifoth()
1018 rx_wmark = mszs[idx] - 1; in dw_mci_adjust_fifoth()
1021 } while (--idx > 0); in dw_mci_adjust_fifoth()
1033 unsigned int blksz = data->blksz; in dw_mci_ctrl_thld()
1042 if (host->verid < DW_MMC_240A || in dw_mci_ctrl_thld()
1043 (host->verid < DW_MMC_280A && data->flags & MMC_DATA_WRITE)) in dw_mci_ctrl_thld()
1048 * It's used when HS400 mode is enabled. in dw_mci_ctrl_thld()
1050 if (data->flags & MMC_DATA_WRITE && in dw_mci_ctrl_thld()
1051 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1054 if (data->flags & MMC_DATA_WRITE) in dw_mci_ctrl_thld()
1059 if (host->timing != MMC_TIMING_MMC_HS200 && in dw_mci_ctrl_thld()
1060 host->timing != MMC_TIMING_UHS_SDR104 && in dw_mci_ctrl_thld()
1061 host->timing != MMC_TIMING_MMC_HS400) in dw_mci_ctrl_thld()
1064 blksz_depth = blksz / (1 << host->data_shift); in dw_mci_ctrl_thld()
1065 fifo_depth = host->fifo_depth; in dw_mci_ctrl_thld()
1083 static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) in dw_mci_submit_data_dma()
1086 int sg_len; in dw_mci_submit_data_dma()
1089 host->using_dma = 0; in dw_mci_submit_data_dma()
1092 if (!host->use_dma) in dw_mci_submit_data_dma()
1093 return -ENODEV; in dw_mci_submit_data_dma()
1097 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1101 host->using_dma = 1; in dw_mci_submit_data_dma()
1103 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_submit_data_dma()
1104 dev_vdbg(host->dev, in dw_mci_submit_data_dma()
1106 (unsigned long)host->sg_cpu, in dw_mci_submit_data_dma()
1107 (unsigned long)host->sg_dma, in dw_mci_submit_data_dma()
1115 if (host->prev_blksz != data->blksz) in dw_mci_submit_data_dma()
1124 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1128 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data_dma()
1130 if (host->dma_ops->start(host, sg_len)) { in dw_mci_submit_data_dma()
1131 host->dma_ops->stop(host); in dw_mci_submit_data_dma()
1133 dev_dbg(host->dev, in dw_mci_submit_data_dma()
1136 return -ENODEV; in dw_mci_submit_data_dma()
1145 int flags = SG_MITER_ATOMIC; in dw_mci_submit_data()
1148 data->error = -EINPROGRESS; in dw_mci_submit_data()
1150 WARN_ON(host->data); in dw_mci_submit_data()
1151 host->sg = NULL; in dw_mci_submit_data()
1152 host->data = data; in dw_mci_submit_data()
1154 if (data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1155 host->dir_status = DW_MCI_RECV_STATUS; in dw_mci_submit_data()
1157 host->dir_status = DW_MCI_SEND_STATUS; in dw_mci_submit_data()
1162 if (host->data->flags & MMC_DATA_READ) in dw_mci_submit_data()
1167 sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); in dw_mci_submit_data()
1168 host->sg = data->sg; in dw_mci_submit_data()
1169 host->part_buf_start = 0; in dw_mci_submit_data()
1170 host->part_buf_count = 0; in dw_mci_submit_data()
1174 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_submit_data()
1178 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_submit_data()
1190 if (host->wm_aligned) in dw_mci_submit_data()
1193 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_submit_data()
1194 host->prev_blksz = 0; in dw_mci_submit_data()
1201 host->prev_blksz = data->blksz; in dw_mci_submit_data()
1207 struct dw_mci *host = slot->host; in dw_mci_setup_bus()
1208 unsigned int clock = slot->clock; in dw_mci_setup_bus()
1213 /* We must continue to set bit 28 in CMD until the change is complete */ in dw_mci_setup_bus()
1214 if (host->state == STATE_WAITING_CMD11_DONE) in dw_mci_setup_bus()
1217 slot->mmc->actual_clock = 0; in dw_mci_setup_bus()
1222 } else if (clock != host->current_speed || force_clkinit) { in dw_mci_setup_bus()
1223 div = host->bus_hz / clock; in dw_mci_setup_bus()
1224 if (host->bus_hz % clock && host->bus_hz > clock) in dw_mci_setup_bus()
1227 * over-clocking the card. in dw_mci_setup_bus()
1231 div = (host->bus_hz != clock) ? DIV_ROUND_UP(div, 2) : 0; in dw_mci_setup_bus()
1233 if ((clock != slot->__clk_old && in dw_mci_setup_bus()
1234 !test_bit(DW_MMC_CARD_NEEDS_POLL, &slot->flags)) || in dw_mci_setup_bus()
1238 dev_info(&slot->mmc->class_dev, in dw_mci_setup_bus()
1240 slot->id, host->bus_hz, clock, in dw_mci_setup_bus()
1241 div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1242 host->bus_hz, div); in dw_mci_setup_bus()
1248 if (slot->mmc->caps & MMC_CAP_NEEDS_POLL && in dw_mci_setup_bus()
1249 slot->mmc->f_min == clock) in dw_mci_setup_bus()
1250 set_bit(DW_MMC_CARD_NEEDS_POLL, &slot->flags); in dw_mci_setup_bus()
1267 clk_en_a = SDMMC_CLKEN_ENABLE << slot->id; in dw_mci_setup_bus()
1268 if (!test_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags)) in dw_mci_setup_bus()
1269 clk_en_a |= SDMMC_CLKEN_LOW_PWR << slot->id; in dw_mci_setup_bus()
1276 slot->__clk_old = clock; in dw_mci_setup_bus()
1277 slot->mmc->actual_clock = div ? ((host->bus_hz / div) >> 1) : in dw_mci_setup_bus()
1278 host->bus_hz; in dw_mci_setup_bus()
1281 host->current_speed = clock; in dw_mci_setup_bus()
1284 mci_writel(host, CTYPE, (slot->ctype << slot->id)); in dw_mci_setup_bus()
1288 unsigned int timeout_ns) in dw_mci_set_data_timeout()
1290 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_data_timeout()
1294 if (drv_data && drv_data->set_data_timeout) in dw_mci_set_data_timeout()
1295 return drv_data->set_data_timeout(host, timeout_ns); in dw_mci_set_data_timeout()
1301 tmp = DIV_ROUND_UP_ULL((u64)timeout_ns * host->bus_hz, NSEC_PER_SEC); in dw_mci_set_data_timeout()
1314 dev_dbg(host->dev, "timeout_ns: %u => TMOUT[31:8]: %#08x", in dw_mci_set_data_timeout()
1320 struct mmc_command *cmd) in __dw_mci_start_request() argument
1326 mrq = slot->mrq; in __dw_mci_start_request()
1328 host->mrq = mrq; in __dw_mci_start_request()
1330 host->pending_events = 0; in __dw_mci_start_request()
1331 host->completed_events = 0; in __dw_mci_start_request()
1332 host->cmd_status = 0; in __dw_mci_start_request()
1333 host->data_status = 0; in __dw_mci_start_request()
1334 host->dir_status = 0; in __dw_mci_start_request()
1336 data = cmd->data; in __dw_mci_start_request()
1338 dw_mci_set_data_timeout(host, data->timeout_ns); in __dw_mci_start_request()
1339 mci_writel(host, BYTCNT, data->blksz*data->blocks); in __dw_mci_start_request()
1340 mci_writel(host, BLKSIZ, data->blksz); in __dw_mci_start_request()
1343 cmdflags = dw_mci_prepare_command(slot->mmc, cmd); in __dw_mci_start_request()
1346 if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) in __dw_mci_start_request()
1354 dw_mci_start_command(host, cmd, cmdflags); in __dw_mci_start_request()
1356 if (cmd->opcode == SD_SWITCH_VOLTAGE) { in __dw_mci_start_request()
1369 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_start_request()
1370 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in __dw_mci_start_request()
1371 mod_timer(&host->cmd11_timer, in __dw_mci_start_request()
1373 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_start_request()
1376 host->stop_cmdr = dw_mci_prep_stop_abort(host, cmd); in __dw_mci_start_request()
1382 struct mmc_request *mrq = slot->mrq; in dw_mci_start_request()
1383 struct mmc_command *cmd; in dw_mci_start_request() local
1385 cmd = mrq->sbc ? mrq->sbc : mrq->cmd; in dw_mci_start_request()
1386 __dw_mci_start_request(host, slot, cmd); in dw_mci_start_request()
1389 /* must be called with host->lock held */
1393 dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", in dw_mci_queue_request()
1394 host->state); in dw_mci_queue_request()
1396 slot->mrq = mrq; in dw_mci_queue_request()
1398 if (host->state == STATE_WAITING_CMD11_DONE) { in dw_mci_queue_request()
1399 dev_warn(&slot->mmc->class_dev, in dw_mci_queue_request()
1406 host->state = STATE_IDLE; in dw_mci_queue_request()
1409 if (host->state == STATE_IDLE) { in dw_mci_queue_request()
1410 host->state = STATE_SENDING_CMD; in dw_mci_queue_request()
1413 list_add_tail(&slot->queue_node, &host->queue); in dw_mci_queue_request()
1420 struct dw_mci *host = slot->host; in dw_mci_request()
1422 WARN_ON(slot->mrq); in dw_mci_request()
1431 mrq->cmd->error = -ENOMEDIUM; in dw_mci_request()
1436 spin_lock_bh(&host->lock); in dw_mci_request()
1440 spin_unlock_bh(&host->lock); in dw_mci_request()
1446 const struct dw_mci_drv_data *drv_data = slot->host->drv_data; in dw_mci_set_ios()
1448 int ret; in dw_mci_set_ios()
1450 switch (ios->bus_width) { in dw_mci_set_ios()
1452 slot->ctype = SDMMC_CTYPE_4BIT; in dw_mci_set_ios()
1455 slot->ctype = SDMMC_CTYPE_8BIT; in dw_mci_set_ios()
1459 slot->ctype = SDMMC_CTYPE_1BIT; in dw_mci_set_ios()
1462 regs = mci_readl(slot->host, UHS_REG); in dw_mci_set_ios()
1465 if (ios->timing == MMC_TIMING_MMC_DDR52 || in dw_mci_set_ios()
1466 ios->timing == MMC_TIMING_UHS_DDR50 || in dw_mci_set_ios()
1467 ios->timing == MMC_TIMING_MMC_HS400) in dw_mci_set_ios()
1468 regs |= ((0x1 << slot->id) << 16); in dw_mci_set_ios()
1470 regs &= ~((0x1 << slot->id) << 16); in dw_mci_set_ios()
1472 mci_writel(slot->host, UHS_REG, regs); in dw_mci_set_ios()
1473 slot->host->timing = ios->timing; in dw_mci_set_ios()
1476 * Use mirror of ios->clock to prevent race with mmc in dw_mci_set_ios()
1479 slot->clock = ios->clock; in dw_mci_set_ios()
1481 if (drv_data && drv_data->set_ios) in dw_mci_set_ios()
1482 drv_data->set_ios(slot->host, ios); in dw_mci_set_ios()
1484 switch (ios->power_mode) { in dw_mci_set_ios()
1486 if (!IS_ERR(mmc->supply.vmmc)) { in dw_mci_set_ios()
1487 ret = mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, in dw_mci_set_ios()
1488 ios->vdd); in dw_mci_set_ios()
1490 dev_err(slot->host->dev, in dw_mci_set_ios()
1496 set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); in dw_mci_set_ios()
1497 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1498 regs |= (1 << slot->id); in dw_mci_set_ios()
1499 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1502 if (!slot->host->vqmmc_enabled) { in dw_mci_set_ios()
1503 if (!IS_ERR(mmc->supply.vqmmc)) { in dw_mci_set_ios()
1504 ret = regulator_enable(mmc->supply.vqmmc); in dw_mci_set_ios()
1506 dev_err(slot->host->dev, in dw_mci_set_ios()
1509 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1513 slot->host->vqmmc_enabled = true; in dw_mci_set_ios()
1517 dw_mci_ctrl_reset(slot->host, in dw_mci_set_ios()
1529 if (!IS_ERR(mmc->supply.vmmc)) in dw_mci_set_ios()
1530 mmc_regulator_set_ocr(mmc, mmc->supply.vmmc, 0); in dw_mci_set_ios()
1532 if (!IS_ERR(mmc->supply.vqmmc) && slot->host->vqmmc_enabled) in dw_mci_set_ios()
1533 regulator_disable(mmc->supply.vqmmc); in dw_mci_set_ios()
1534 slot->host->vqmmc_enabled = false; in dw_mci_set_ios()
1536 regs = mci_readl(slot->host, PWREN); in dw_mci_set_ios()
1537 regs &= ~(1 << slot->id); in dw_mci_set_ios()
1538 mci_writel(slot->host, PWREN, regs); in dw_mci_set_ios()
1544 if (slot->host->state == STATE_WAITING_CMD11_DONE && ios->clock != 0) in dw_mci_set_ios()
1545 slot->host->state = STATE_IDLE; in dw_mci_set_ios()
1548 static int dw_mci_card_busy(struct mmc_host *mmc) in dw_mci_card_busy()
1557 status = mci_readl(slot->host, STATUS); in dw_mci_card_busy()
1562 static int dw_mci_switch_voltage(struct mmc_host *mmc, struct mmc_ios *ios) in dw_mci_switch_voltage()
1565 struct dw_mci *host = slot->host; in dw_mci_switch_voltage()
1566 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_switch_voltage()
1568 u32 v18 = SDMMC_UHS_18V << slot->id; in dw_mci_switch_voltage()
1569 int ret; in dw_mci_switch_voltage()
1571 if (drv_data && drv_data->switch_voltage) in dw_mci_switch_voltage()
1572 return drv_data->switch_voltage(mmc, ios); in dw_mci_switch_voltage()
1580 if (ios->signal_voltage == MMC_SIGNAL_VOLTAGE_330) in dw_mci_switch_voltage()
1585 if (!IS_ERR(mmc->supply.vqmmc)) { in dw_mci_switch_voltage()
1588 dev_dbg(&mmc->class_dev, in dw_mci_switch_voltage()
1589 "Regulator set error %d - %s V\n", in dw_mci_switch_voltage()
1599 static int dw_mci_get_ro(struct mmc_host *mmc) in dw_mci_get_ro()
1601 int read_only; in dw_mci_get_ro()
1603 int gpio_ro = mmc_gpio_get_ro(mmc); in dw_mci_get_ro()
1610 mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; in dw_mci_get_ro()
1612 dev_dbg(&mmc->class_dev, "card is %s\n", in dw_mci_get_ro()
1613 read_only ? "read-only" : "read-write"); in dw_mci_get_ro()
1621 struct dw_mci *host = slot->host; in dw_mci_hw_reset()
1622 int reset; in dw_mci_hw_reset()
1624 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_hw_reset()
1638 reset &= ~(SDMMC_RST_HWACTIVE << slot->id); in dw_mci_hw_reset()
1641 reset |= SDMMC_RST_HWACTIVE << slot->id; in dw_mci_hw_reset()
1648 struct dw_mci *host = slot->host; in dw_mci_prepare_sdio_irq()
1649 const u32 clken_low_pwr = SDMMC_CLKEN_LOW_PWR << slot->id; in dw_mci_prepare_sdio_irq()
1661 set_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags); in dw_mci_prepare_sdio_irq()
1664 clear_bit(DW_MMC_CARD_NO_LOW_PWR, &slot->flags); in dw_mci_prepare_sdio_irq()
1675 static void __dw_mci_enable_sdio_irq(struct dw_mci_slot *slot, int enb) in __dw_mci_enable_sdio_irq()
1677 struct dw_mci *host = slot->host; in __dw_mci_enable_sdio_irq()
1681 spin_lock_irqsave(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1686 int_mask |= SDMMC_INT_SDIO(slot->sdio_id); in __dw_mci_enable_sdio_irq()
1688 int_mask &= ~SDMMC_INT_SDIO(slot->sdio_id); in __dw_mci_enable_sdio_irq()
1691 spin_unlock_irqrestore(&host->irq_lock, irqflags); in __dw_mci_enable_sdio_irq()
1694 static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) in dw_mci_enable_sdio_irq()
1697 struct dw_mci *host = slot->host; in dw_mci_enable_sdio_irq()
1704 pm_runtime_get_noresume(host->dev); in dw_mci_enable_sdio_irq()
1706 pm_runtime_put_noidle(host->dev); in dw_mci_enable_sdio_irq()
1716 static int dw_mci_execute_tuning(struct mmc_host *mmc, u32 opcode) in dw_mci_execute_tuning()
1719 struct dw_mci *host = slot->host; in dw_mci_execute_tuning()
1720 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_execute_tuning()
1721 int err = -EINVAL; in dw_mci_execute_tuning()
1723 if (drv_data && drv_data->execute_tuning) in dw_mci_execute_tuning()
1724 err = drv_data->execute_tuning(slot, opcode); in dw_mci_execute_tuning()
1728 static int dw_mci_prepare_hs400_tuning(struct mmc_host *mmc, in dw_mci_prepare_hs400_tuning()
1732 struct dw_mci *host = slot->host; in dw_mci_prepare_hs400_tuning()
1733 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_prepare_hs400_tuning()
1735 if (drv_data && drv_data->prepare_hs400_tuning) in dw_mci_prepare_hs400_tuning()
1736 return drv_data->prepare_hs400_tuning(host, ios); in dw_mci_prepare_hs400_tuning()
1749 * the scatter-gather pointer to NULL. in dw_mci_reset()
1751 if (host->sg) { in dw_mci_reset()
1752 sg_miter_stop(&host->sg_miter); in dw_mci_reset()
1753 host->sg = NULL; in dw_mci_reset()
1756 if (host->use_dma) in dw_mci_reset()
1766 if (!host->use_dma) { in dw_mci_reset()
1772 if (readl_poll_timeout_atomic(host->regs + SDMMC_STATUS, in dw_mci_reset()
1776 dev_err(host->dev, in dw_mci_reset()
1788 dev_err(host->dev, in dw_mci_reset()
1795 if (host->use_dma == TRANS_MODE_IDMAC) in dw_mci_reset()
1803 mci_send_cmd(host->slot, SDMMC_CMD_UPD_CLK, 0); in dw_mci_reset()
1830 spin_lock_irqsave(&host->irq_lock, flags); in dw_mci_fault_timer()
1836 if (!host->data_status) { in dw_mci_fault_timer()
1837 host->data_status = SDMMC_INT_DCRC; in dw_mci_fault_timer()
1838 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_fault_timer()
1839 tasklet_schedule(&host->tasklet); in dw_mci_fault_timer()
1842 spin_unlock_irqrestore(&host->irq_lock, flags); in dw_mci_fault_timer()
1849 struct mmc_data *data = host->data; in dw_mci_start_fault_timer()
1851 if (!data || data->blocks <= 1) in dw_mci_start_fault_timer()
1854 if (!should_fail(&host->fail_data_crc, 1)) in dw_mci_start_fault_timer()
1860 hrtimer_start(&host->fault_timer, in dw_mci_start_fault_timer()
1867 hrtimer_cancel(&host->fault_timer); in dw_mci_stop_fault_timer()
1872 host->fail_data_crc = (struct fault_attr) FAULT_ATTR_INITIALIZER; in dw_mci_init_fault()
1874 hrtimer_init(&host->fault_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); in dw_mci_init_fault()
1875 host->fault_timer.function = dw_mci_fault_timer; in dw_mci_init_fault()
1892 __releases(&host->lock) in dw_mci_request_end()
1893 __acquires(&host->lock) in dw_mci_request_end()
1896 struct mmc_host *prev_mmc = host->slot->mmc; in dw_mci_request_end()
1898 WARN_ON(host->cmd || host->data); in dw_mci_request_end()
1900 host->slot->mrq = NULL; in dw_mci_request_end()
1901 host->mrq = NULL; in dw_mci_request_end()
1902 if (!list_empty(&host->queue)) { in dw_mci_request_end()
1903 slot = list_entry(host->queue.next, in dw_mci_request_end()
1905 list_del(&slot->queue_node); in dw_mci_request_end()
1906 dev_vdbg(host->dev, "list not empty: %s is next\n", in dw_mci_request_end()
1907 mmc_hostname(slot->mmc)); in dw_mci_request_end()
1908 host->state = STATE_SENDING_CMD; in dw_mci_request_end()
1911 dev_vdbg(host->dev, "list empty\n"); in dw_mci_request_end()
1913 if (host->state == STATE_SENDING_CMD11) in dw_mci_request_end()
1914 host->state = STATE_WAITING_CMD11_DONE; in dw_mci_request_end()
1916 host->state = STATE_IDLE; in dw_mci_request_end()
1919 spin_unlock(&host->lock); in dw_mci_request_end()
1921 spin_lock(&host->lock); in dw_mci_request_end()
1924 static int dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) in dw_mci_command_complete() argument
1926 u32 status = host->cmd_status; in dw_mci_command_complete()
1928 host->cmd_status = 0; in dw_mci_command_complete()
1931 if (cmd->flags & MMC_RSP_PRESENT) { in dw_mci_command_complete()
1932 if (cmd->flags & MMC_RSP_136) { in dw_mci_command_complete()
1933 cmd->resp[3] = mci_readl(host, RESP0); in dw_mci_command_complete()
1934 cmd->resp[2] = mci_readl(host, RESP1); in dw_mci_command_complete()
1935 cmd->resp[1] = mci_readl(host, RESP2); in dw_mci_command_complete()
1936 cmd->resp[0] = mci_readl(host, RESP3); in dw_mci_command_complete()
1938 cmd->resp[0] = mci_readl(host, RESP0); in dw_mci_command_complete()
1939 cmd->resp[1] = 0; in dw_mci_command_complete()
1940 cmd->resp[2] = 0; in dw_mci_command_complete()
1941 cmd->resp[3] = 0; in dw_mci_command_complete()
1946 cmd->error = -ETIMEDOUT; in dw_mci_command_complete()
1947 else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) in dw_mci_command_complete()
1948 cmd->error = -EILSEQ; in dw_mci_command_complete()
1950 cmd->error = -EIO; in dw_mci_command_complete()
1952 cmd->error = 0; in dw_mci_command_complete()
1954 return cmd->error; in dw_mci_command_complete()
1957 static int dw_mci_data_complete(struct dw_mci *host, struct mmc_data *data) in dw_mci_data_complete()
1959 u32 status = host->data_status; in dw_mci_data_complete()
1963 data->error = -ETIMEDOUT; in dw_mci_data_complete()
1965 data->error = -EILSEQ; in dw_mci_data_complete()
1967 if (host->dir_status == in dw_mci_data_complete()
1974 data->bytes_xfered = 0; in dw_mci_data_complete()
1975 data->error = -ETIMEDOUT; in dw_mci_data_complete()
1976 } else if (host->dir_status == in dw_mci_data_complete()
1978 data->error = -EILSEQ; in dw_mci_data_complete()
1982 data->error = -EILSEQ; in dw_mci_data_complete()
1985 dev_dbg(host->dev, "data error, status 0x%08x\n", status); in dw_mci_data_complete()
1993 data->bytes_xfered = data->blocks * data->blksz; in dw_mci_data_complete()
1994 data->error = 0; in dw_mci_data_complete()
1997 return data->error; in dw_mci_data_complete()
2002 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_set_drto()
2003 unsigned int drto_clks; in dw_mci_set_drto()
2004 unsigned int drto_div; in dw_mci_set_drto()
2005 unsigned int drto_ms; in dw_mci_set_drto()
2008 if (drv_data && drv_data->get_drto_clks) in dw_mci_set_drto()
2009 drto_clks = drv_data->get_drto_clks(host); in dw_mci_set_drto()
2017 host->bus_hz); in dw_mci_set_drto()
2019 dev_dbg(host->dev, "drto_ms: %u\n", drto_ms); in dw_mci_set_drto()
2024 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_set_drto()
2025 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_set_drto()
2026 mod_timer(&host->dto_timer, in dw_mci_set_drto()
2028 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_set_drto()
2033 if (!test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_cmd_complete()
2043 WARN_ON(del_timer_sync(&host->cto_timer)); in dw_mci_clear_pending_cmd_complete()
2044 clear_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_clear_pending_cmd_complete()
2051 if (!test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) in dw_mci_clear_pending_data_complete()
2055 WARN_ON(del_timer_sync(&host->dto_timer)); in dw_mci_clear_pending_data_complete()
2056 clear_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_clear_pending_data_complete()
2065 struct mmc_command *cmd; in dw_mci_tasklet_func() local
2069 unsigned int err; in dw_mci_tasklet_func()
2071 spin_lock(&host->lock); in dw_mci_tasklet_func()
2073 state = host->state; in dw_mci_tasklet_func()
2074 data = host->data; in dw_mci_tasklet_func()
2075 mrq = host->mrq; in dw_mci_tasklet_func()
2090 cmd = host->cmd; in dw_mci_tasklet_func()
2091 host->cmd = NULL; in dw_mci_tasklet_func()
2092 set_bit(EVENT_CMD_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2093 err = dw_mci_command_complete(host, cmd); in dw_mci_tasklet_func()
2094 if (cmd == mrq->sbc && !err) { in dw_mci_tasklet_func()
2095 __dw_mci_start_request(host, host->slot, in dw_mci_tasklet_func()
2096 mrq->cmd); in dw_mci_tasklet_func()
2100 if (cmd->data && err) { in dw_mci_tasklet_func()
2122 if (err != -ETIMEDOUT && in dw_mci_tasklet_func()
2123 host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_tasklet_func()
2134 if (!cmd->data || err) { in dw_mci_tasklet_func()
2152 &host->pending_events)) { in dw_mci_tasklet_func()
2153 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2162 &host->pending_events)) { in dw_mci_tasklet_func()
2164 * If all data-related interrupts don't come in dw_mci_tasklet_func()
2167 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2172 set_bit(EVENT_XFER_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2188 &host->pending_events)) { in dw_mci_tasklet_func()
2189 if (!(host->data_status & (SDMMC_INT_DRTO | in dw_mci_tasklet_func()
2207 if (host->dir_status == DW_MCI_RECV_STATUS) in dw_mci_tasklet_func()
2213 host->data = NULL; in dw_mci_tasklet_func()
2214 set_bit(EVENT_DATA_COMPLETE, &host->completed_events); in dw_mci_tasklet_func()
2218 if (!data->stop || mrq->sbc) { in dw_mci_tasklet_func()
2219 if (mrq->sbc && data->stop) in dw_mci_tasklet_func()
2220 data->stop->error = 0; in dw_mci_tasklet_func()
2225 /* stop command for open-ended transfer*/ in dw_mci_tasklet_func()
2226 if (data->stop) in dw_mci_tasklet_func()
2239 &host->pending_events)) { in dw_mci_tasklet_func()
2240 host->cmd = NULL; in dw_mci_tasklet_func()
2247 * If err has non-zero, in dw_mci_tasklet_func()
2248 * stop-abort command has been already issued. in dw_mci_tasklet_func()
2258 /* CMD error in data command */ in dw_mci_tasklet_func()
2259 if (mrq->cmd->error && mrq->data) in dw_mci_tasklet_func()
2263 host->cmd = NULL; in dw_mci_tasklet_func()
2264 host->data = NULL; in dw_mci_tasklet_func()
2266 if (!mrq->sbc && mrq->stop) in dw_mci_tasklet_func()
2267 dw_mci_command_complete(host, mrq->stop); in dw_mci_tasklet_func()
2269 host->cmd_status = 0; in dw_mci_tasklet_func()
2276 &host->pending_events)) in dw_mci_tasklet_func()
2284 host->state = state; in dw_mci_tasklet_func()
2286 spin_unlock(&host->lock); in dw_mci_tasklet_func()
2291 static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_set_part_bytes()
2293 memcpy((void *)&host->part_buf, buf, cnt); in dw_mci_set_part_bytes()
2294 host->part_buf_count = cnt; in dw_mci_set_part_bytes()
2298 static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_part_bytes()
2300 cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); in dw_mci_push_part_bytes()
2301 memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); in dw_mci_push_part_bytes()
2302 host->part_buf_count += cnt; in dw_mci_push_part_bytes()
2307 static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_part_bytes()
2309 cnt = min_t(int, cnt, host->part_buf_count); in dw_mci_pull_part_bytes()
2311 memcpy(buf, (void *)&host->part_buf + host->part_buf_start, in dw_mci_pull_part_bytes()
2313 host->part_buf_count -= cnt; in dw_mci_pull_part_bytes()
2314 host->part_buf_start += cnt; in dw_mci_pull_part_bytes()
2320 static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_final_bytes()
2322 memcpy(buf, &host->part_buf, cnt); in dw_mci_pull_final_bytes()
2323 host->part_buf_start = cnt; in dw_mci_pull_final_bytes()
2324 host->part_buf_count = (1 << host->data_shift) - cnt; in dw_mci_pull_final_bytes()
2327 static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data16()
2329 struct mmc_data *data = host->data; in dw_mci_push_data16()
2330 int init_cnt = cnt; in dw_mci_push_data16()
2333 if (unlikely(host->part_buf_count)) { in dw_mci_push_data16()
2334 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data16()
2337 cnt -= len; in dw_mci_push_data16()
2338 if (host->part_buf_count == 2) { in dw_mci_push_data16()
2339 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2340 host->part_buf_count = 0; in dw_mci_push_data16()
2347 int len = min(cnt & -2, (int)sizeof(aligned_buf)); in dw_mci_push_data16()
2348 int items = len >> 1; in dw_mci_push_data16()
2349 int i; in dw_mci_push_data16()
2353 cnt -= len; in dw_mci_push_data16()
2356 mci_fifo_writew(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data16()
2363 for (; cnt >= 2; cnt -= 2) in dw_mci_push_data16()
2364 mci_fifo_writew(host->fifo_reg, *pdata++); in dw_mci_push_data16()
2371 if ((data->bytes_xfered + init_cnt) == in dw_mci_push_data16()
2372 (data->blksz * data->blocks)) in dw_mci_push_data16()
2373 mci_fifo_writew(host->fifo_reg, host->part_buf16); in dw_mci_push_data16()
2377 static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data16()
2384 int len = min(cnt & -2, (int)sizeof(aligned_buf)); in dw_mci_pull_data16()
2385 int items = len >> 1; in dw_mci_pull_data16()
2386 int i; in dw_mci_pull_data16()
2389 aligned_buf[i] = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2393 cnt -= len; in dw_mci_pull_data16()
2400 for (; cnt >= 2; cnt -= 2) in dw_mci_pull_data16()
2401 *pdata++ = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2405 host->part_buf16 = mci_fifo_readw(host->fifo_reg); in dw_mci_pull_data16()
2410 static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data32()
2412 struct mmc_data *data = host->data; in dw_mci_push_data32()
2413 int init_cnt = cnt; in dw_mci_push_data32()
2416 if (unlikely(host->part_buf_count)) { in dw_mci_push_data32()
2417 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data32()
2420 cnt -= len; in dw_mci_push_data32()
2421 if (host->part_buf_count == 4) { in dw_mci_push_data32()
2422 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2423 host->part_buf_count = 0; in dw_mci_push_data32()
2430 int len = min(cnt & -4, (int)sizeof(aligned_buf)); in dw_mci_push_data32()
2431 int items = len >> 2; in dw_mci_push_data32()
2432 int i; in dw_mci_push_data32()
2436 cnt -= len; in dw_mci_push_data32()
2439 mci_fifo_writel(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data32()
2446 for (; cnt >= 4; cnt -= 4) in dw_mci_push_data32()
2447 mci_fifo_writel(host->fifo_reg, *pdata++); in dw_mci_push_data32()
2454 if ((data->bytes_xfered + init_cnt) == in dw_mci_push_data32()
2455 (data->blksz * data->blocks)) in dw_mci_push_data32()
2456 mci_fifo_writel(host->fifo_reg, host->part_buf32); in dw_mci_push_data32()
2460 static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data32()
2467 int len = min(cnt & -4, (int)sizeof(aligned_buf)); in dw_mci_pull_data32()
2468 int items = len >> 2; in dw_mci_pull_data32()
2469 int i; in dw_mci_pull_data32()
2472 aligned_buf[i] = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2476 cnt -= len; in dw_mci_pull_data32()
2483 for (; cnt >= 4; cnt -= 4) in dw_mci_pull_data32()
2484 *pdata++ = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2488 host->part_buf32 = mci_fifo_readl(host->fifo_reg); in dw_mci_pull_data32()
2493 static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_push_data64()
2495 struct mmc_data *data = host->data; in dw_mci_push_data64()
2496 int init_cnt = cnt; in dw_mci_push_data64()
2499 if (unlikely(host->part_buf_count)) { in dw_mci_push_data64()
2500 int len = dw_mci_push_part_bytes(host, buf, cnt); in dw_mci_push_data64()
2503 cnt -= len; in dw_mci_push_data64()
2505 if (host->part_buf_count == 8) { in dw_mci_push_data64()
2506 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2507 host->part_buf_count = 0; in dw_mci_push_data64()
2514 int len = min(cnt & -8, (int)sizeof(aligned_buf)); in dw_mci_push_data64()
2515 int items = len >> 3; in dw_mci_push_data64()
2516 int i; in dw_mci_push_data64()
2520 cnt -= len; in dw_mci_push_data64()
2523 mci_fifo_writeq(host->fifo_reg, aligned_buf[i]); in dw_mci_push_data64()
2530 for (; cnt >= 8; cnt -= 8) in dw_mci_push_data64()
2531 mci_fifo_writeq(host->fifo_reg, *pdata++); in dw_mci_push_data64()
2538 if ((data->bytes_xfered + init_cnt) == in dw_mci_push_data64()
2539 (data->blksz * data->blocks)) in dw_mci_push_data64()
2540 mci_fifo_writeq(host->fifo_reg, host->part_buf); in dw_mci_push_data64()
2544 static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data64()
2551 int len = min(cnt & -8, (int)sizeof(aligned_buf)); in dw_mci_pull_data64()
2552 int items = len >> 3; in dw_mci_pull_data64()
2553 int i; in dw_mci_pull_data64()
2556 aligned_buf[i] = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2561 cnt -= len; in dw_mci_pull_data64()
2568 for (; cnt >= 8; cnt -= 8) in dw_mci_pull_data64()
2569 *pdata++ = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2573 host->part_buf = mci_fifo_readq(host->fifo_reg); in dw_mci_pull_data64()
2578 static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) in dw_mci_pull_data()
2580 int len; in dw_mci_pull_data()
2587 cnt -= len; in dw_mci_pull_data()
2590 host->pull_data(host, buf, cnt); in dw_mci_pull_data()
2595 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_read_data_pio()
2597 unsigned int offset; in dw_mci_read_data_pio()
2598 struct mmc_data *data = host->data; in dw_mci_read_data_pio()
2599 int shift = host->data_shift; in dw_mci_read_data_pio()
2601 unsigned int len; in dw_mci_read_data_pio()
2602 unsigned int remain, fcnt; in dw_mci_read_data_pio()
2608 host->sg = sg_miter->piter.sg; in dw_mci_read_data_pio()
2609 buf = sg_miter->addr; in dw_mci_read_data_pio()
2610 remain = sg_miter->length; in dw_mci_read_data_pio()
2615 << shift) + host->part_buf_count; in dw_mci_read_data_pio()
2620 data->bytes_xfered += len; in dw_mci_read_data_pio()
2622 remain -= len; in dw_mci_read_data_pio()
2625 sg_miter->consumed = offset; in dw_mci_read_data_pio()
2635 sg_miter->consumed = 0; in dw_mci_read_data_pio()
2642 host->sg = NULL; in dw_mci_read_data_pio()
2644 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_read_data_pio()
2649 struct sg_mapping_iter *sg_miter = &host->sg_miter; in dw_mci_write_data_pio()
2651 unsigned int offset; in dw_mci_write_data_pio()
2652 struct mmc_data *data = host->data; in dw_mci_write_data_pio()
2653 int shift = host->data_shift; in dw_mci_write_data_pio()
2655 unsigned int len; in dw_mci_write_data_pio()
2656 unsigned int fifo_depth = host->fifo_depth; in dw_mci_write_data_pio()
2657 unsigned int remain, fcnt; in dw_mci_write_data_pio()
2663 host->sg = sg_miter->piter.sg; in dw_mci_write_data_pio()
2664 buf = sg_miter->addr; in dw_mci_write_data_pio()
2665 remain = sg_miter->length; in dw_mci_write_data_pio()
2669 fcnt = ((fifo_depth - in dw_mci_write_data_pio()
2671 << shift) - host->part_buf_count; in dw_mci_write_data_pio()
2675 host->push_data(host, (void *)(buf + offset), len); in dw_mci_write_data_pio()
2676 data->bytes_xfered += len; in dw_mci_write_data_pio()
2678 remain -= len; in dw_mci_write_data_pio()
2681 sg_miter->consumed = offset; in dw_mci_write_data_pio()
2689 sg_miter->consumed = 0; in dw_mci_write_data_pio()
2696 host->sg = NULL; in dw_mci_write_data_pio()
2698 set_bit(EVENT_XFER_COMPLETE, &host->pending_events); in dw_mci_write_data_pio()
2703 del_timer(&host->cto_timer); in dw_mci_cmd_interrupt()
2705 if (!host->cmd_status) in dw_mci_cmd_interrupt()
2706 host->cmd_status = status; in dw_mci_cmd_interrupt()
2710 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd_interrupt()
2711 tasklet_schedule(&host->tasklet); in dw_mci_cmd_interrupt()
2718 struct dw_mci_slot *slot = host->slot; in dw_mci_handle_cd()
2720 mmc_detect_change(slot->mmc, in dw_mci_handle_cd()
2721 msecs_to_jiffies(host->pdata->detect_delay_ms)); in dw_mci_handle_cd()
2724 static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) in dw_mci_interrupt()
2728 struct dw_mci_slot *slot = host->slot; in dw_mci_interrupt()
2730 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_interrupt()
2734 if ((host->state == STATE_SENDING_CMD11) && in dw_mci_interrupt()
2743 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2745 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2747 del_timer(&host->cmd11_timer); in dw_mci_interrupt()
2751 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2753 del_timer(&host->cto_timer); in dw_mci_interrupt()
2755 host->cmd_status = pending; in dw_mci_interrupt()
2757 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2759 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2763 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2765 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2766 del_timer(&host->dto_timer); in dw_mci_interrupt()
2770 host->data_status = pending; in dw_mci_interrupt()
2772 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_interrupt()
2774 if (host->quirks & DW_MMC_QUIRK_EXTENDED_TMOUT) in dw_mci_interrupt()
2777 &host->pending_events); in dw_mci_interrupt()
2779 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2781 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2785 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2787 del_timer(&host->dto_timer); in dw_mci_interrupt()
2790 if (!host->data_status) in dw_mci_interrupt()
2791 host->data_status = pending; in dw_mci_interrupt()
2793 if (host->dir_status == DW_MCI_RECV_STATUS) { in dw_mci_interrupt()
2794 if (host->sg != NULL) in dw_mci_interrupt()
2797 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_interrupt()
2798 tasklet_schedule(&host->tasklet); in dw_mci_interrupt()
2800 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2805 if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) in dw_mci_interrupt()
2811 if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) in dw_mci_interrupt()
2816 spin_lock(&host->irq_lock); in dw_mci_interrupt()
2821 spin_unlock(&host->irq_lock); in dw_mci_interrupt()
2829 if (pending & SDMMC_INT_SDIO(slot->sdio_id)) { in dw_mci_interrupt()
2831 SDMMC_INT_SDIO(slot->sdio_id)); in dw_mci_interrupt()
2833 sdio_signal_irq(slot->mmc); in dw_mci_interrupt()
2838 if (host->use_dma != TRANS_MODE_IDMAC) in dw_mci_interrupt()
2842 if (host->dma_64bit_address == 1) { in dw_mci_interrupt()
2848 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2849 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2857 if (!test_bit(EVENT_DATA_ERROR, &host->pending_events)) in dw_mci_interrupt()
2858 host->dma_ops->complete((void *)host); in dw_mci_interrupt()
2865 static int dw_mci_init_slot_caps(struct dw_mci_slot *slot) in dw_mci_init_slot_caps()
2867 struct dw_mci *host = slot->host; in dw_mci_init_slot_caps()
2868 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_init_slot_caps()
2869 struct mmc_host *mmc = slot->mmc; in dw_mci_init_slot_caps()
2870 int ctrl_id; in dw_mci_init_slot_caps()
2872 if (host->pdata->caps) in dw_mci_init_slot_caps()
2873 mmc->caps = host->pdata->caps; in dw_mci_init_slot_caps()
2875 if (host->pdata->pm_caps) in dw_mci_init_slot_caps()
2876 mmc->pm_caps = host->pdata->pm_caps; in dw_mci_init_slot_caps()
2879 mmc->caps |= drv_data->common_caps; in dw_mci_init_slot_caps()
2881 if (host->dev->of_node) { in dw_mci_init_slot_caps()
2882 ctrl_id = of_alias_get_id(host->dev->of_node, "mshc"); in dw_mci_init_slot_caps()
2886 ctrl_id = to_platform_device(host->dev)->id; in dw_mci_init_slot_caps()
2889 if (drv_data && drv_data->caps) { in dw_mci_init_slot_caps()
2890 if (ctrl_id >= drv_data->num_caps) { in dw_mci_init_slot_caps()
2891 dev_err(host->dev, "invalid controller id %d\n", in dw_mci_init_slot_caps()
2893 return -EINVAL; in dw_mci_init_slot_caps()
2895 mmc->caps |= drv_data->caps[ctrl_id]; in dw_mci_init_slot_caps()
2898 if (host->pdata->caps2) in dw_mci_init_slot_caps()
2899 mmc->caps2 = host->pdata->caps2; in dw_mci_init_slot_caps()
2902 if (host->minimum_speed) in dw_mci_init_slot_caps()
2903 mmc->f_min = host->minimum_speed; in dw_mci_init_slot_caps()
2905 mmc->f_min = DW_MCI_FREQ_MIN; in dw_mci_init_slot_caps()
2907 if (!mmc->f_max) in dw_mci_init_slot_caps()
2908 mmc->f_max = DW_MCI_FREQ_MAX; in dw_mci_init_slot_caps()
2911 if (mmc->caps & MMC_CAP_SDIO_IRQ) in dw_mci_init_slot_caps()
2912 mmc->caps2 |= MMC_CAP2_SDIO_IRQ_NOTHREAD; in dw_mci_init_slot_caps()
2917 static int dw_mci_init_slot(struct dw_mci *host) in dw_mci_init_slot()
2921 int ret; in dw_mci_init_slot()
2923 mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), host->dev); in dw_mci_init_slot()
2925 return -ENOMEM; in dw_mci_init_slot()
2928 slot->id = 0; in dw_mci_init_slot()
2929 slot->sdio_id = host->sdio_id0 + slot->id; in dw_mci_init_slot()
2930 slot->mmc = mmc; in dw_mci_init_slot()
2931 slot->host = host; in dw_mci_init_slot()
2932 host->slot = slot; in dw_mci_init_slot()
2934 mmc->ops = &dw_mci_ops; in dw_mci_init_slot()
2941 if (!mmc->ocr_avail) in dw_mci_init_slot()
2942 mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; in dw_mci_init_slot()
2953 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_slot()
2954 mmc->max_segs = host->ring_size; in dw_mci_init_slot()
2955 mmc->max_blk_size = 65535; in dw_mci_init_slot()
2956 mmc->max_seg_size = 0x1000; in dw_mci_init_slot()
2957 mmc->max_req_size = mmc->max_seg_size * host->ring_size; in dw_mci_init_slot()
2958 mmc->max_blk_count = mmc->max_req_size / 512; in dw_mci_init_slot()
2959 } else if (host->use_dma == TRANS_MODE_EDMAC) { in dw_mci_init_slot()
2960 mmc->max_segs = 64; in dw_mci_init_slot()
2961 mmc->max_blk_size = 65535; in dw_mci_init_slot()
2962 mmc->max_blk_count = 65535; in dw_mci_init_slot()
2963 mmc->max_req_size = in dw_mci_init_slot()
2964 mmc->max_blk_size * mmc->max_blk_count; in dw_mci_init_slot()
2965 mmc->max_seg_size = mmc->max_req_size; in dw_mci_init_slot()
2968 mmc->max_segs = 64; in dw_mci_init_slot()
2969 mmc->max_blk_size = 65535; /* BLKSIZ is 16 bits */ in dw_mci_init_slot()
2970 mmc->max_blk_count = 512; in dw_mci_init_slot()
2971 mmc->max_req_size = mmc->max_blk_size * in dw_mci_init_slot()
2972 mmc->max_blk_count; in dw_mci_init_slot()
2973 mmc->max_seg_size = mmc->max_req_size; in dw_mci_init_slot()
2996 mmc_remove_host(slot->mmc); in dw_mci_cleanup_slot()
2997 slot->host->slot = NULL; in dw_mci_cleanup_slot()
2998 mmc_free_host(slot->mmc); in dw_mci_cleanup_slot()
3003 int addr_config; in dw_mci_init_dma()
3004 struct device *dev = host->dev; in dw_mci_init_dma()
3009 * 2b'00: No DMA Interface -> Actually means using Internal DMA block in dw_mci_init_dma()
3010 * 2b'01: DesignWare DMA Interface -> Synopsys DW-DMA block in dw_mci_init_dma()
3011 * 2b'10: Generic DMA Interface -> non-Synopsys generic DMA block in dw_mci_init_dma()
3012 * 2b'11: Non DW DMA Interface -> pio only in dw_mci_init_dma()
3017 host->use_dma = SDMMC_GET_TRANS_MODE(mci_readl(host, HCON)); in dw_mci_init_dma()
3018 if (host->use_dma == DMA_INTERFACE_IDMA) { in dw_mci_init_dma()
3019 host->use_dma = TRANS_MODE_IDMAC; in dw_mci_init_dma()
3020 } else if (host->use_dma == DMA_INTERFACE_DWDMA || in dw_mci_init_dma()
3021 host->use_dma == DMA_INTERFACE_GDMA) { in dw_mci_init_dma()
3022 host->use_dma = TRANS_MODE_EDMAC; in dw_mci_init_dma()
3028 if (host->use_dma == TRANS_MODE_IDMAC) { in dw_mci_init_dma()
3036 /* host supports IDMAC in 64-bit address mode */ in dw_mci_init_dma()
3037 host->dma_64bit_address = 1; in dw_mci_init_dma()
3038 dev_info(host->dev, in dw_mci_init_dma()
3039 "IDMAC supports 64-bit address mode.\n"); in dw_mci_init_dma()
3040 if (!dma_set_mask(host->dev, DMA_BIT_MASK(64))) in dw_mci_init_dma()
3041 dma_set_coherent_mask(host->dev, in dw_mci_init_dma()
3044 /* host supports IDMAC in 32-bit address mode */ in dw_mci_init_dma()
3045 host->dma_64bit_address = 0; in dw_mci_init_dma()
3046 dev_info(host->dev, in dw_mci_init_dma()
3047 "IDMAC supports 32-bit address mode.\n"); in dw_mci_init_dma()
3051 host->sg_cpu = dmam_alloc_coherent(host->dev, in dw_mci_init_dma()
3053 &host->sg_dma, GFP_KERNEL); in dw_mci_init_dma()
3054 if (!host->sg_cpu) { in dw_mci_init_dma()
3055 dev_err(host->dev, in dw_mci_init_dma()
3061 host->dma_ops = &dw_mci_idmac_ops; in dw_mci_init_dma()
3062 dev_info(host->dev, "Using internal DMA controller.\n"); in dw_mci_init_dma()
3065 if ((device_property_string_array_count(dev, "dma-names") < 0) || in dw_mci_init_dma()
3069 host->dma_ops = &dw_mci_edmac_ops; in dw_mci_init_dma()
3070 dev_info(host->dev, "Using external DMA controller.\n"); in dw_mci_init_dma()
3073 if (host->dma_ops->init && host->dma_ops->start && in dw_mci_init_dma()
3074 host->dma_ops->stop && host->dma_ops->cleanup) { in dw_mci_init_dma()
3075 if (host->dma_ops->init(host)) { in dw_mci_init_dma()
3076 dev_err(host->dev, "%s: Unable to initialize DMA Controller.\n", in dw_mci_init_dma()
3081 dev_err(host->dev, "DMA initialization not found.\n"); in dw_mci_init_dma()
3088 dev_info(host->dev, "Using PIO mode.\n"); in dw_mci_init_dma()
3089 host->use_dma = TRANS_MODE_PIO; in dw_mci_init_dma()
3096 if (host->state != STATE_SENDING_CMD11) { in dw_mci_cmd11_timer()
3097 dev_warn(host->dev, "Unexpected CMD11 timeout\n"); in dw_mci_cmd11_timer()
3101 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cmd11_timer()
3102 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cmd11_timer()
3103 tasklet_schedule(&host->tasklet); in dw_mci_cmd11_timer()
3112 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3120 * pending command in the controller--we just assume it will never come. in dw_mci_cto_timer()
3122 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_cto_timer()
3125 dev_warn(host->dev, "Unexpected interrupt latency\n"); in dw_mci_cto_timer()
3128 if (test_bit(EVENT_CMD_COMPLETE, &host->pending_events)) { in dw_mci_cto_timer()
3130 dev_warn(host->dev, "CTO timeout when already completed\n"); in dw_mci_cto_timer()
3138 switch (host->state) { in dw_mci_cto_timer()
3147 host->cmd_status = SDMMC_INT_RTO; in dw_mci_cto_timer()
3148 set_bit(EVENT_CMD_COMPLETE, &host->pending_events); in dw_mci_cto_timer()
3149 tasklet_schedule(&host->tasklet); in dw_mci_cto_timer()
3152 dev_warn(host->dev, "Unexpected command timeout, state %d\n", in dw_mci_cto_timer()
3153 host->state); in dw_mci_cto_timer()
3158 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_cto_timer()
3167 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3173 pending = mci_readl(host, MINTSTS); /* read-only mask reg */ in dw_mci_dto_timer()
3176 dev_warn(host->dev, "Unexpected data interrupt latency\n"); in dw_mci_dto_timer()
3179 if (test_bit(EVENT_DATA_COMPLETE, &host->pending_events)) { in dw_mci_dto_timer()
3181 dev_warn(host->dev, "DTO timeout when already completed\n"); in dw_mci_dto_timer()
3189 switch (host->state) { in dw_mci_dto_timer()
3197 host->data_status = SDMMC_INT_DRTO; in dw_mci_dto_timer()
3198 set_bit(EVENT_DATA_ERROR, &host->pending_events); in dw_mci_dto_timer()
3199 set_bit(EVENT_DATA_COMPLETE, &host->pending_events); in dw_mci_dto_timer()
3200 tasklet_schedule(&host->tasklet); in dw_mci_dto_timer()
3203 dev_warn(host->dev, "Unexpected data timeout, state %d\n", in dw_mci_dto_timer()
3204 host->state); in dw_mci_dto_timer()
3209 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_dto_timer()
3216 struct device *dev = host->dev; in dw_mci_parse_dt()
3217 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_parse_dt()
3218 int ret; in dw_mci_parse_dt()
3223 return ERR_PTR(-ENOMEM); in dw_mci_parse_dt()
3226 pdata->rstc = devm_reset_control_get_optional_exclusive(dev, "reset"); in dw_mci_parse_dt()
3227 if (IS_ERR(pdata->rstc)) in dw_mci_parse_dt()
3228 return ERR_CAST(pdata->rstc); in dw_mci_parse_dt()
3230 if (device_property_read_u32(dev, "fifo-depth", &pdata->fifo_depth)) in dw_mci_parse_dt()
3232 "fifo-depth property not found, using value of FIFOTH register as default\n"); in dw_mci_parse_dt()
3234 device_property_read_u32(dev, "card-detect-delay", in dw_mci_parse_dt()
3235 &pdata->detect_delay_ms); in dw_mci_parse_dt()
3237 device_property_read_u32(dev, "data-addr", &host->data_addr_override); in dw_mci_parse_dt()
3239 if (device_property_present(dev, "fifo-watermark-aligned")) in dw_mci_parse_dt()
3240 host->wm_aligned = true; in dw_mci_parse_dt()
3242 if (!device_property_read_u32(dev, "clock-frequency", &clock_frequency)) in dw_mci_parse_dt()
3243 pdata->bus_hz = clock_frequency; in dw_mci_parse_dt()
3245 if (drv_data && drv_data->parse_dt) { in dw_mci_parse_dt()
3246 ret = drv_data->parse_dt(host); in dw_mci_parse_dt()
3257 return ERR_PTR(-EINVAL); in dw_mci_parse_dt()
3267 * No need for CD if all slots have a non-error GPIO in dw_mci_enable_cd()
3270 if (host->slot->mmc->caps & MMC_CAP_NEEDS_POLL) in dw_mci_enable_cd()
3273 if (mmc_gpio_get_cd(host->slot->mmc) < 0) { in dw_mci_enable_cd()
3274 spin_lock_irqsave(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3278 spin_unlock_irqrestore(&host->irq_lock, irqflags); in dw_mci_enable_cd()
3282 int dw_mci_probe(struct dw_mci *host) in dw_mci_probe()
3284 const struct dw_mci_drv_data *drv_data = host->drv_data; in dw_mci_probe()
3285 int width, i, ret = 0; in dw_mci_probe()
3288 if (!host->pdata) { in dw_mci_probe()
3289 host->pdata = dw_mci_parse_dt(host); in dw_mci_probe()
3290 if (IS_ERR(host->pdata)) in dw_mci_probe()
3291 return dev_err_probe(host->dev, PTR_ERR(host->pdata), in dw_mci_probe()
3295 host->biu_clk = devm_clk_get(host->dev, "biu"); in dw_mci_probe()
3296 if (IS_ERR(host->biu_clk)) { in dw_mci_probe()
3297 dev_dbg(host->dev, "biu clock not available\n"); in dw_mci_probe()
3299 ret = clk_prepare_enable(host->biu_clk); in dw_mci_probe()
3301 dev_err(host->dev, "failed to enable biu clock\n"); in dw_mci_probe()
3306 host->ciu_clk = devm_clk_get(host->dev, "ciu"); in dw_mci_probe()
3307 if (IS_ERR(host->ciu_clk)) { in dw_mci_probe()
3308 dev_dbg(host->dev, "ciu clock not available\n"); in dw_mci_probe()
3309 host->bus_hz = host->pdata->bus_hz; in dw_mci_probe()
3311 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_probe()
3313 dev_err(host->dev, "failed to enable ciu clock\n"); in dw_mci_probe()
3317 if (host->pdata->bus_hz) { in dw_mci_probe()
3318 ret = clk_set_rate(host->ciu_clk, host->pdata->bus_hz); in dw_mci_probe()
3320 dev_warn(host->dev, in dw_mci_probe()
3322 host->pdata->bus_hz); in dw_mci_probe()
3324 host->bus_hz = clk_get_rate(host->ciu_clk); in dw_mci_probe()
3327 if (!host->bus_hz) { in dw_mci_probe()
3328 dev_err(host->dev, in dw_mci_probe()
3330 ret = -ENODEV; in dw_mci_probe()
3334 if (host->pdata->rstc) { in dw_mci_probe()
3335 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3337 reset_control_deassert(host->pdata->rstc); in dw_mci_probe()
3340 if (drv_data && drv_data->init) { in dw_mci_probe()
3341 ret = drv_data->init(host); in dw_mci_probe()
3343 dev_err(host->dev, in dw_mci_probe()
3349 timer_setup(&host->cmd11_timer, dw_mci_cmd11_timer, 0); in dw_mci_probe()
3350 timer_setup(&host->cto_timer, dw_mci_cto_timer, 0); in dw_mci_probe()
3351 timer_setup(&host->dto_timer, dw_mci_dto_timer, 0); in dw_mci_probe()
3353 spin_lock_init(&host->lock); in dw_mci_probe()
3354 spin_lock_init(&host->irq_lock); in dw_mci_probe()
3355 INIT_LIST_HEAD(&host->queue); in dw_mci_probe()
3360 * Get the host data width - this assumes that HCON has been set with in dw_mci_probe()
3365 host->push_data = dw_mci_push_data16; in dw_mci_probe()
3366 host->pull_data = dw_mci_pull_data16; in dw_mci_probe()
3368 host->data_shift = 1; in dw_mci_probe()
3370 host->push_data = dw_mci_push_data64; in dw_mci_probe()
3371 host->pull_data = dw_mci_pull_data64; in dw_mci_probe()
3373 host->data_shift = 3; in dw_mci_probe()
3378 "Defaulting to 32-bit access.\n"); in dw_mci_probe()
3379 host->push_data = dw_mci_push_data32; in dw_mci_probe()
3380 host->pull_data = dw_mci_pull_data32; in dw_mci_probe()
3382 host->data_shift = 2; in dw_mci_probe()
3387 ret = -ENODEV; in dw_mci_probe()
3391 host->dma_ops = host->pdata->dma_ops; in dw_mci_probe()
3402 * FIFO threshold settings RxMark = fifo_size / 2 - 1, in dw_mci_probe()
3405 if (!host->pdata->fifo_depth) { in dw_mci_probe()
3407 * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may in dw_mci_probe()
3415 fifo_size = host->pdata->fifo_depth; in dw_mci_probe()
3417 host->fifo_depth = fifo_size; in dw_mci_probe()
3418 host->fifoth_val = in dw_mci_probe()
3419 SDMMC_SET_FIFOTH(0x2, fifo_size / 2 - 1, fifo_size / 2); in dw_mci_probe()
3420 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_probe()
3428 * Need to check the version-id and set data-offset for DATA register. in dw_mci_probe()
3430 host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); in dw_mci_probe()
3431 dev_info(host->dev, "Version ID is %04x\n", host->verid); in dw_mci_probe()
3433 if (host->data_addr_override) in dw_mci_probe()
3434 host->fifo_reg = host->regs + host->data_addr_override; in dw_mci_probe()
3435 else if (host->verid < DW_MMC_240A) in dw_mci_probe()
3436 host->fifo_reg = host->regs + DATA_OFFSET; in dw_mci_probe()
3438 host->fifo_reg = host->regs + DATA_240A_OFFSET; in dw_mci_probe()
3440 tasklet_setup(&host->tasklet, dw_mci_tasklet_func); in dw_mci_probe()
3441 ret = devm_request_irq(host->dev, host->irq, dw_mci_interrupt, in dw_mci_probe()
3442 host->irq_flags, "dw-mci", host); in dw_mci_probe()
3456 dev_info(host->dev, in dw_mci_probe()
3458 host->irq, width, fifo_size); in dw_mci_probe()
3463 dev_dbg(host->dev, "slot %d init failed\n", i); in dw_mci_probe()
3473 if (host->use_dma && host->dma_ops->exit) in dw_mci_probe()
3474 host->dma_ops->exit(host); in dw_mci_probe()
3476 reset_control_assert(host->pdata->rstc); in dw_mci_probe()
3479 clk_disable_unprepare(host->ciu_clk); in dw_mci_probe()
3482 clk_disable_unprepare(host->biu_clk); in dw_mci_probe()
3490 dev_dbg(host->dev, "remove slot\n"); in dw_mci_remove()
3491 if (host->slot) in dw_mci_remove()
3492 dw_mci_cleanup_slot(host->slot); in dw_mci_remove()
3501 if (host->use_dma && host->dma_ops->exit) in dw_mci_remove()
3502 host->dma_ops->exit(host); in dw_mci_remove()
3504 reset_control_assert(host->pdata->rstc); in dw_mci_remove()
3506 clk_disable_unprepare(host->ciu_clk); in dw_mci_remove()
3507 clk_disable_unprepare(host->biu_clk); in dw_mci_remove()
3514 int dw_mci_runtime_suspend(struct device *dev) in dw_mci_runtime_suspend()
3518 if (host->use_dma && host->dma_ops->exit) in dw_mci_runtime_suspend()
3519 host->dma_ops->exit(host); in dw_mci_runtime_suspend()
3521 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_suspend()
3523 if (host->slot && in dw_mci_runtime_suspend()
3524 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_suspend()
3525 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_suspend()
3526 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_suspend()
3532 int dw_mci_runtime_resume(struct device *dev) in dw_mci_runtime_resume()
3534 int ret = 0; in dw_mci_runtime_resume()
3537 if (host->slot && in dw_mci_runtime_resume()
3538 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3539 !mmc_card_is_removable(host->slot->mmc))) { in dw_mci_runtime_resume()
3540 ret = clk_prepare_enable(host->biu_clk); in dw_mci_runtime_resume()
3545 ret = clk_prepare_enable(host->ciu_clk); in dw_mci_runtime_resume()
3550 clk_disable_unprepare(host->ciu_clk); in dw_mci_runtime_resume()
3551 ret = -ENODEV; in dw_mci_runtime_resume()
3555 if (host->use_dma && host->dma_ops->init) in dw_mci_runtime_resume()
3556 host->dma_ops->init(host); in dw_mci_runtime_resume()
3562 mci_writel(host, FIFOTH, host->fifoth_val); in dw_mci_runtime_resume()
3563 host->prev_blksz = 0; in dw_mci_runtime_resume()
3575 if (host->slot && host->slot->mmc->pm_flags & MMC_PM_KEEP_POWER) in dw_mci_runtime_resume()
3576 dw_mci_set_ios(host->slot->mmc, &host->slot->mmc->ios); in dw_mci_runtime_resume()
3579 dw_mci_setup_bus(host->slot, true); in dw_mci_runtime_resume()
3581 /* Re-enable SDIO interrupts. */ in dw_mci_runtime_resume()
3582 if (sdio_irq_claimed(host->slot->mmc)) in dw_mci_runtime_resume()
3583 __dw_mci_enable_sdio_irq(host->slot, 1); in dw_mci_runtime_resume()
3591 if (host->slot && in dw_mci_runtime_resume()
3592 (mmc_can_gpio_cd(host->slot->mmc) || in dw_mci_runtime_resume()
3593 !mmc_card_is_removable(host->slot->mmc))) in dw_mci_runtime_resume()
3594 clk_disable_unprepare(host->biu_clk); in dw_mci_runtime_resume()
3601 static int __init dw_mci_init(void) in dw_mci_init()