Home
last modified time | relevance | path

Searched +full:gpio +full:- +full:ranges (Results 1 – 25 of 1028) sorted by relevance

12345678910>>...42

/Linux-v6.1/arch/arc/boot/dts/
Dabilis_tb101.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
Dabilis_tb100.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
15 bus-frequency = <166666666>;
18 clock-frequency = <1000000000>;
21 clock-mult = <1>;
22 clock-div = <2>;
25 clock-mult = <1>;
26 clock-div = <6>;
31 pctl_tsin_s0: pctl-tsin-s0 { /* Serial TS-in 0 */
34 pctl_tsin_s1: pctl-tsin-s1 { /* Serial TS-in 1 */
37 pctl_gpio_a: pctl-gpio-a { /* GPIO bank A */
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dstm32mp15xxaa-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp15xxac-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32f429-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
46 compatible = "st,stm32f429-pinctrl";
48 gpioa: gpio@40020000 {
49 gpio-ranges = <&pinctrl 0 0 16>;
52 gpiob: gpio@40020400 {
53 gpio-ranges = <&pinctrl 0 16 16>;
56 gpioc: gpio@40020800 {
57 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
Dstm32f469-pinctrl.dtsi2 * Copyright 2017 - Alexandre Torgue <alexandre.torgue@st.com>
4 * This file is dual-licensed: you can use it either under the terms
43 #include "stm32f4-pinctrl.dtsi"
46 compatible = "st,stm32f469-pinctrl";
48 gpioa: gpio@40020000 {
49 gpio-ranges = <&pinctrl 0 0 16>;
52 gpiob: gpio@40020400 {
53 gpio-ranges = <&pinctrl 0 16 16>;
56 gpioc: gpio@40020800 {
57 gpio-ranges = <&pinctrl 0 32 16>;
[all …]
Dstm32mp15xxab-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dstm32mp15xxad-pinctrl.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2019 - All Rights Reserved
10 gpioa: gpio@50002000 {
13 gpio-ranges = <&pinctrl 0 0 16>;
16 gpiob: gpio@50003000 {
19 gpio-ranges = <&pinctrl 0 16 16>;
22 gpioc: gpio@50004000 {
25 gpio-ranges = <&pinctrl 0 32 16>;
28 gpiod: gpio@50005000 {
31 gpio-ranges = <&pinctrl 0 48 16>;
[all …]
Dhi3620.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Copyright (C) 2012-2013 HiSilicon Ltd.
6 * Copyright (C) 2012-2013 Linaro Ltd.
11 #include <dt-bindings/clock/hi3620-clock.h>
14 #address-cells = <1>;
15 #size-cells = <1>;
26 compatible = "fixed-clock";
27 #clock-cells = <0>;
28 clock-frequency = <26000000>;
29 clock-output-names = "apb_pclk";
[all …]
Dsam9x60.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * sam9x60.dtsi - Device Tree Include file for Microchip SAM9X60 SoC
10 #include <dt-bindings/dma/at91.h>
11 #include <dt-bindings/pinctrl/at91.h>
12 #include <dt-bindings/interrupt-controller/irq.h>
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/clock/at91.h>
15 #include <dt-bindings/mfd/at91-usart.h>
16 #include <dt-bindings/mfd/atmel-flexcom.h>
19 #address-cells = <1>;
[all …]
Dstm32mp131.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
3 * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/stm32mp13-clks.h>
8 #include <dt-bindings/reset/stm32mp13-resets.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,cortex-a7";
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/qcom,pmic-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm PMIC GPIO block
10 - Bjorn Andersson <bjorn.andersson@linaro.org>
13 This binding describes the GPIO block(s) found in the 8xxx series of
19 - enum:
20 - qcom,pm2250-gpio
21 - qcom,pm660-gpio
[all …]
Dst,stm32-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/pinctrl/st,stm32-pinctrl.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: STM32 GPIO and Pin Mux/Config controller
11 - Alexandre TORGUE <alexandre.torgue@foss.st.com>
14 STMicroelectronics's STM32 MCUs intregrate a GPIO and Pin mux/config hardware
17 on-chip controllers onto these pads.
22 - st,stm32f429-pinctrl
23 - st,stm32f469-pinctrl
[all …]
Dintel,pinctrl-thunderbay.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/intel,pinctrl-thunderbay.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lakshmi Sowjanya D <lakshmi.sowjanya.d@intel.com>
19 const: intel,thunderbay-pinctrl
24 gpio-controller: true
26 '#gpio-cells':
29 gpio-ranges:
37 interrupt-controller: true
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/gpio/
Dgpio.txt1 Specifying GPIO information for devices
5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
14 GPIO properties can contain one or more GPIO phandles, but only in exceptional
23 The following example could be used to describe GPIO pins used as device enable
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
[all …]
Dsocionext,uniphier-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/gpio/socionext,uniphier-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: UniPhier GPIO controller
10 - Masahiro Yamada <yamada.masahiro@socionext.com>
14 pattern: "^gpio@[0-9a-f]+$"
17 const: socionext,uniphier-gpio
22 gpio-controller: true
24 "#gpio-cells":
[all …]
Drenesas,rcar-gpio.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/renesas,rcar-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Renesas R-Car General-Purpose Input/Output Ports (GPIO)
10 - Geert Uytterhoeven <geert+renesas@glider.be>
15 - items:
16 - enum:
17 - renesas,gpio-r8a7778 # R-Car M1
18 - renesas,gpio-r8a7779 # R-Car H1
[all …]
Dabilis,tb10x-gpio.txt1 * Abilis TB10x GPIO controller
4 - compatible: Should be "abilis,tb10x-gpio"
5 - reg: Address and length of the register set for the device
6 - gpio-controller: Marks the device node as a gpio controller.
7 - #gpio-cells: Should be <2>. The first cell is the pin number and the
9 - bit 0 specifies polarity (0 for normal, 1 for inverted).
10 - abilis,ngpio: the number of GPIO pins this driver controls.
13 - interrupt-controller: Marks the device node as an interrupt controller.
14 - #interrupt-cells: Should be <1>. Interrupts are triggered on both edges.
15 - interrupts: Defines the interrupt line connecting this GPIO controller to
[all …]
/Linux-v6.1/arch/arm64/boot/dts/hisilicon/
Dhi3670.dtsi1 // SPDX-License-Identifier: GPL-2.0
9 #include <dt-bindings/interrupt-controller/arm-gic.h>
10 #include <dt-bindings/clock/hi3670-clock.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
27 cpu-map {
[all …]
Dhi3660.dtsi1 // SPDX-License-Identifier: GPL-2.0
8 #include <dt-bindings/interrupt-controller/arm-gic.h>
9 #include <dt-bindings/clock/hi3660-clock.h>
10 #include <dt-bindings/thermal/thermal.h>
14 interrupt-parent = <&gic>;
15 #address-cells = <2>;
16 #size-cells = <2>;
19 compatible = "arm,psci-0.2";
24 #address-cells = <2>;
25 #size-cells = <0>;
[all …]
Dhi3798cv200.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2016-2017 HiSilicon Technologies Co., Ltd.
8 #include <dt-bindings/clock/histb-clock.h>
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/phy/phy.h>
12 #include <dt-bindings/reset/ti-syscon.h>
16 interrupt-parent = <&gic>;
17 #address-cells = <2>;
18 #size-cells = <2>;
[all …]
/Linux-v6.1/arch/mips/boot/dts/pic32/
Dpic32mzda.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 #include <dt-bindings/clock/microchip,pic32-clock.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
9 #address-cells = <1>;
10 #size-cells = <1>;
11 interrupt-parent = <&evic>;
33 #address-cells = <1>;
34 #size-cells = <0>;
43 compatible = "microchip,pic32mzda-infra";
49 #clock-cells = <0>;
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/mfd/
Dst,stmfx.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: STMicroelectonics Multi-Function eXpander (STMFX) bindings
9 description: ST Multi-Function eXpander (STMFX) is a slave controller using I2C for
10 communication with the main MCU. Its main features are GPIO expansion,
15 - Amelie Delaunay <amelie.delaunay@foss.st.com>
19 const: st,stmfx-0300
27 drive-open-drain: true
29 vdd-supply: true
[all …]
Dbrcm,bcm6358-gpio-sysctl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/mfd/brcm,bcm6358-gpio-sysctl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Broadcom BCM6358 GPIO System Controller
10 - Álvaro Fernández Rojas <noltari@gmail.com>
11 - Jonas Gorski <jonas.gorski@gmail.com>
14 Broadcom BCM6358 SoC GPIO system controller which provides a register map
15 for controlling the GPIO and pins of the SoC.
18 "#address-cells": true
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc8280xp-pmics.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/input/input.h>
7 #include <dt-bindings/interrupt-controller/irq.h>
8 #include <dt-bindings/spmi/spmi.h>
12 compatible = "qcom,pmk8350", "qcom,spmi-pmic";
14 #address-cells = <1>;
15 #size-cells = <0>;
18 compatible = "qcom,pm8998-pon";
22 compatible = "qcom,pmk8350-pwrkey";
31 compatible = "qcom,pm8350", "qcom,spmi-pmic";
[all …]

12345678910>>...42