Searched +full:gpio +full:- +full:mux +full:- +full:clock (Results 1 – 25 of 488) sorted by relevance
12345678910>>...20
/Linux-v6.1/arch/arm64/boot/dts/amlogic/ |
D | meson-gxbb.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include "meson-gx.dtsi" 7 #include "meson-gx-mali450.dtsi" 8 #include <dt-bindings/gpio/meson-gxbb-gpio.h> 9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 10 #include <dt-bindings/clock/gxbb-clkc.h> 11 #include <dt-bindings/clock/gxbb-aoclkc.h> 12 #include <dt-bindings/reset/gxbb-aoclkc.h> 15 compatible = "amlogic,meson-gxbb"; 19 compatible = "amlogic,meson-gxbb-usb2-phy"; [all …]
|
D | meson-gxl.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 7 #include "meson-gx.dtsi" 8 #include <dt-bindings/clock/gxbb-clkc.h> 9 #include <dt-bindings/clock/gxbb-aoclkc.h> 10 #include <dt-bindings/gpio/meson-gxl-gpio.h> 11 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h> 14 compatible = "amlogic,meson-gxl"; 18 compatible = "amlogic,meson-gxl-usb-ctrl"; 21 #address-cells = <2>; 22 #size-cells = <2>; [all …]
|
D | meson-axg.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/clock/axg-aoclkc.h> 7 #include <dt-bindings/clock/axg-audio-clkc.h> 8 #include <dt-bindings/clock/axg-clkc.h> 9 #include <dt-bindings/gpio/gpio.h> 10 #include <dt-bindings/gpio/meson-axg-gpio.h> 11 #include <dt-bindings/interrupt-controller/irq.h> 12 #include <dt-bindings/interrupt-controller/arm-gic.h> 13 #include <dt-bindings/reset/amlogic,meson-axg-audio-arb.h> 14 #include <dt-bindings/reset/amlogic,meson-axg-reset.h> [all …]
|
D | meson-g12-common.dtsi | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT) 6 #include <dt-bindings/phy/phy.h> 7 #include <dt-bindings/gpio/gpio.h> 8 #include <dt-bindings/clock/g12a-clkc.h> 9 #include <dt-bindings/clock/g12a-aoclkc.h> 10 #include <dt-bindings/interrupt-controller/irq.h> 11 #include <dt-bindings/interrupt-controller/arm-gic.h> 12 #include <dt-bindings/reset/amlogic,meson-g12a-reset.h> 13 #include <dt-bindings/thermal/thermal.h> 16 interrupt-parent = <&gic>; [all …]
|
/Linux-v6.1/arch/arm/boot/dts/ |
D | nuvoton-wpcm450.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 4 #include <dt-bindings/interrupt-controller/irq.h> 8 #address-cells = <1>; 9 #size-cells = <1>; 23 #address-cells = <1>; 24 #size-cells = <0>; 27 compatible = "arm,arm926ej-s"; 33 clk24m: clock-24mhz { 34 /* 24 MHz dummy clock */ 35 compatible = "fixed-clock"; [all …]
|
D | mmp2.dtsi | 1 // SPDX-License-Identifier: GPL-2.0-only 7 #include <dt-bindings/clock/marvell,mmp2.h> 8 #include <dt-bindings/power/marvell,mmp2.h> 9 #include <dt-bindings/clock/marvell,mmp2-audio.h> 12 #address-cells = <1>; 13 #size-cells = <1>; 25 #address-cells = <1>; 26 #size-cells = <1>; 27 compatible = "simple-bus"; 28 interrupt-parent = <&intc>; [all …]
|
D | mmp3.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+ OR MIT 6 #include <dt-bindings/clock/marvell,mmp2.h> 7 #include <dt-bindings/power/marvell,mmp2.h> 8 #include <dt-bindings/interrupt-controller/arm-gic.h> 11 #address-cells = <1>; 12 #size-cells = <1>; 15 #address-cells = <1>; 16 #size-cells = <0>; 17 enable-method = "marvell,mmp3-smp"; 22 next-level-cache = <&l2>; [all …]
|
D | gemini.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 6 #include <dt-bindings/interrupt-controller/irq.h> 7 #include <dt-bindings/clock/cortina,gemini-clock.h> 8 #include <dt-bindings/reset/cortina,gemini-reset.h> 9 #include <dt-bindings/gpio/gpio.h> 13 #address-cells = <1>; 14 #size-cells = <1>; 16 compatible = "simple-bus"; 17 interrupt-parent = <&intcon>; 20 compatible = "cortina,gemini-flash", "cfi-flash"; [all …]
|
D | meson8.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 6 #include <dt-bindings/clock/meson8-ddr-clkc.h> 7 #include <dt-bindings/clock/meson8b-clkc.h> 8 #include <dt-bindings/gpio/meson8-gpio.h> 9 #include <dt-bindings/power/meson8-power.h> 10 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/thermal/thermal.h> 20 #address-cells = <1>; 21 #size-cells = <0>; [all …]
|
D | meson8b.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 OR MIT 7 #include <dt-bindings/clock/meson8-ddr-clkc.h> 8 #include <dt-bindings/clock/meson8b-clkc.h> 9 #include <dt-bindings/gpio/meson8b-gpio.h> 10 #include <dt-bindings/power/meson8-power.h> 11 #include <dt-bindings/reset/amlogic,meson8b-reset.h> 12 #include <dt-bindings/reset/amlogic,meson8b-clkc-reset.h> 13 #include <dt-bindings/thermal/thermal.h> 18 #address-cells = <1>; 19 #size-cells = <0>; [all …]
|
D | nuvoton-npcm730-gbs.dts | 1 // SPDX-License-Identifier: GPL-2.0 4 /dts-v1/; 5 #include "nuvoton-npcm730.dtsi" 6 #include <dt-bindings/gpio/gpio.h> 10 compatible = "quanta,gbs-bmc","nuvoton,npcm730"; 71 stdout-path = &serial0; 78 gpio-keys { 79 compatible = "gpio-keys"; 80 sas-cable0 { 81 label = "sas-cable0"; [all …]
|
D | imx6dl-alti6p.dts | 1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT 7 /dts-v1/; 8 #include <dt-bindings/gpio/gpio.h> 9 #include <dt-bindings/leds/common.h> 10 #include <dt-bindings/sound/fsl-imx-audmux.h> 18 stdout-path = &uart4; 21 clock_ksz8081: clock-ksz8081 { 22 compatible = "fixed-clock"; 23 #clock-cells = <0>; 24 clock-frequency = <50000000>; [all …]
|
D | zynq-zc702.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2011 - 2014 Xilinx 6 /dts-v1/; 7 #include "zynq-7000.dtsi" 11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; 27 stdout-path = "serial0:115200n8"; 30 gpio-keys { 31 compatible = "gpio-keys"; 33 switch-14 { 37 wakeup-source; [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/clock/ |
D | gpio-mux-clock.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/clock/gpio-mux-clock.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 7 title: Simple GPIO clock multiplexer 10 - Sergej Sawazki <ce3a@gmx.de> 14 const: gpio-mux-clock 18 - description: First parent clock 19 - description: Second parent clock 21 '#clock-cells': [all …]
|
/Linux-v6.1/arch/arm64/boot/dts/xilinx/ |
D | zynqmp-sck-kv-g-revB.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 10 #include <dt-bindings/gpio/gpio.h> 11 #include <dt-bindings/net/ti-dp83867.h> 12 #include <dt-bindings/phy/phy.h> 13 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 15 /dts-v1/; 18 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 19 #address-cells = <1>; 20 #size-cells = <0>; [all …]
|
D | zynqmp-zcu100-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2021, Xilinx, Inc. 11 /dts-v1/; 14 #include "zynqmp-clk-ccf.dtsi" 15 #include <dt-bindings/input/input.h> 16 #include <dt-bindings/interrupt-controller/irq.h> 17 #include <dt-bindings/gpio/gpio.h> 18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 #include <dt-bindings/phy/phy.h> 23 compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp"; [all …]
|
D | zynqmp-zc1751-xm015-dc1.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 3 * dts file for Xilinx ZynqMP zc1751-xm015-dc1 5 * (C) Copyright 2015 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/phy/phy.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 19 model = "ZynqMP zc1751-xm015-dc1 RevA"; 20 compatible = "xlnx,zynqmp-zc1751", "xlnx,zynqmp"; [all …]
|
D | zynqmp-sck-kv-g-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2020 - 2021, Xilinx, Inc. 8 * "A" – A01 board un-modified (NXP) 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/net/ti-dp83867.h> 17 #include <dt-bindings/phy/phy.h> 18 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 20 /dts-v1/; 23 &i2c1 { /* I2C_SCK C23/C24 - MIO from SOM */ 24 #address-cells = <1>; [all …]
|
D | zynqmp-zcu104-revC.dts | 1 // SPDX-License-Identifier: GPL-2.0 5 * (C) Copyright 2017 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 #include <dt-bindings/phy/phy.h> 20 compatible = "xlnx,zynqmp-zcu104-revC", "xlnx,zynqmp-zcu104", "xlnx,zynqmp"; 37 stdout-path = "serial0:115200n8"; 46 compatible = "iio-hwmon"; [all …]
|
D | zynqmp-zcu104-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2017 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/gpio/gpio.h> 15 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 16 #include <dt-bindings/phy/phy.h> 20 compatible = "xlnx,zynqmp-zcu104-revA", "xlnx,zynqmp-zcu104", "xlnx,zynqmp"; 37 stdout-path = "serial0:115200n8"; 46 compatible = "fixed-clock"; [all …]
|
D | zynqmp-zcu102-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2015 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 17 #include <dt-bindings/phy/phy.h> 21 compatible = "xlnx,zynqmp-zcu102-revA", "xlnx,zynqmp-zcu102", "xlnx,zynqmp"; 39 stdout-path = "serial0:115200n8"; [all …]
|
D | zynqmp-zcu111-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2017 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 17 #include <dt-bindings/phy/phy.h> 21 compatible = "xlnx,zynqmp-zcu111-revA", "xlnx,zynqmp-zcu111", "xlnx,zynqmp"; 38 stdout-path = "serial0:115200n8"; [all …]
|
D | zynqmp-zcu106-revA.dts | 1 // SPDX-License-Identifier: GPL-2.0+ 5 * (C) Copyright 2016 - 2021, Xilinx, Inc. 10 /dts-v1/; 13 #include "zynqmp-clk-ccf.dtsi" 14 #include <dt-bindings/input/input.h> 15 #include <dt-bindings/gpio/gpio.h> 16 #include <dt-bindings/pinctrl/pinctrl-zynqmp.h> 17 #include <dt-bindings/phy/phy.h> 21 compatible = "xlnx,zynqmp-zcu106-revA", "xlnx,zynqmp-zcu106", "xlnx,zynqmp"; 39 stdout-path = "serial0:115200n8"; [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/display/msm/ |
D | hdmi.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 6 $schema: http://devicetree.org/meta-schemas/core.yaml# 11 - Rob Clark <robdclark@gmail.com> 16 - qcom,hdmi-tx-8084 17 - qcom,hdmi-tx-8660 18 - qcom,hdmi-tx-8960 19 - qcom,hdmi-tx-8974 20 - qcom,hdmi-tx-8994 21 - qcom,hdmi-tx-8996 [all …]
|
/Linux-v6.1/Documentation/devicetree/bindings/fsi/ |
D | fsi-master-gpio.txt | 1 Device-tree bindings for gpio-based FSI master driver 2 ----------------------------------------------------- 5 - compatible = "fsi-master-gpio"; 6 - clock-gpios = <gpio-descriptor>; : GPIO for FSI clock 7 - data-gpios = <gpio-descriptor>; : GPIO for FSI data signal 10 - enable-gpios = <gpio-descriptor>; : GPIO for enable signal 11 - trans-gpios = <gpio-descriptor>; : GPIO for voltage translator enable 12 - mux-gpios = <gpio-descriptor>; : GPIO for pin multiplexing with other 14 - no-gpio-delays; : Don't add extra delays between GPIO 16 GPIO block is running at a low enough [all …]
|
12345678910>>...20