Lines Matching +full:gpio +full:- +full:mux +full:- +full:clock
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include "meson-gx.dtsi"
7 #include "meson-gx-mali450.dtsi"
8 #include <dt-bindings/gpio/meson-gxbb-gpio.h>
9 #include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
10 #include <dt-bindings/clock/gxbb-clkc.h>
11 #include <dt-bindings/clock/gxbb-aoclkc.h>
12 #include <dt-bindings/reset/gxbb-aoclkc.h>
15 compatible = "amlogic,meson-gxbb";
19 compatible = "amlogic,meson-gxbb-usb2-phy";
20 #phy-cells = <0>;
24 clock-names = "usb_general", "usb";
29 compatible = "amlogic,meson-gxbb-usb2-phy";
30 #phy-cells = <0>;
34 clock-names = "usb_general", "usb";
39 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
43 clock-names = "otg";
45 phy-names = "usb2-phy";
51 compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
55 clock-names = "otg";
57 phy-names = "usb2-phy";
65 compatible = "amlogic,aiu-gxbb", "amlogic,aiu";
75 clock-names = "pclk",
89 compatible = "amlogic,meson-gxbb-aobus-pinctrl";
90 #address-cells = <2>;
91 #size-cells = <2>;
98 reg-names = "mux", "pull", "gpio";
99 gpio-controller;
100 #gpio-cells = <2>;
101 gpio-ranges = <&pinctrl_aobus 0 0 14>;
105 mux {
108 bias-disable;
113 mux {
117 bias-disable;
122 mux {
125 bias-disable;
130 mux {
134 bias-disable;
139 mux {
142 bias-disable;
147 mux {
151 bias-disable;
156 mux {
159 bias-disable;
164 mux {
167 bias-disable;
172 mux {
175 bias-disable;
180 mux {
183 bias-disable;
188 mux {
191 bias-disable;
196 mux {
199 bias-disable;
204 mux {
207 bias-disable;
212 mux {
215 bias-disable;
220 mux {
223 bias-disable;
228 mux {
231 bias-disable;
236 mux {
243 mux {
246 bias-disable;
251 mux {
254 bias-disable;
259 mux {
262 bias-disable;
270 compatible = "amlogic,meson-gxbb-spifc";
272 #address-cells = <1>;
273 #size-cells = <0>;
281 clock-names = "core";
285 compatible = "amlogic,meson-gxbb-aoclkc", "amlogic,meson-gx-aoclkc";
287 clock-names = "xtal", "mpeg-clk";
299 clock-names = "stmmaceth", "clkin0", "clkin1", "timing-adjustment";
303 compatible = "amlogic,meson-gpio-intc",
304 "amlogic,meson-gxbb-gpio-intc";
309 compatible = "amlogic,meson-gxbb-dw-hdmi", "amlogic,meson-gx-dw-hdmi";
313 reset-names = "hdmitx_apb", "hdmitx", "hdmitx_phy";
317 clock-names = "isfr", "iahb", "venci";
321 clkc: clock-controller {
322 compatible = "amlogic,gxbb-clkc";
323 #clock-cells = <1>;
325 clock-names = "xtal";
331 clock-names = "core";
351 compatible = "amlogic,meson-gxbb-mali", "arm,mali-450";
354 clock-names = "bus", "core";
356 assigned-clocks = <&clkc CLKID_GP0_PLL>;
357 assigned-clock-rates = <744000000>;
362 compatible = "amlogic,meson-gxbb-periphs-pinctrl";
363 #address-cells = <2>;
364 #size-cells = <2>;
367 gpio: bank@4b0 { label
372 reg-names = "mux", "pull", "pull-enable", "gpio";
373 gpio-controller;
374 #gpio-cells = <2>;
375 gpio-ranges = <&pinctrl_periphs 0 0 119>;
379 mux-0 {
383 bias-pull-up;
386 mux-1 {
389 bias-disable;
393 emmc_ds_pins: emmc-ds {
394 mux {
397 bias-pull-down;
402 mux {
405 bias-pull-down;
410 mux {
416 bias-disable;
420 spi_pins: spi-pins {
421 mux {
426 bias-disable;
430 spi_ss0_pins: spi-ss0 {
431 mux {
434 bias-disable;
439 mux-0 {
446 bias-pull-up;
449 mux-1 {
452 bias-disable;
457 mux {
460 bias-pull-down;
465 mux-0 {
472 bias-pull-up;
475 mux-1 {
478 bias-disable;
483 mux {
486 bias-pull-down;
491 mux {
494 bias-disable;
499 mux {
503 bias-disable;
508 mux {
512 bias-disable;
517 mux {
521 bias-disable;
526 mux {
530 bias-disable;
535 mux {
539 bias-disable;
544 mux {
548 bias-disable;
553 mux {
557 bias-disable;
562 mux {
566 bias-disable;
571 mux {
575 bias-disable;
579 eth_rgmii_pins: eth-rgmii {
580 mux {
596 bias-disable;
600 eth_rmii_pins: eth-rmii {
601 mux {
612 bias-disable;
617 mux {
620 bias-disable;
625 mux {
628 bias-disable;
633 mux {
636 bias-disable;
641 mux {
644 bias-disable;
649 mux {
652 bias-disable;
657 mux {
660 bias-disable;
665 mux {
668 bias-disable;
673 mux {
676 bias-disable;
681 mux {
684 bias-disable;
689 mux {
692 bias-disable;
697 mux {
700 bias-disable;
705 mux {
708 bias-disable;
713 mux {
716 bias-disable;
735 reset-names = "viu", "venc", "vcbus", "bt656",
740 clock-names = "vpu", "vapb";
742 * VPU clocking is provided by two identical clock paths
743 * VPU_0 and VPU_1 muxed to a single clock by a glitch
744 * free mux to safely change frequency while running.
745 * Same for VAPB but with a final gate after the glitch free mux.
747 assigned-clocks = <&clkc CLKID_VPU_0_SEL>,
749 <&clkc CLKID_VPU>, /* Glitch free mux */
752 <&clkc CLKID_VAPB_SEL>; /* Glitch free mux */
753 assigned-clock-parents = <&clkc CLKID_FCLK_DIV3>,
759 assigned-clock-rates = <0>, /* Do Nothing */
768 compatible = "amlogic,meson-gxbb-saradc", "amlogic,meson-saradc";
773 clock-names = "clkin", "core", "adc_clk", "adc_sel";
780 clock-names = "core", "clkin0", "clkin1";
788 clock-names = "core", "clkin0", "clkin1";
796 clock-names = "core", "clkin0", "clkin1";
808 clock-names = "core";
810 num-cs = <1>;
819 clock-names = "xtal", "pclk", "baud";
824 clock-names = "xtal", "pclk", "baud";
829 clock-names = "xtal", "pclk", "baud";
834 clock-names = "xtal", "pclk", "baud";
839 clock-names = "xtal", "pclk", "baud";
843 compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
844 power-domains = <&pwrc PWRC_GXBB_VPU_ID>;
848 compatible = "amlogic,gxbb-vdec", "amlogic,gx-vdec";
853 clock-names = "dos_parser", "dos", "vdec_1", "vdec_hevc";
855 reset-names = "esparser";