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/Linux-v5.10/lib/
Dkfifo.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * A generic kernel FIFO implementation
17 * internal helper to calculate the unused elements in a fifo
19 static inline unsigned int kfifo_unused(struct __kfifo *fifo) in kfifo_unused() argument
21 return (fifo->mask + 1) - (fifo->in - fifo->out); in kfifo_unused()
24 int __kfifo_alloc(struct __kfifo *fifo, unsigned int size, in __kfifo_alloc() argument
31 size = roundup_pow_of_two(size); in __kfifo_alloc()
33 fifo->in = 0; in __kfifo_alloc()
34 fifo->out = 0; in __kfifo_alloc()
35 fifo->esize = esize; in __kfifo_alloc()
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/Linux-v5.10/drivers/staging/fwserial/
Ddma_fifo.c1 // SPDX-License-Identifier: GPL-2.0+
3 * DMA-able FIFO implementation
21 #define FAIL(fifo, condition, format...) ({ \ argument
22 fifo->corrupt = !!(condition); \
23 WARN(fifo->corrupt, format); \
31 return check - (lo + 1) < (hi - 1) - lo; in addr_check()
35 * dma_fifo_init: initialize the fifo to a valid but inoperative state
36 * @fifo: address of in-place "struct dma_fifo" object
38 void dma_fifo_init(struct dma_fifo *fifo) in dma_fifo_init() argument
40 memset(fifo, 0, sizeof(*fifo)); in dma_fifo_init()
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Ddma_fifo.h1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * DMA-able FIFO interface
12 * The design basis for the DMA FIFO is to provide an output side that
15 * logically consistent 'apparent' size (ie, bytes in + bytes avail is static
16 * for the lifetime of the FIFO).
19 * variably-sized. DMA output transactions can be retired out-of-order but
20 * the FIFO will only advance the output in the original input sequence.
21 * This means the FIFO will eventually stall if a transaction is never retired.
23 * Chunking the output side into cache line multiples means that some FIFO
25 * then the in and out markers are re-aligned to the next cache line.
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/Linux-v5.10/include/linux/
Dkfifo.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * A generic kernel FIFO implementation
12 * How to porting drivers to the new generic FIFO API:
14 * - Modify the declaration of the "struct kfifo *" object into a
15 * in-place "struct kfifo" object
16 * - Init the in-place object with kfifo_alloc() or kfifo_init()
17 * Note: The address of the in-place "struct kfifo" object must be
19 * - Replace the use of __kfifo_put into kfifo_in and __kfifo_get
21 * - Replace the use of kfifo_put into kfifo_in_spinlocked and kfifo_get
26 * - The formerly __kfifo_* functions are renamed into kfifo_*
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Dpxa2xx_ssp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * This driver supports the following PXA CPU/SSP ports:-
50 #define SSCR0_DSS GENMASK(3, 0) /* Data Size Select (mask) */
51 #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */
61 #define SSCR0_EDSS BIT(20) /* Extended data size select */
63 #define SSCR0_RIM BIT(22) /* Receive FIFO overrrun interrupt mask */
64 #define SSCR0_TUM BIT(23) /* Transmit FIFO underrun interrupt mask */
66 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
67 #define SSCR0_FPCKE BIT(29) /* FIFO packing enable */
71 #define SSCR1_RIE BIT(0) /* Receive FIFO Interrupt Enable */
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/Linux-v5.10/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
Dbase.c37 nvkm_fifo_recover_chan(struct nvkm_fifo *fifo, int chid) in nvkm_fifo_recover_chan() argument
40 if (WARN_ON(!fifo->func->recover_chan)) in nvkm_fifo_recover_chan()
42 spin_lock_irqsave(&fifo->lock, flags); in nvkm_fifo_recover_chan()
43 fifo->func->recover_chan(fifo, chid); in nvkm_fifo_recover_chan()
44 spin_unlock_irqrestore(&fifo->lock, flags); in nvkm_fifo_recover_chan()
48 nvkm_fifo_pause(struct nvkm_fifo *fifo, unsigned long *flags) in nvkm_fifo_pause() argument
50 return fifo->func->pause(fifo, flags); in nvkm_fifo_pause()
54 nvkm_fifo_start(struct nvkm_fifo *fifo, unsigned long *flags) in nvkm_fifo_start() argument
56 return fifo->func->start(fifo, flags); in nvkm_fifo_start()
60 nvkm_fifo_fault(struct nvkm_fifo *fifo, struct nvkm_fault_data *info) in nvkm_fifo_fault() argument
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Dgpfifogv100.c34 return chan->chid; in gv100_fifo_gpfifo_submit_token()
40 struct nvkm_subdev *subdev = &chan->base.fifo->engine.subdev; in gv100_fifo_gpfifo_engine_valid()
41 struct nvkm_device *device = subdev->device; in gv100_fifo_gpfifo_engine_valid()
47 mutex_lock(&subdev->mutex); in gv100_fifo_gpfifo_engine_valid()
48 nvkm_mask(device, 0x002630, BIT(chan->runl), BIT(chan->runl)); in gv100_fifo_gpfifo_engine_valid()
54 nvkm_kmap(chan->base.inst); in gv100_fifo_gpfifo_engine_valid()
55 nvkm_mo32(chan->base.inst, 0x0ac, mask, data); in gv100_fifo_gpfifo_engine_valid()
56 nvkm_done(chan->base.inst); in gv100_fifo_gpfifo_engine_valid()
60 nvkm_mask(device, 0x002630, BIT(chan->runl), 0); in gv100_fifo_gpfifo_engine_valid()
61 mutex_unlock(&subdev->mutex); in gv100_fifo_gpfifo_engine_valid()
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Dchan.c43 struct nvkm_engine *engine = object->oproxy.object->engine; in nvkm_fifo_chan_child_fini()
44 struct nvkm_fifo_chan *chan = object->chan; in nvkm_fifo_chan_child_fini()
45 struct nvkm_fifo_engn *engn = &chan->engn[engine->subdev.index]; in nvkm_fifo_chan_child_fini()
46 const char *name = nvkm_subdev_name[engine->subdev.index]; in nvkm_fifo_chan_child_fini()
49 if (--engn->usecount) in nvkm_fifo_chan_child_fini()
52 if (chan->func->engine_fini) { in nvkm_fifo_chan_child_fini()
53 ret = chan->func->engine_fini(chan, engine, suspend); in nvkm_fifo_chan_child_fini()
55 nvif_error(&chan->object, in nvkm_fifo_chan_child_fini()
61 if (engn->object) { in nvkm_fifo_chan_child_fini()
62 ret = nvkm_object_fini(engn->object, suspend); in nvkm_fifo_chan_child_fini()
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Ddmanv04.c39 struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem; in nv04_fifo_dma_object_dtor()
41 mutex_lock(&chan->fifo->base.engine.subdev.mutex); in nv04_fifo_dma_object_dtor()
42 nvkm_ramht_remove(imem->ramht, cookie); in nv04_fifo_dma_object_dtor()
43 mutex_unlock(&chan->fifo->base.engine.subdev.mutex); in nv04_fifo_dma_object_dtor()
51 struct nvkm_instmem *imem = chan->fifo->base.engine.subdev.device->imem; in nv04_fifo_dma_object_ctor()
52 u32 context = 0x80000000 | chan->base.chid << 24; in nv04_fifo_dma_object_ctor()
53 u32 handle = object->handle; in nv04_fifo_dma_object_ctor()
56 switch (object->engine->subdev.index) { in nv04_fifo_dma_object_ctor()
63 return -EINVAL; in nv04_fifo_dma_object_ctor()
66 mutex_lock(&chan->fifo->base.engine.subdev.mutex); in nv04_fifo_dma_object_ctor()
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/Linux-v5.10/drivers/platform/mellanox/
Dmlxbf-tmfifo.c1 // SPDX-License-Identifier: GPL-2.0+
24 #include "mlxbf-tmfifo-regs.h"
26 /* Vring size. */
29 /* Console Tx buffer size. */
35 /* House-keeping timer interval. */
38 /* Virtual devices sharing the TM FIFO. */
53 * mlxbf_tmfifo_vring - Structure of the TmFifo virtual ring
63 * @num: vring size (number of descriptors)
64 * @align: vring alignment size
67 * @fifo: pointer to the tmfifo structure
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/Linux-v5.10/drivers/md/bcache/
Dutil.h1 /* SPDX-License-Identifier: GPL-2.0 */
38 size_t size, used; \
45 (heap)->used = 0; \
46 (heap)->size = (_size); \
47 _bytes = (heap)->size * sizeof(*(heap)->data); \
48 (heap)->data = kvmalloc(_bytes, (gfp) & GFP_KERNEL); \
49 (heap)->data; \
54 kvfree((heap)->data); \
55 (heap)->data = NULL; \
58 #define heap_swap(h, i, j) swap((h)->data[i], (h)->data[j])
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/Linux-v5.10/Documentation/devicetree/bindings/powerpc/fsl/
Dmpc5121-psc.txt4 ----------------
7 are specified by fsl,mpc5121-psc-uart nodes in the
8 fsl,mpc5121-immr SoC node. Additionally the PSC FIFO
9 Controller node fsl,mpc5121-psc-fifo is required there:
11 fsl,mpc512x-psc-uart nodes
12 --------------------------
15 - compatible : Should contain "fsl,<soc>-psc-uart" and "fsl,<soc>-psc"
17 - reg : Offset and length of the register set for the PSC device
18 - interrupts : <a b> where a is the interrupt number of the
19 PSC FIFO Controller and b is a field that represents an
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/Linux-v5.10/sound/soc/meson/
Daiu-fifo.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <sound/soc-dai.h>
12 #include "aiu-fifo.h"
27 struct snd_soc_pcm_runtime *rtd = ss->private_data; in aiu_fifo_dai()
36 struct aiu_fifo *fifo = dai->playback_dma_data; in aiu_fifo_pointer() local
37 struct snd_pcm_runtime *runtime = substream->runtime; in aiu_fifo_pointer()
40 addr = snd_soc_component_read(component, fifo->mem_offset + AIU_MEM_RD); in aiu_fifo_pointer()
42 return bytes_to_frames(runtime, addr - (unsigned int)runtime->dma_addr); in aiu_fifo_pointer()
47 struct snd_soc_component *component = dai->component; in aiu_fifo_enable()
48 struct aiu_fifo *fifo = dai->playback_dma_data; in aiu_fifo_enable() local
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Daxg-fifo.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
14 #include <sound/soc-dai.h>
16 #include "axg-fifo.h"
20 * capture frontend DAI. The logic behind this two types of fifo is very
48 struct snd_soc_pcm_runtime *rtd = ss->private_data; in axg_fifo_dai()
64 return dai->dev; in axg_fifo_dev()
67 static void __dma_enable(struct axg_fifo *fifo, bool enable) in __dma_enable() argument
69 regmap_update_bits(fifo->map, FIFO_CTRL0, CTRL0_DMA_EN, in __dma_enable()
76 struct axg_fifo *fifo = axg_fifo_data(ss); in axg_fifo_pcm_trigger() local
82 __dma_enable(fifo, true); in axg_fifo_pcm_trigger()
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/Linux-v5.10/Documentation/devicetree/bindings/net/
Dibm,emac.txt8 correct clock-frequency property.
13 - device_type : "network"
15 - compatible : compatible list, contains 2 entries, first is
16 "ibm,emac-CHIP" where CHIP is the host ASIC (440gx,
18 "ibm,emac4". For Axon, thus, we have: "ibm,emac-axon",
20 - interrupts : <interrupt mapping for EMAC IRQ and WOL IRQ>
21 - reg : <registers mapping>
22 - local-mac-address : 6 bytes, MAC address
23 - mal-device : phandle of the associated McMAL node
24 - mal-tx-channel : 1 cell, index of the tx channel on McMAL associated
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/Linux-v5.10/drivers/net/ethernet/intel/fm10k/
Dfm10k_mbx.c1 // SPDX-License-Identifier: GPL-2.0
2 /* Copyright(c) 2013 - 2019 Intel Corporation. */
7 * fm10k_fifo_init - Initialize a message FIFO
8 * @fifo: pointer to FIFO
9 * @buffer: pointer to memory to be used to store FIFO
10 * @size: maximum message size to store in FIFO, must be 2^n - 1
12 static void fm10k_fifo_init(struct fm10k_mbx_fifo *fifo, u32 *buffer, u16 size) in fm10k_fifo_init() argument
14 fifo->buffer = buffer; in fm10k_fifo_init()
15 fifo->size = size; in fm10k_fifo_init()
16 fifo->head = 0; in fm10k_fifo_init()
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/Linux-v5.10/arch/powerpc/boot/dts/
Dmpc5121.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Copyright 2007-2008 Freescale Semiconductor Inc.
8 #include <dt-bindings/clock/mpc512x-clock.h>
10 /dts-v1/;
15 #address-cells = <1>;
16 #size-cells = <1>;
17 interrupt-parent = <&ipic>;
25 #address-cells = <1>;
26 #size-cells = <0>;
31 d-cache-line-size = <0x20>; /* 32 bytes */
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Deiger.dts11 /dts-v1/;
14 #address-cells = <2>;
15 #size-cells = <1>;
18 dcr-parent = <&{/cpus/cpu@0}>;
30 #address-cells = <1>;
31 #size-cells = <0>;
37 clock-frequency = <0>; /* Filled in by U-Boot */
38 timebase-frequency = <0>; /* Filled in by U-Boot */
39 i-cache-line-size = <32>;
40 d-cache-line-size = <32>;
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/Linux-v5.10/drivers/net/wimax/i2400m/
Dtx.c3 * Generic (non-bus specific) TX handling
6 * Copyright (C) 2007-2008 Intel Corporation. All rights reserved.
35 * Intel Corporation <linux-wimax@intel.com>
37 * - Initial implementation
39 * Intel Corporation <linux-wimax@intel.com>
40 * Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
41 * - Rewritten to use a single FIFO to lower the memory allocation
43 * well as splitting out bus-specific code.
47 * software FIFO, as data/control frames can be coalesced (while the
50 * A FIFO is used because at the end it is resource-cheaper that trying
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/Linux-v5.10/drivers/net/wireless/realtek/rtw88/
Dmac.c1 // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
2 /* Copyright(c) 2018-2019 Realtek Corporation
83 return -EINVAL; in rtw_mac_pre_system_cfg()
132 if (cmd->base == RTW_PWR_ADDR_SDIO) in rtw_pwr_cmd_polling()
133 offset = cmd->offset | SDIO_LOCAL_OFFSET; in rtw_pwr_cmd_polling()
135 offset = cmd->offset; in rtw_pwr_cmd_polling()
137 if (do_pwr_poll_cmd(rtwdev, offset, cmd->mask, cmd->value)) in rtw_pwr_cmd_polling()
145 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
149 if (rtwdev->chip->id == RTW_CHIP_TYPE_8723D) in rtw_pwr_cmd_polling()
152 if (do_pwr_poll_cmd(rtwdev, offset, cmd->mask, cmd->value)) in rtw_pwr_cmd_polling()
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/Linux-v5.10/drivers/net/ethernet/google/gve/
Dgve_tx.c1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
4 * Copyright (C) 2015-2019 Google, Inc.
18 iowrite32be(val, &priv->db_bar2[be32_to_cpu(q_resources->db_index)]); in gve_tx_put_doorbell()
25 * gve_tx_fifo_* manages the Registered Segment as a FIFO - clients must
29 static int gve_tx_fifo_init(struct gve_priv *priv, struct gve_tx_fifo *fifo) in gve_tx_fifo_init() argument
31 fifo->base = vmap(fifo->qpl->pages, fifo->qpl->num_entries, VM_MAP, in gve_tx_fifo_init()
33 if (unlikely(!fifo->base)) { in gve_tx_fifo_init()
34 netif_err(priv, drv, priv->dev, "Failed to vmap fifo, qpl_id = %d\n", in gve_tx_fifo_init()
35 fifo->qpl->id); in gve_tx_fifo_init()
36 return -ENOMEM; in gve_tx_fifo_init()
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/Linux-v5.10/drivers/gpu/drm/msm/
Dmsm_rd.c1 // SPDX-License-Identifier: GPL-2.0-only
9 * tail -f /sys/kernel/debug/dri/<minor>/rd > logfile.rd
18 * tail -f /sys/kernel/debug/dri/<minor>/hangrd > logfile.rd
26 * The module-param "rd_full", which defaults to false, enables snapshotting
27 * all (non-written) buffers in the submit, rather than just cmdstream bo's.
54 RD_GPUADDR, /* u32 gpuaddr, u32 size */
71 (CIRC_CNT((circ)->head, (circ)->tail, BUF_SZ))
73 (CIRC_CNT_TO_END((circ)->head, (circ)->tail, BUF_SZ))
76 (CIRC_SPACE((circ)->head, (circ)->tail, BUF_SZ))
78 (CIRC_SPACE_TO_END((circ)->head, (circ)->tail, BUF_SZ))
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/Linux-v5.10/samples/kfifo/
Ddma-example.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Sample fifo dma implementation
13 * This module shows how to handle fifo dma operations.
16 /* fifo size in elements (bytes) */
19 static struct kfifo fifo; variable
28 printk(KERN_INFO "DMA fifo test start\n"); in example_init()
30 if (kfifo_alloc(&fifo, FIFO_SIZE, GFP_KERNEL)) { in example_init()
32 return -ENOMEM; in example_init()
35 printk(KERN_INFO "queue size: %u\n", kfifo_size(&fifo)); in example_init()
37 kfifo_in(&fifo, "test", 4); in example_init()
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/Linux-v5.10/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dampdu.c31 /* max Tx ba window size (in pdu) */
33 /* default Tx ba window size (in pdu) */
35 /* default Rx ba window size (in pdu) */
37 /* max Rx ba window size (in pdu) */
52 #define NUM_FFPLD_FIFO 4 /* number of fifo concerned by pre-loading */
56 #define FFPLD_MPDU_SIZE 1800 /* estimate of maximum mpdu size */
76 #define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1))
77 #define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1))
79 /* structure to hold tx fifo information and pre-loading state
85 * ampdu_pld_size: number of bytes to be pre-loaded
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/Linux-v5.10/drivers/rpmsg/
Dqcom_glink_smem.c1 // SPDX-License-Identifier: GPL-2.0
30 #define TX_BLOCKED_CMD_RESERVE 8 /* size of struct read_notif_request */
42 void *fifo; member
53 void *fifo; in glink_smem_rx_avail() local
57 if (!pipe->fifo) { in glink_smem_rx_avail()
58 fifo = qcom_smem_get(pipe->remote_pid, in glink_smem_rx_avail()
60 if (IS_ERR(fifo)) { in glink_smem_rx_avail()
61 pr_err("failed to acquire RX fifo handle: %ld\n", in glink_smem_rx_avail()
62 PTR_ERR(fifo)); in glink_smem_rx_avail()
66 pipe->fifo = fifo; in glink_smem_rx_avail()
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