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/Linux-v5.10/Documentation/devicetree/bindings/clock/
Dclk-exynos-audss.txt9 - compatible: should be one of the following:
10 - "samsung,exynos4210-audss-clock" - controller compatible with all Exynos4 SoCs.
11 - "samsung,exynos5250-audss-clock" - controller compatible with Exynos5250
13 - "samsung,exynos5410-audss-clock" - controller compatible with Exynos5410
15 - "samsung,exynos5420-audss-clock" - controller compatible with Exynos5420
17 - reg: physical base address and length of the controller's register set.
19 - #clock-cells: should be 1.
21 - clocks:
22 - pll_ref: Fixed rate PLL reference clock, parent of mout_audss. "fin_pll"
24 - pll_in: Input PLL to the AudioSS block, parent of mout_audss. "fout_epll"
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/Linux-v5.10/Documentation/devicetree/bindings/sound/
Dsamsung-i2s.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/samsung-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Samsung SoC I2S controller
10 - Krzysztof Kozlowski <krzk@kernel.org>
11 - Sylwester Nawrocki <s.nawrocki@samsung.com>
16 samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
18 samsung,s5pv210-i2s: for 8/16/24bit multichannel (5.1) I2S with
22 samsung,exynos5420-i2s: for 8/16/24bit multichannel (5.1) I2S for
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/Linux-v5.10/arch/arm/boot/dts/
Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung Exynos5420 SoC device tree source
8 * Samsung Exynos5420 SoC device nodes are listed in this file.
9 * Exynos5420 based board files can include this file and provide
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
19 compatible = "samsung,exynos5420", "samsung,exynos5";
42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
46 compatible = "operating-points-v2";
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Dexynos5410.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5410.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 interrupt-parent = <&gic>;
30 #address-cells = <1>;
31 #size-cells = <0>;
35 compatible = "arm,cortex-a15";
37 clock-frequency = <1600000000>;
42 compatible = "arm,cortex-a15";
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Dexynos5420-peach-pit.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
15 #include "exynos5420.dtsi"
16 #include "exynos5420-cpus.dtsi"
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Dexynos5800-peach-pi.dts1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
12 #include <dt-bindings/clock/maxim,max77802.h>
13 #include <dt-bindings/regulator/maxim,max77802.h>
14 #include <dt-bindings/sound/samsung-i2s.h>
16 #include "exynos5420-cpus.dtsi"
21 compatible = "google,pi-rev16",
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Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
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/Linux-v5.10/sound/soc/samsung/
Di2s.c1 // SPDX-License-Identifier: GPL-2.0
3 // ALSA SoC Audio Layer - Samsung I2S Controller driver
8 #include <dt-bindings/sound/samsung-i2s.h>
12 #include <linux/clk-provider.h>
23 #include <linux/platform_data/asoc-s3c.h>
27 #include "i2s.h"
28 #include "i2s-regs.h"
99 /* The I2S controller's core clock */
102 /* Clock for generating I2S signals */
108 /* Cache of selected I2S registers for system suspend */
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/Linux-v5.10/drivers/clk/samsung/
Dclk-exynos5420.c1 // SPDX-License-Identifier: GPL-2.0-only
7 * Common Clock Framework support for Exynos5420 SoC.
10 #include <dt-bindings/clock/exynos5420.h>
12 #include <linux/clk-provider.h>
18 #include "clk-cpu.h"
19 #include "clk-exynos5-subcmu.h"
144 EXYNOS5420, enumerator
894 /* Audio - I2S */
901 /* SPI Pre-Ratio */
1435 PLL_36XX_RATE(24 * MHZ, 393216003U, 197, 3, 2, -25690),
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/Linux-v5.10/drivers/gpu/drm/exynos/
Dexynos_hdmi.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Seung-Woo Kim <sw0312.kim@samsung.com>
9 * Based on drivers/media/video/s5p-tv/hdmi_drv.c
33 #include <sound/hdmi-codec.h>
34 #include <media/cec-notifier.h>
44 #include "regs-hdmi.h"
105 * required parents of clock when HDMI-PHY is respectively off or on.
671 return hdmi_reg_map[reg_id & 0xffff][hdata->drv_data->type]; in hdmi_map_reg()
677 return readl(hdata->regs + hdmi_map_reg(hdata, reg_id)); in hdmi_reg_read()
683 writel(value, hdata->regs + hdmi_map_reg(hdata, reg_id)); in hdmi_reg_writeb()
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