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/Linux-v6.1/Documentation/devicetree/bindings/power/
Dpd-samsung.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/power/pd-samsung.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Krzysztof Kozlowski <krzk@kernel.org>
17 - $ref: power-domain.yaml#
22 - samsung,exynos4210-pd
23 - samsung,exynos5433-pd
32 clock-names:
41 "#power-domain-cells":
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/Linux-v6.1/arch/arm/boot/dts/
Dexynos4.dtsi1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
19 #include <dt-bindings/clock/exynos4.h>
20 #include <dt-bindings/clock/exynos-audss-clk.h>
21 #include <dt-bindings/interrupt-controller/arm-gic.h>
22 #include <dt-bindings/interrupt-controller/irq.h>
25 interrupt-parent = <&gic>;
26 #address-cells = <1>;
27 #size-cells = <1>;
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Dexynos3250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include "exynos4-cpu-thermal.dtsi"
18 #include <dt-bindings/clock/exynos3250.h>
19 #include <dt-bindings/interrupt-controller/arm-gic.h>
20 #include <dt-bindings/interrupt-controller/irq.h>
24 interrupt-parent = <&gic>;
25 #address-cells = <1>;
26 #size-cells = <1>;
50 #address-cells = <1>;
51 #size-cells = <0>;
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Dexynos5250.dtsi1 // SPDX-License-Identifier: GPL-2.0
17 #include <dt-bindings/clock/exynos5250.h>
19 #include "exynos4-cpu-thermal.dtsi"
20 #include <dt-bindings/clock/exynos-audss-clk.h>
50 #address-cells = <1>;
51 #size-cells = <0>;
53 cpu-map {
66 compatible = "arm,cortex-a15";
69 clock-names = "cpu";
70 operating-points-v2 = <&cpu0_opp_table>;
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Dexynos5420.dtsi1 // SPDX-License-Identifier: GPL-2.0
14 #include <dt-bindings/clock/exynos5420.h>
15 #include <dt-bindings/clock/exynos-audss-clk.h>
16 #include <dt-bindings/interrupt-controller/arm-gic.h>
42 * by exynos5420-cpus.dtsi or exynos5422-cpus.dtsi.
45 cluster_a15_opp_table: opp-table0 {
46 compatible = "operating-points-v2";
47 opp-shared;
49 opp-1800000000 {
50 opp-hz = /bits/ 64 <1800000000>;
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Dexynos4210.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 * Samsung's Exynos4210 SoC device tree source
5 * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
7 * Copyright (c) 2010-2011 Linaro Ltd.
10 * Samsung's Exynos4210 SoC device nodes are listed in this file. Exynos4210
15 * Exynos4210 SoC. As device tree coverage for Exynos4210 increases, additional
20 #include "exynos4-cpu-thermal.dtsi"
23 compatible = "samsung,exynos4210", "samsung,exynos4";
32 #address-cells = <1>;
33 #size-cells = <0>;
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Dexynos5800.dtsi1 // SPDX-License-Identifier: GPL-2.0
20 compatible = "samsung,exynos5800-clock", "syscon";
24 opp-2000000000 {
25 opp-hz = /bits/ 64 <2000000000>;
26 opp-microvolt = <1312500 1312500 1500000>;
27 clock-latency-ns = <140000>;
29 opp-1900000000 {
30 opp-hz = /bits/ 64 <1900000000>;
31 opp-microvolt = <1262500 1262500 1500000>;
32 clock-latency-ns = <140000>;
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Dexynos4412.dtsi1 // SPDX-License-Identifier: GPL-2.0
19 #include "exynos4-cpu-thermal.dtsi"
29 fimc-lite0 = &fimc_lite_0;
30 fimc-lite1 = &fimc_lite_1;
35 #address-cells = <1>;
36 #size-cells = <0>;
38 cpu-map {
57 compatible = "arm,cortex-a9";
60 clock-names = "cpu";
61 operating-points-v2 = <&cpu0_opp_table>;
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/Linux-v6.1/drivers/soc/samsung/
Dpm_domains.c1 // SPDX-License-Identifier: GPL-2.0
9 // conjunction with runtime-pm. Support for both device-tree and non-device-tree
31 struct generic_pm_domain pd; member
37 struct exynos_pm_domain *pd; in exynos_pd_power() local
42 pd = container_of(domain, struct exynos_pm_domain, pd); in exynos_pd_power()
43 base = pd->base; in exynos_pd_power()
45 pwr = power_on ? pd->local_pwr_cfg : 0; in exynos_pd_power()
51 while ((readl_relaxed(base + 0x4) & pd->local_pwr_cfg) != pwr) { in exynos_pd_power()
54 pr_err("Power domain %s %s failed\n", domain->name, op); in exynos_pd_power()
55 return -ETIMEDOUT; in exynos_pd_power()
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/Linux-v6.1/drivers/clk/samsung/
Dclk-exynos5-subcmu.c1 // SPDX-License-Identifier: GPL-2.0
5 // Common Clock Framework support for Exynos5 power-domain dependent clocks
14 #include "clk-exynos5-subcmu.h"
24 for (; num_regs > 0; --num_regs, ++rd) { in exynos5_subcmu_clk_save()
25 rd->save = readl(base + rd->offset); in exynos5_subcmu_clk_save()
26 writel((rd->save & ~rd->mask) | rd->value, base + rd->offset); in exynos5_subcmu_clk_save()
27 rd->save &= rd->mask; in exynos5_subcmu_clk_save()
35 for (; num_regs > 0; --num_regs, ++rd) in exynos5_subcmu_clk_restore()
36 writel((readl(base + rd->offset) & ~rd->mask) | rd->save, in exynos5_subcmu_clk_restore()
37 base + rd->offset); in exynos5_subcmu_clk_restore()
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/Linux-v6.1/arch/arm64/boot/dts/exynos/
Dexynos5433.dtsi1 // SPDX-License-Identifier: GPL-2.0
16 #include <dt-bindings/clock/exynos5433.h>
17 #include <dt-bindings/interrupt-controller/arm-gic.h>
21 #address-cells = <2>;
22 #size-cells = <2>;
24 interrupt-parent = <&gic>;
26 arm-a53-pmu {
27 compatible = "arm,cortex-a53-pmu";
32 interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
35 arm-a57-pmu {
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/Linux-v6.1/Documentation/admin-guide/
Dkernel-parameters.txt5 force -- enable ACPI if default was off
6 on -- enable ACPI but allow fallback to DT [arm64]
7 off -- disable ACPI if default was on
8 noirq -- do not use ACPI for IRQ routing
9 strict -- Be less tolerant of platforms that are not
11 rsdt -- prefer RSDT over (default) XSDT
12 copy_dsdt -- copy DSDT to memory
26 If set to vendor, prefer vendor-specific driver
58 Documentation/firmware-guide/acpi/debug.rst for more information about
116 Format: <byte> or <bitmap-list>
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/Linux-v6.1/
DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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