| /Linux-v5.15/arch/mips/include/asm/ |
| D | war.h | 18 * erratum #28
19 * "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
30 * erratum #52
43 * "MIPS R4400MC Errata, Processor Revision 1.0", erratum #10
44 * "MIPS R4400MC Errata, Processor Revision 2.0 & 3.0", erratum #4
57 * erratum #23
61 * erratum #41
62 * "MIPS R4000MC Errata, Processor Revision 2.2 and 3.0", erratum
64 * "MIPS R4400PC/SC Errata, Processor Revision 1.0", erratum #7
65 * "MIPS R4400MC Errata, Processor Revision 1.0", erratum #5
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| D | timex.h | 43 * On R4000/R4400 before version 5.0 an erratum exists such that if the
47 * There is a suggested workaround and also the erratum can't strike if
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| /Linux-v5.15/arch/arm64/kernel/ |
| D | cpu_errata.c | 101 /* ... or if the system is affected by an erratum */ in cpu_enable_trap_ctr_access()
355 .desc = "ARM erratum 832075",
365 .desc = "ARM erratum 834220",
374 .desc = "ARM erratum 843419",
383 .desc = "ARM erratum 845719",
391 .desc = "Cavium erratum 23154",
398 .desc = "Cavium erratum 27456",
405 .desc = "Cavium erratum 30115",
419 .desc = "Qualcomm Technologies Falkor/Kryo erratum 1003",
428 .desc = "Qualcomm erratum 1009, or ARM erratum 1286807",
[all …]
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| /Linux-v5.15/Documentation/devicetree/bindings/timer/ |
| D | arm,arch_timer.yaml | 72 allwinner,erratum-unknown1:
74 description: Indicates the presence of an erratum found in Allwinner SoCs,
78 fsl,erratum-a008585:
80 description: Indicates the presence of QorIQ erratum A-008585, which says
85 hisilicon,erratum-161010101:
87 description: Indicates the presence of Hisilicon erratum 161010101, which
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| /Linux-v5.15/arch/arm64/ |
| D | Kconfig | 368 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
390 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
393 Under certain conditions this erratum can cause a clean line eviction
412 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
418 address, then this erratum might cause a clean cache line to be
435 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
440 maintenance operation to the same address, then this erratum might
456 erratum 832075 on Cortex-A57 parts up to r1p2.
475 erratum 834220 on Cortex-A57 parts up to r1p2.
496 erratum 845719 on Cortex-A53 parts up to r0p4.
[all …]
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| /Linux-v5.15/arch/arm/mach-omap2/ |
| D | dma.c | 88 * Erratum ID: Not Available in configure_dma_errata()
97 * Erratum ID: Not Available in configure_dma_errata()
118 * Erratum ID: i378: OMAP2+: sDMA Channel is not disabled in configure_dma_errata()
126 * Erratum ID: i541: sDMA FIFO draining does not finish in configure_dma_errata()
137 * Erratum ID: i88 : Special programming model needed to disable DMA in configure_dma_errata()
146 * Erratum 3.2/3.3: sometimes 0 is returned if CSAC/CDAC is in configure_dma_errata()
152 * Erratum ID: Not Available in configure_dma_errata()
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| D | pm34xx.c | 241 * of AUTO_CNT = 1 enabled. This takes care of erratum ID i443. in omap_sram_idle()
427 * - omap3_do_wfi for erratum i581 WA,
529 * RTA is disabled during initialization as per erratum i608 in omap3_pm_init()
540 * See OMAP36xx Erratum i582 "PER Domain reset issue after in omap3_pm_init()
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| /Linux-v5.15/arch/arm/ |
| D | Kconfig | 799 fail. This erratum is present in 1136 (before r1p4), 1156 and 1176.
808 r1p* erratum. If a code sequence containing an ARM/Thumb
825 erratum. For very specific sequences of memory operations, it is
839 erratum. Any asynchronous access to the L2 cache may encounter a
852 (r1p0..r2p2) erratum. Under rare circumstances, a DMB instruction
865 (r2p0..r2p2) erratum. Under certain conditions, specific to the
880 r1p0) erratum. On affected cores the LoUIS bit field of the CLIDR
890 r2p0) erratum. A faulty ASID can be sent to the other CPUs for the
892 As a consequence of this erratum, some TLB entries which should be
903 (r2p*) erratum. Under very rare conditions, a faulty
[all …]
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| /Linux-v5.15/Documentation/admin-guide/hw-vuln/ |
| D | multihit.rst | 4 iTLB multihit is an erratum where some processors may incur a machine check
9 exploit this erratum to perform a denial of service attack.
15 Variations of this erratum are present on most Intel Core and Xeon processor
16 models. The erratum is not present on:
62 Attacks against the iTLB multihit erratum can be mounted from malicious
91 Enumeration of the erratum
107 This erratum can be mitigated by restricting the use of large page sizes to
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| /Linux-v5.15/drivers/iommu/arm/arm-smmu/ |
| D | arm-smmu-impl.c | 61 * Cavium CN88xx erratum #27704. in cavium_cfg_probe()
66 dev_notice(smmu->dev, "\tenabling workaround for Cavium erratum 27704\n"); in cavium_cfg_probe()
151 * Marvell Armada-AP806 erratum #582743. in mrvl_mmu500_readq()
161 * Marvell Armada-AP806 erratum #582743. in mrvl_mmu500_writeq()
171 * Armada-AP806 erratum #582743. in mrvl_mmu500_cfg_probe()
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| /Linux-v5.15/drivers/clocksource/ |
| D | Kconfig | 314 bool "Workaround for Freescale/NXP Erratum A-008585"
319 This option enables a workaround for Freescale/NXP Erratum
322 fsl,erratum-a008585 property is found in the timer node.
325 bool "Workaround for Hisilicon Erratum 161010101"
330 This option enables a workaround for Hisilicon Erratum
331 161010101. The workaround will be active if the hisilicon,erratum-161010101
335 bool "Workaround for Cortex-A73 erratum 858921"
346 bool "Workaround for Allwinner A64 erratum UNKNOWN1"
353 allwinner,erratum-unknown1 property is found in the timer node.
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| D | arm_arch_timer.c | 268 * Theoretically the erratum should not occur more than twice in succession
439 .id = "fsl,erratum-a008585",
440 .desc = "Freescale erratum a005858",
452 .id = "hisilicon,erratum-161010101",
453 .desc = "HiSilicon erratum 161010101",
464 .desc = "HiSilicon erratum 161010101",
477 .desc = "ARM erratum 858921",
485 .id = "allwinner,erratum-unknown1",
486 .desc = "Allwinner erratum UNKNOWN1",
499 .desc = "ARM erratum 1418040",
[all …]
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| /Linux-v5.15/arch/arm/mach-tegra/ |
| D | reset-handler.S | 156 orr r0, r0, #1 << 14 @ erratum 716044
159 orr r0, r0, #1 << 4 @ erratum 742230
160 orr r0, r0, #1 << 11 @ erratum 751472
172 orr r0, r0, #1 << 6 @ erratum 743622
173 orr r0, r0, #1 << 11 @ erratum 751472
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| /Linux-v5.15/tools/perf/util/ |
| D | amd-sample-raw.c | 45 * Erratum #1238 workaround is to ignore MSRC001_1030[IbsIcMiss] in pr_ibs_fetch_ctl()
46 * Erratum #1347 workaround is to use table provided in erratum in pr_ibs_fetch_ctl()
113 * Erratum #1293 in pr_ibs_op_data3()
156 * Erratum #1293: ignore op_data2 if DcMissNoMabAlloc or SwPf are set in amd_dump_ibs_op()
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| /Linux-v5.15/Documentation/devicetree/bindings/net/nfc/ |
| D | trf7970a.txt | 16 "IRQ Status Read" erratum.
18 erratum.
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| /Linux-v5.15/Documentation/devicetree/bindings/i2c/ |
| D | i2c-mpc.yaml | 49 fsl,i2c-erratum-a004447:
52 Indicates the presence of QorIQ erratum A-004447, which
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| /Linux-v5.15/arch/x86/kernel/cpu/ |
| D | amd.c | 33 static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum);
690 /* F16h erratum 793, CVE-2013-6885 */ in early_init_amd()
695 * Check whether the machine is affected by erratum 400. This is in early_init_amd()
736 * (AMD Erratum #110, docId: 25759). in init_amd_k8()
802 * Apply erratum 665 fix unconditionally so machines without a BIOS in init_amd_ln()
898 * Fix erratum 1076: CPB feature bit not being set in CPUID. in init_amd_zn()
986 * susceptible to erratum #1054 "Instructions Retired Performance in init_amd()
1047 /* Erratum 658 */ in cpu_detect_tlb_amd()
1123 static bool cpu_has_amd_erratum(struct cpuinfo_x86 *cpu, const int *erratum) in cpu_has_amd_erratum() argument
1125 int osvw_id = *erratum++; in cpu_has_amd_erratum()
[all …]
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| /Linux-v5.15/arch/arm/mach-exynos/ |
| D | mcpm-exynos.c | 33 * Erratum 799270 workaround. This macro is the same as the common one (in
34 * arch/arm/include/asm/cacheflush.h) except for the erratum handling.
46 /* Dummy Load of a device register to avoid Erratum 799270 */ \
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| /Linux-v5.15/arch/arm/kernel/ |
| D | entry-header.S | 227 @ We must avoid clrex due to Cortex-A15 erratum #830321
237 @ We must avoid clrex due to Cortex-A15 erratum #830321
305 @ We must avoid clrex due to Cortex-A15 erratum #830321
337 @ We must avoid clrex due to Cortex-A15 erratum #830321
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| /Linux-v5.15/drivers/usb/host/ |
| D | fsl-mph-dr-of.c | 223 /* Activate Erratum by reading property in device tree */ in fsl_usb2_mph_dr_of_probe()
225 of_property_read_bool(np, "fsl,usb-erratum-a007792"); in fsl_usb2_mph_dr_of_probe()
227 of_property_read_bool(np, "fsl,usb-erratum-a005275"); in fsl_usb2_mph_dr_of_probe()
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| /Linux-v5.15/arch/mips/kernel/ |
| D | r4k-bugs64.c | 198 * 3.0" by MIPS Technologies, Inc., erratum #23 for details. in check_daddi()
258 * MIPS Technologies, Inc., erratum #7 for details. in check_daddiu()
261 * 2.2 and 3.0" by MIPS Technologies, Inc., erratum #41 this in check_daddiu()
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| /Linux-v5.15/drivers/char/agp/ |
| D | amd-k7-agp.c | 433 erratum 20: strobe glitch with Nvidia NV10 GeForce cards. in agp_amdk7_probe()
461 * erratum 44: SYSCLK/AGPCLK skew causes 2X failures -- Force mode to 1X in agp_amdk7_probe()
462 * erratum 45: Timing problem prevents fast writes -- Disable fast write. in agp_amdk7_probe()
463 * erratum 46: Setup violation on AGP SBA pins - Disable side band addressing. in agp_amdk7_probe()
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| /Linux-v5.15/arch/powerpc/boot/dts/fsl/ |
| D | p2041si-post.dtsi | 375 fsl,i2c-erratum-a004447;
379 fsl,i2c-erratum-a004447;
384 fsl,i2c-erratum-a004447;
388 fsl,i2c-erratum-a004447;
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| /Linux-v5.15/drivers/acpi/ |
| D | spcr.c | 16 * Erratum 44 for QDF2432v1 and QDF2400v1 SoCs describes the BUSY bit as
173 * If the E44 erratum is required, then we need to tell the pl011 in acpi_parse_spcr()
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| /Linux-v5.15/arch/powerpc/sysdev/ |
| D | fsl_msi.c | 162 * MPIC version 2.0 has erratum PIC1. It causes in fsl_compose_msi_msg()
191 * MPIC version 2.0 has erratum PIC1. For now MSI in fsl_setup_msi_irqs()
193 * being used on the board with this erratum. in fsl_setup_msi_irqs()
462 /* For erratum PIC1 on MPIC version 2.0*/ in fsl_of_msi_probe()
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