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/Linux-v6.1/arch/arm/boot/dts/
Dmotorola-cpcap-mapphone.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
10 interrupt-parent = <&gpio1>;
12 interrupt-controller;
13 #interrupt-cells = <2>;
14 #address-cells = <1>;
15 #size-cells = <0>;
16 spi-max-frequency = <9600000>;
17 spi-cs-high;
18 spi-cpol;
19 spi-cpha;
[all …]
Domap3-evm-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
6 #include <dt-bindings/input/input.h>
7 #include "omap-gpmc-smsc911x.dtsi"
12 cpu0-supply = <&vcc>;
18 compatible = "regulator-fixed";
19 regulator-name = "hsusb2_vbus";
20 regulator-min-microvolt = <3300000>;
21 regulator-max-microvolt = <3300000>;
23 startup-delay-us = <70000>;
24 enable-active-high;
[all …]
Dimx6qp-prtwd3.dts1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
7 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
16 stdout-path = &uart4;
29 clock_ksz8081: clock-ksz8081 {
30 compatible = "fixed-clock";
31 #clock-cells = <0>;
32 clock-frequency = <50000000>;
35 clock_ksz9031: clock-ksz9031 {
36 compatible = "fixed-clock";
[all …]
Dimx6sx-udoo-neo.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
12 stdout-path = "serial0:115200n8";
16 compatible = "gpio-leds";
19 label = "udoo-neo:red:mmc";
21 default-state = "off";
22 linux,default-trigger = "mmc0";
26 label = "udoo-neo:orange:user";
28 default-state = "keep";
32 reg_sdio_pwr: regulator-sdio-pwr {
33 compatible = "regulator-fixed";
[all …]
Dmotorola-mapphone-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
6 #include "motorola-cpcap-mapphone.dtsi"
10 stdout-path = &uart3;
19 * We seem to have only 1021 MB accessible, 1021 - 1022 is locked,
20 * then 1023 - 1024 seems to contain mbm.
28 gpio-poweroff {
29 compatible = "gpio-poweroff";
30 pinctrl-0 = <&poweroff_gpio>;
[all …]
Domap4-panda-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2011-2013 Texas Instruments Incorporated - https://www.ti.com/
5 #include <dt-bindings/input/input.h>
7 #include "omap4-mcpdm.dtsi"
15 reserved-memory {
16 #address-cells = <1>;
17 #size-cells = <1>;
20 dsp_memory_region: dsp-memory@98000000 {
21 compatible = "shared-dma-pool";
27 ipu_memory_region: ipu-memory@98800000 {
[all …]
Dsun8i-h3-orangepi-plus.dts4 * This file is dual-licensed: you can use it either under the terms
43 /* The Orange Pi Plus is an extended version of the Orange Pi 2 */
44 #include "sun8i-h3-orangepi-2.dts"
48 compatible = "xunlong,orangepi-plus", "allwinner,sun8i-h3";
54 reg_gmac_3v3: gmac-3v3 {
55 compatible = "regulator-fixed";
56 regulator-name = "gmac-3v3";
57 regulator-min-microvolt = <3300000>;
58 regulator-max-microvolt = <3300000>;
59 startup-delay-us = <100000>;
[all …]
Dam3517-som.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
5 * Based on am3517-evm.dts
11 cpu0-supply = <&vdd_core_reg>;
16 compatible = "regulator-fixed";
17 regulator-name = "wl1271_buf";
18 regulator-min-microvolt = <1800000>;
19 regulator-max-microvolt = <1800000>;
20 pinctrl-names = "default";
21 pinctrl-0 = <&wl12xx_buffer_pins>;
23 regulator-always-on;
[all …]
Dimx6q-logicpd.dts1 // SPDX-License-Identifier: GPL-2.0
5 /dts-v1/;
7 #include "imx6-logicpd-som.dtsi"
8 #include "imx6-logicpd-baseboard.dtsi"
11 model = "Logic PD i.MX6QD SOM-M3";
12 compatible = "logicpd,imx6q-logicpd", "fsl,imx6q";
14 backlight: backlight-lvds {
15 compatible = "pwm-backlight";
17 brightness-levels = <0 4 8 16 32 64 128 255>;
18 default-brightness-level = <6>;
[all …]
/Linux-v6.1/Documentation/scsi/
Daha152x.rst1 .. SPDX-License-Identifier: GPL-2.0
5 Adaptec AHA-1520/1522 SCSI driver for Linux (aha152x)
8 Copyright |copy| 1993-1999 Jürgen Fischer <fischer@norbit.de>
14 bottom-half handler complete()).
27 IRQ interrupt level (9-12; default 11)
28 SCSI_ID scsi id of controller (0-7; default 7)
30 PARITY enable parity checking (0/1; default 1 [on])
31 SYNCHRONOUS enable synchronous transfers (0/1; default 1 [on])
32 DELAY: bus reset delay (default 100)
33 EXT_TRANS: enable extended translation (0/1: default 0 [off])
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/memory-controllers/
Darm,pl172.txt5 - compatible: Must be "arm,primecell" and exactly one from
8 - reg: Must contains offset/length value for controller.
10 - #address-cells: Must be 2. The partition number has to be encoded in the
11 first address cell and it may accept values 0..N-1
12 (N - total number of partitions). The second cell is the
15 - #size-cells: Must be set to 1.
17 - ranges: Must contain one or more chip select memory regions.
19 - clocks: Must contain references to controller clocks.
21 - clock-names: Must contain "mpmcclk" and "apb_pclk".
23 - clock-ranges: Empty property indicating that child nodes can inherit
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/iio/adc/
Dti,palmas-gpadc.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/iio/adc/ti,palmas-gpadc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Tony Lindgren <tony@atomide.com>
13 This ADC is often used to provide channels via the io-channels
27 11 DC-DC current probe (how does this work?)
35 const: ti,palmas-gpadc
41 "#io-channel-cells":
44 ti,channel0-current-microamp:
[all …]
/Linux-v6.1/arch/arm64/boot/dts/mediatek/
Dmt8195-cherry.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/spmi/spmi.h>
26 stdout-path = "serial0:115200n8";
35 pp3300_z5: regulator-pp3300-ldo-z5 {
36 compatible = "regulator-fixed";
37 regulator-name = "pp3300_ldo_z5";
38 regulator-always-on;
39 regulator-boot-on;
40 regulator-min-microvolt = <3300000>;
[all …]
Dmt8192-asurada.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/spmi/spmi.h>
18 stdout-path = "serial0:115200n8";
27 pp1800_ldo_g: regulator-1v8-g {
28 compatible = "regulator-fixed";
29 regulator-name = "pp1800_ldo_g";
30 regulator-always-on;
31 regulator-boot-on;
[all …]
/Linux-v6.1/drivers/net/ethernet/oki-semi/pch_gbe/
Dpch_gbe_phy.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 1999 - 2010 Intel Corporation.
12 #define PHY_MAX_REG_ADDRESS 0x1F /* 5 bit address bus (0-0x1F) */
25 #define PHY_1000T_CTRL 0x09 /* 1000Base-T Control Register */
26 #define PHY_1000T_STATUS 0x0A /* 1000Base-T Status Register */
27 #define PHY_EXT_STATUS 0x0F /* Extended Status Register */
29 #define PHY_EXT_PHYSP_CONTROL 0x14 /* Extended PHY Specific Control Register */
31 #define PHY_EXT_PHYSP_STATUS 0x1B /* Extended PHY Specific Status Register */
35 #define MII_CR_COLL_TEST_ENABLE 0x0080 /* Collision test enable */
40 #define MII_CR_AUTO_NEG_EN 0x1000 /* Auto Neg Enable */
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/regulator/
Drichtek,rtmv20-regulator.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/regulator/richtek,rtmv20-regulator.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - ChiYuan Huang <cy_huang@richtek.com>
15 (Enable/Fail), Enable pin to turn chip on, and Fail pin as fault indication.
27 wakeup-source: true
32 enable-gpios:
33 description: A connection of the 'enable' gpio line.
36 richtek,ld-pulse-delay-us:
[all …]
/Linux-v6.1/arch/arm64/boot/dts/qcom/
Dsc8280xp.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
7 #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
8 #include <dt-bindings/clock/qcom,rpmh.h>
9 #include <dt-bindings/interconnect/qcom,sc8280xp.h>
10 #include <dt-bindings/interrupt-controller/arm-gic.h>
11 #include <dt-bindings/mailbox/qcom-ipcc.h>
12 #include <dt-bindings/power/qcom-rpmpd.h>
13 #include <dt-bindings/soc/qcom,rpmh-rsc.h>
14 #include <dt-bindings/thermal/thermal.h>
17 interrupt-parent = <&intc>;
[all …]
Dsm8350.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
6 #include <dt-bindings/interrupt-controller/arm-gic.h>
7 #include <dt-bindings/clock/qcom,dispcc-sm8350.h>
8 #include <dt-bindings/clock/qcom,gcc-sm8350.h>
9 #include <dt-bindings/clock/qcom,rpmh.h>
10 #include <dt-bindings/dma/qcom-gpi.h>
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/interconnect/qcom,sm8350.h>
13 #include <dt-bindings/mailbox/qcom-ipcc.h>
14 #include <dt-bindings/power/qcom-rpmpd.h>
[all …]
Dsdm630-sony-xperia-nile.dtsi1 // SPDX-License-Identifier: BSD-3-Clause
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/input/gpio-keys.h>
13 #include <dt-bindings/leds/common.h>
17 qcom,msm-id = <318 0>;
18 qcom,board-id = <8 1>;
19 qcom,pmic-id = <0x1001b 0x101011a 0x00 0x00 0x1001b 0x201011a 0x00 0x00>;
21 /* This part enables graphical output via bootloader-enabled display */
25 #address-cells = <2>;
[all …]
/Linux-v6.1/sound/hda/ext/
Dhdac_ext_controller.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * hdac-ext-controller.c - HD-audio extended controller functions.
5 * Copyright (C) 2014-2015 Intel Corp
12 #include <linux/delay.h>
18 * processing pipe helpers - these helpers are useful for dealing with HDA
23 * snd_hdac_ext_bus_ppcap_enable - enable/disable processing pipe capability
25 * @enable: flag to turn on/off the capability
27 void snd_hdac_ext_bus_ppcap_enable(struct hdac_bus *bus, bool enable) in snd_hdac_ext_bus_ppcap_enable() argument
30 if (!bus->ppcap) { in snd_hdac_ext_bus_ppcap_enable()
31 dev_err(bus->dev, "Address of PP capability is NULL"); in snd_hdac_ext_bus_ppcap_enable()
[all …]
/Linux-v6.1/include/ufs/
Dufs_quirks.h1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * Copyright (c) 2014-2016, The Linux Foundation. All rights reserved.
22 * ufs_dev_quirk - ufs device quirk info
42 * - As soon as SW sees the DL NAC error, it should schedule the error handler
43 * - Error handler would sleep for 50ms to see if there are any fatal errors
45 * - If there are fatal errors then SW does normal error recovery.
46 * - If there are no fatal errors then SW sends the NOP command to device
48 * - If NOP command times out, SW does normal error recovery
49 * - If NOP command succeed, skip the error handling.
52 * enable this quirk to initiate quick error recovery and also silence related
[all …]
/Linux-v6.1/include/linux/
Dpxa2xx_ssp.h1 /* SPDX-License-Identifier: GPL-2.0-only */
5 * This driver supports the following PXA CPU/SSP ports:-
50 #define SSCR0_DataSize(x) ((x) - 1) /* Data Size Select [4..16] */
56 #define SSCR0_SSE BIT(7) /* Synchronous Serial Port Enable */
60 #define SSCR0_EDSS BIT(20) /* Extended data size select */
65 #define SSCR0_SlotsPerFrm(x) (((x) - 1) << 24) /* Time slots per frame [1..8] */
66 #define SSCR0_FPCKE BIT(29) /* FIFO packing enable */
70 #define SSCR1_RIE BIT(0) /* Receive FIFO Interrupt Enable */
71 #define SSCR1_TIE BIT(1) /* Transmit FIFO Interrupt Enable */
72 #define SSCR1_LBM BIT(2) /* Loop-Back Mode */
[all …]
/Linux-v6.1/net/sched/
DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
12 delay, and which ones to drop. This is the job of the queueing
25 To administer these schedulers, you'll need the user-level utilities
31 This Quality of Service (QoS) support will enable you to use
51 Say Y here if you want to use the Class-Based Queueing (CBQ) packet
53 into a tree-like hierarchy of classes; the leaves of this tree are
71 in-depth articles.
92 Say Y here if you want to use the ATM pseudo-scheduler. This
105 Say Y here if you want to use an n-band priority queue packet
112 tristate "Hardware Multiqueue-aware Multi Band Queuing (MULTIQ)"
[all …]
/Linux-v6.1/drivers/i2c/busses/
Di2c-octeon-core.h1 /* SPDX-License-Identifier: GPL-2.0 */
4 #include <linux/delay.h>
7 #include <linux/i2c-smbus.h>
13 #define SW_TWSI_EIA BIT_ULL(61) /* Extended internal address */
27 #define SW_TWSI_OP_EOP (6ULL << SW_TWSI_OP_SHIFT) /* Extended opcode */
29 /* Controller extended opcode word (bits 34:32) */
38 #define TWSI_CTL_CE 0x80 /* High level controller enable */
39 #define TWSI_CTL_ENAB 0x40 /* Bus enable */
40 #define TWSI_CTL_STA 0x20 /* Master-mode start, HW clears when done */
41 #define TWSI_CTL_STP 0x10 /* Master-mode stop, HW clears when done */
[all …]
/Linux-v6.1/arch/x86/kernel/cpu/
Dcyrix.c1 // SPDX-License-Identifier: GPL-2.0
3 #include <linux/delay.h>
4 #include <linux/isa-dma.h>
8 #include <asm/processor-cyrix.h>
9 #include <asm/processor-flags.h>
11 #include <asm/pci-direct.h>
87 * Reset the slow-loop (SLOP) bit on the 686(L) which is set by some old
103 setCx86(CX86_CCR3, (ccr3 & 0x0f) | 0x10); /* enable MAPEN */ in check_cx686_slop()
111 pr_info("Recalibrating delay loop with SLOP bit reset\n"); in check_cx686_slop()
113 c->loops_per_jiffy = loops_per_jiffy; in check_cx686_slop()
[all …]

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