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/Linux-v6.1/Documentation/devicetree/bindings/leds/
Dissi,is31fl319x.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vincent Knecht <vincent.knecht@mailoo.org>
14 Previously known as Si-En SN319{0,1,3,6,9}.
26 - issi,is31fl3190
27 - issi,is31fl3191
28 - issi,is31fl3193
29 - issi,is31fl3196
30 - issi,is31fl3199
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/Linux-v6.1/sound/pci/au88x0/
Dau88x0.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
73 //#define VORTEX_IS_QUAD(x) (((x)->codec == NULL) ? 0 : ((x)->codec->ext_id&0x80))
74 #define VORTEX_IS_QUAD(x) ((x)->isquad)
77 (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_VORTEX_2) || \
78 (x->rev == 0xfe && x->device == PCI_DEVICE_ID_AUREAL_ADVANTAGE))
89 #define MIX_CAPT(x) (vortex->mixcapt[x])
90 #define MIX_PLAYB(x) (vortex->mixplayb[x])
91 #define MIX_SPDIF(x) (vortex->mixspdif[x])
147 /* Global resources */
221 /* global stuff. */
[all …]
Dau88x0_synth.c1 // SPDX-License-Identifier: GPL-2.0-or-later
13 static void vortex_fifo_setwtvalid(vortex_t * vortex, int fifo, int en);
14 static void vortex_connection_adb_mixin(vortex_t * vortex, int en,
18 static void vortex_connection_mixin_mix(vortex_t * vortex, int en,
32 //temp = hwread(vortex->mmio, 0x80 + ((wt >> 0x5)<< 0xf) + (((wt & 0x1f) >> 1) << 2)); in vortex_wt_setstereo()
33 temp = hwread(vortex->mmio, WT_STEREO(wt)); in vortex_wt_setstereo()
35 //hwwrite(vortex->mmio, 0x80 + ((wt >> 0x5)<< 0xf) + (((wt & 0x1f) >> 1) << 2), temp); in vortex_wt_setstereo()
36 hwwrite(vortex->mmio, WT_STEREO(wt), temp); in vortex_wt_setstereo()
40 static void vortex_wt_setdsout(vortex_t * vortex, u32 wt, int en) in vortex_wt_setdsout() argument
45 temp = hwread(vortex->mmio, WT_DSREG((wt >= 0x20) ? 1 : 0)); in vortex_wt_setdsout()
[all …]
/Linux-v6.1/drivers/gpu/drm/imx/dcss/
Ddcss-dtg.c1 // SPDX-License-Identifier: GPL-2.0
13 #include "dcss-dev.h"
100 if (!dtg->in_use) in dcss_dtg_write()
101 dcss_writel(val, dtg->base_reg + ofs); in dcss_dtg_write()
103 dcss_ctxld_write(dtg->ctxld, dtg->ctx_id, in dcss_dtg_write()
104 val, dtg->base_ofs + ofs); in dcss_dtg_write()
112 status = dcss_readl(dtg->base_reg + DCSS_DTG_INT_STATUS); in dcss_dtg_irq_handler()
117 dcss_ctxld_kick(dtg->ctxld); in dcss_dtg_irq_handler()
119 dcss_writel(status & LINE0_IRQ, dtg->base_reg + DCSS_DTG_INT_CONTROL); in dcss_dtg_irq_handler()
129 dtg->ctxld_kick_irq = platform_get_irq_byname(pdev, "ctxld_kick"); in dcss_dtg_irq_config()
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/Linux-v6.1/drivers/net/ethernet/freescale/enetc/
Denetc_hw.h1 /* SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause) */
2 /* Copyright 2017-2019 NXP */
42 /* VF-PF Message passing */
105 /** SI BDR sub-blocks, n = 0..7 */
344 /** Global regs, offset: 2_0000h */
357 /* IP global registers, PF only */
358 void __iomem *global; member
363 /* MDIO issue workaround (on LS1028A) -
367 * To protect the MDIO accesses a readers-writers locking
376 * group together multiple non-MDIO register accesses to
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/Linux-v6.1/arch/arm64/boot/dts/ti/
Dk3-am6528-iot2050-basic-pg2.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Siemens AG, 2018-2021
9 * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 2
13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
16 /dts-v1/;
18 #include "k3-am6528-iot2050-basic-common.dtsi"
19 #include "k3-am65-iot2050-common-pg2.dtsi"
22 compatible = "siemens,iot2050-basic-pg2", "ti,am654";
Dk3-am6548-iot2050-advanced.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Siemens AG, 2018-2021
9 * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 1
10 * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
16 /dts-v1/;
18 #include "k3-am6548-iot2050-advanced-common.dtsi"
19 #include "k3-am65-iot2050-common-pg1.dtsi"
22 compatible = "siemens,iot2050-advanced", "ti,am654";
Dk3-am6528-iot2050-basic.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Siemens AG, 2018-2021
9 * AM6528-based (dual-core) IOT2050 Basic variant, Product Generation 1
13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
16 /dts-v1/;
18 #include "k3-am6528-iot2050-basic-common.dtsi"
19 #include "k3-am65-iot2050-common-pg1.dtsi"
22 compatible = "siemens,iot2050-basic", "ti,am654";
Dk3-am6548-iot2050-advanced-pg2.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) Siemens AG, 2018-2021
9 * AM6548-based (quad-core) IOT2050 Advanced variant, Product Generation 2
10 * 2 GB RAM, 16 GB eMMC, USB-serial converter on connector X30
13 * https://new.siemens.com/global/en/products/automation/pc-based/iot-gateways/simatic-iot2050.html
16 /dts-v1/;
18 #include "k3-am6548-iot2050-advanced-common.dtsi"
19 #include "k3-am65-iot2050-common-pg2.dtsi"
22 compatible = "siemens,iot2050-advanced-pg2", "ti,am654";
27 /* lock-step mode not supported on this board */
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/Linux-v6.1/Documentation/devicetree/bindings/iio/accel/
Dmurata,sca3300.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 3-axis industrial accelerometer with digital SPI interface
11 https://www.murata.com/en-global/products/sensor/accel/sca3300
14 - Tomas Melin <tomas.melin@vaisala.com>
19 - murata,sca3300
20 - murata,scl3300
25 spi-max-frequency:
29 - compatible
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/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
Dnv50.c35 return fb->func->ram_new(&fb->base, pram); in nv50_fb_ram_new()
67 { 0x0000000a, "GLOBAL" },
138 struct nvkm_subdev *subdev = &fb->base.subdev; in nv50_fb_intr()
139 struct nvkm_device *device = subdev->device; in nv50_fb_intr()
140 struct nvkm_fifo *fifo = device->fifo; in nv50_fb_intr()
142 const struct nvkm_enum *en, *re, *cl, *sc; in nv50_fb_intr() local
160 if (device->chipset < 0xa3 || in nv50_fb_intr()
161 device->chipset == 0xaa || device->chipset == 0xac) { in nv50_fb_intr()
174 en = nvkm_enum_find(vm_engine, st0); in nv50_fb_intr()
177 if (cl && cl->data) sc = nvkm_enum_find(cl->data, st3); in nv50_fb_intr()
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/Linux-v6.1/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_dccg.c36 (dccg_dcn->regs->reg)
40 dccg_dcn->dccg_shift->field_name, dccg_dcn->dccg_mask->field_name
43 dccg_dcn->base.ctx
45 dccg->ctx->logger
51 if (dccg->ref_dppclk && req_dppclk) { in dccg2_update_dpp_dto()
52 int ref_dppclk = dccg->ref_dppclk; in dccg2_update_dpp_dto()
55 // phase / modulo = dpp pipe clk / dpp global clk in dccg2_update_dpp_dto()
57 phase = ((modulo * req_dppclk) + ref_dppclk - 1) / ref_dppclk; in dccg2_update_dpp_dto()
74 dccg->pipe_dppclk_khz[dpp_inst] = req_dppclk; in dccg2_update_dpp_dto()
88 // DCN20 has never been validated for non-xtalin as reference in dccg2_get_dccg_ref_freq()
[all …]
/Linux-v6.1/net/mpls/
Dmpls_iptunnel.c1 // SPDX-License-Identifier: GPL-2.0-or-later
30 static unsigned int mpls_encap_size(struct mpls_iptunnel_encap *en) in mpls_encap_size() argument
33 return en->labels * sizeof(struct mpls_shim_hdr); in mpls_encap_size()
55 out_dev = dst->dev; in mpls_xmit()
61 !dst->lwtstate || skb_warn_if_lro(skb)) in mpls_xmit()
66 tun_encap_info = mpls_lwtunnel_encap(dst->lwtstate); in mpls_xmit()
71 * - disabled => use default TTL value from LWT in mpls_xmit()
72 * - enabled => use TTL value from IPv4/IPv6 header in mpls_xmit()
73 * - default => in mpls_xmit()
74 * Global ttl propagation setting: in mpls_xmit()
[all …]
/Linux-v6.1/fs/f2fs/
Dextent_cache.c1 // SPDX-License-Identifier: GPL-2.0
22 if (cached_re->ofs <= ofs && in __lookup_rb_tree_fast()
23 cached_re->ofs + cached_re->len > ofs) { in __lookup_rb_tree_fast()
33 struct rb_node *node = root->rb_root.rb_node; in __lookup_rb_tree_slow()
39 if (ofs < re->ofs) in __lookup_rb_tree_slow()
40 node = node->rb_left; in __lookup_rb_tree_slow()
41 else if (ofs >= re->ofs + re->len) in __lookup_rb_tree_slow()
42 node = node->rb_right; in __lookup_rb_tree_slow()
66 struct rb_node **p = &root->rb_root.rb_node; in f2fs_lookup_rb_tree_ext()
73 if (key < re->key) { in f2fs_lookup_rb_tree_ext()
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/Linux-v6.1/arch/arm/boot/dts/
Dbcm2837.dtsi2 #include "bcm2835-common.dtsi"
3 #include "bcm2835-rpi-common.dtsi"
11 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
14 compatible = "brcm,bcm2836-l1-intc";
16 interrupt-controller;
17 #interrupt-cells = <2>;
18 interrupt-parent = <&local_intc>;
22 arm-pmu {
23 compatible = "arm,cortex-a53-pmu";
24 interrupt-parent = <&local_intc>;
[all …]
Dbcm2836.dtsi1 // SPDX-License-Identifier: GPL-2.0
3 #include "bcm2835-common.dtsi"
4 #include "bcm2835-rpi-common.dtsi"
12 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
15 compatible = "brcm,bcm2836-l1-intc";
17 interrupt-controller;
18 #interrupt-cells = <2>;
19 interrupt-parent = <&local_intc>;
23 arm-pmu {
24 compatible = "arm,cortex-a7-pmu";
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/pinctrl/
Drenesas,rzg2l-pinctrl.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzg2l-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Geert Uytterhoeven <geert+renesas@glider.be>
11 - Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
16 Pin multiplexing and GPIO configuration is performed on a per-pin basis.
24 - items:
25 - enum:
26 - renesas,r9a07g043-pinctrl # RZ/G2UL{Type-1,Type-2} and RZ/Five
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/Linux-v6.1/drivers/net/ethernet/mellanox/mlx5/core/
Den_common.c14 * - Redistributions of source code must retain the above
18 * - Redistributions in binary form must reproduce the above
33 #include "en.h"
35 /* mlx5e global resources should be placed in this file.
36 * Global resources are common to all the netdevices created on the same nic.
41 bool ro_pci_enable = pcie_relaxed_ordering_enabled(mdev->pdev); in mlx5e_mkey_set_relaxed_ordering()
58 return -ENOMEM; in mlx5e_create_mkey()
77 struct mlx5e_hw_objs *res = &mdev->mlx5e_res.hw_objs; in mlx5e_create_mdev_resources()
80 err = mlx5_core_alloc_pd(mdev, &res->pdn); in mlx5e_create_mdev_resources()
86 err = mlx5_core_alloc_transport_domain(mdev, &res->td.tdn); in mlx5e_create_mdev_resources()
[all …]
/Linux-v6.1/arch/mips/cavium-octeon/executive/
Dcvmx-helper.c7 * Copyright (c) 2003-2008 Cavium Networks
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
36 #include <asm/octeon/cvmx-config.h>
38 #include <asm/octeon/cvmx-fpa.h>
39 #include <asm/octeon/cvmx-pip.h>
40 #include <asm/octeon/cvmx-pko.h>
41 #include <asm/octeon/cvmx-ipd.h>
42 #include <asm/octeon/cvmx-spi.h>
43 #include <asm/octeon/cvmx-helper.h>
[all …]
/Linux-v6.1/Documentation/power/
Dbasic-pm-debugging.rst21 modes causes the PM core to skip some platform-related callbacks which on ACPI
45 ----------------------------
53 - test the freezing of processes
56 - test the freezing of processes and suspending of devices
59 - test the freezing of processes, suspending of devices and platform
60 global control methods [1]_
63 - test the freezing of processes, suspending of devices, platform
64 global control methods [1]_ and the disabling of nonboot CPUs
67 - test the freezing of processes, suspending of devices, platform global
73 the platform global control methods are only available on ACPI systems
[all …]
/Linux-v6.1/drivers/gpu/drm/nouveau/nvkm/engine/disp/
Dgv100.c40 struct nvkm_device *device = ior->disp->engine.subdev.device; in gv100_sor_hda_device_entry()
56 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_watermark()
65 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio_sym()
75 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_dp_audio()
103 struct nvkm_device *device = ior->disp->engine.subdev.device; in gv100_sor_hdmi_ctrl()
134 /* Vendor-specific InfoFrame (VSI). */ in gv100_sor_hdmi_ctrl()
164 struct nvkm_device *device = sor->disp->engine.subdev.device; in gv100_sor_state()
165 const u32 coff = (state == &sor->arm) * 0x8000 + sor->id * 0x20; in gv100_sor_state()
168 state->proto_evo = (ctrl & 0x00000f00) >> 8; in gv100_sor_state()
169 switch (state->proto_evo) { in gv100_sor_state()
[all …]
/Linux-v6.1/include/linux/
Dedac.h6 * 2006-2008 (c) MontaVista Software, Inc. This file is licensed under
26 #define EDAC_OPSTATE_INVAL -1
60 * enum dev_type - describe the type of memory DRAM chips used at the stick
93 * enum hw_event_mc_err_type - type of the detected error
95 * @HW_EVENT_ERR_CORRECTED: Corrected Error - Indicates that an ECC
97 * @HW_EVENT_ERR_UNCORRECTED: Uncorrected Error - Indicates an error that
101 * it for example, by re-trying the operation).
102 * @HW_EVENT_ERR_DEFERRED: Deferred Error - Indicates an uncorrectable
108 * @HW_EVENT_ERR_FATAL: Fatal Error - Uncorrected error that could not
110 * @HW_EVENT_ERR_INFO: Informational - The CPER spec defines a forth
[all …]
/Linux-v6.1/drivers/leds/
Dleds-is31fl32xx.c1 // SPDX-License-Identifier: GPL-2.0-only
8 * http://www.issi.com/US/product-analog-fxled-driver.shtml
9 * http://www.si-en.com/product.asp?parentid=890
39 u8 channel; /* 1-based, max priv->cdef->channels */
51 * struct is31fl32xx_chipdef - chip-specific attributes
55 * @global_control_reg : address of Global Control register (optional)
67 * If non-NULL, @reset_func will be called during probing to set all
142 dev_dbg(&priv->client->dev, "writing register 0x%02X=0x%02X", reg, val); in is31fl32xx_write()
144 ret = i2c_smbus_write_byte_data(priv->client, reg, val); in is31fl32xx_write()
146 dev_err(&priv->client->dev, in is31fl32xx_write()
[all …]
/Linux-v6.1/drivers/media/pci/ddbridge/
Dddbridge.h1 /* SPDX-License-Identifier: GPL-2.0 */
5 * Copyright (C) 2010-2017 Digital Devices GmbH
50 #define DDBRIDGE_VERSION "0.9.33-integrated"
182 struct dvb_ca_en50221 en; member
258 struct dvb_ca_en50221 *en; member
341 struct mutex mutex; /* lock access to global ddb array */
354 /* ddbridge-core.c */
/Linux-v6.1/Documentation/loongarch/
Dintroduction.rst1 .. SPDX-License-Identifier: GPL-2.0
7 LoongArch is a new RISC ISA, which is a bit like MIPS or RISC-V. There are
8 currently 3 variants: a reduced 32-bit version (LA32R), a standard 32-bit
9 version (LA32S) and a 64-bit version (LA64). There are 4 privilege levels
22 ----
24 LoongArch has 32 GPRs ( ``$r0`` ~ ``$r31`` ); each one is 32-bit wide in LA32
25 and 64-bit wide in LA64. ``$r0`` is hard-wired to zero, and the other registers
26 are not architecturally special. (Except ``$r1``, which is hard-wired as the
30 the LoongArch ELF psABI spec, in :ref:`References <loongarch-references>`:
40 ``$r4``-``$r11`` ``$a0``-``$a7`` Argument registers No
[all …]

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