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/Linux-v5.10/Documentation/devicetree/bindings/media/xilinx/
Dxlnx,csi2rxss.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Xilinx MIPI CSI-2 Receiver Subsystem
10 - Vishal Sagar <vishal.sagar@xilinx.com>
13 The Xilinx MIPI CSI-2 Receiver Subsystem is used to capture MIPI CSI-2
16 The subsystem consists of a MIPI D-PHY in slave mode which captures the
17 data packets. This is passed along the MIPI CSI-2 Rx IP which extracts the
20 For more details, please refer to PG232 Xilinx MIPI CSI-2 Receiver Subsystem.
21 Please note that this bindings includes only the MIPI CSI-2 Rx controller
[all …]
/Linux-v5.10/arch/arm64/boot/dts/rockchip/
Drk3399-roc-pc-mezzanine.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (c) 2017 T-Chip Intelligent Technology Co., Ltd
7 /dts-v1/;
8 #include "rk3399-roc-pc.dtsi"
11 model = "Firefly ROC-RK3399-PC Mezzanine Board";
12 compatible = "firefly,roc-rk3399-pc-mezzanine", "rockchip,rk3399";
15 poe_12v: poe-12v {
16 compatible = "regulator-fixed";
17 regulator-name = "poe_12v";
18 regulator-always-on;
[all …]
Drk3399pro-vmarc-som.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/pwm/pwm.h>
13 compatible = "vamrs,rk3399pro-vmarc-som", "rockchip,rk3399pro";
15 vcc3v3_pcie: vcc-pcie-regulator {
16 compatible = "regulator-fixed";
17 enable-active-high;
19 pinctrl-names = "default";
20 pinctrl-0 = <&pcie_pwr>;
[all …]
Drk3399-rock-pi-4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 /dts-v1/;
8 #include <dt-bindings/input/linux-event-codes.h>
9 #include <dt-bindings/pwm/pwm.h>
11 #include "rk3399-opp.dtsi"
15 stdout-path = "serial2:1500000n8";
18 clkin_gmac: external-gmac-clock {
19 compatible = "fixed-clock";
20 clock-frequency = <125000000>;
21 clock-output-names = "clkin_gmac";
[all …]
Drk3399-evb.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/pwm/pwm.h>
12 compatible = "rockchip,rk3399-evb", "rockchip,rk3399";
15 compatible = "pwm-backlight";
16 brightness-levels = <
49 default-brightness-level = <200>;
53 edp_panel: edp-panel {
54 compatible ="lg,lp079qx1-sp0v";
56 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
[all …]
Drk3399-rockpro64.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
14 stdout-path = "serial2:1500000n8";
17 clkin_gmac: external-gmac-clock {
18 compatible = "fixed-clock";
19 clock-frequency = <125000000>;
20 clock-output-names = "clkin_gmac";
21 #clock-cells = <0>;
[all …]
Drk3399-pinebook-pro.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 /dts-v1/;
9 #include <dt-bindings/input/gpio-keys.h>
10 #include <dt-bindings/input/linux-event-codes.h>
11 #include <dt-bindings/pwm/pwm.h>
12 #include <dt-bindings/usb/pd.h>
13 #include <dt-bindings/leds/common.h>
15 #include "rk3399-opp.dtsi"
19 compatible = "pine64,pinebook-pro", "rockchip,rk3399";
22 stdout-path = "serial2:1500000n8";
[all …]
Drk3399-firefly.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include <dt-bindings/input/linux-event-codes.h>
8 #include <dt-bindings/pwm/pwm.h>
10 #include "rk3399-opp.dtsi"
13 model = "Firefly-RK3399 Board";
14 compatible = "firefly,firefly-rk3399", "rockchip,rk3399";
17 stdout-path = "serial2:1500000n8";
21 compatible = "pwm-backlight";
22 enable-gpios = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>;
[all …]
/Linux-v5.10/arch/arm64/boot/dts/qcom/
Dsdm845-db845c.dts1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
11 #include <dt-bindings/sound/qcom,q6afe.h>
12 #include <dt-bindings/sound/qcom,q6asm.h>
27 stdout-path = "serial0:115200n8";
30 dc12v: dc12v-regulator {
31 compatible = "regulator-fixed";
[all …]
Dsc7180-trogdor.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
23 /delete-node/ &hyp_mem;
24 /delete-node/ &xbl_mem;
25 /delete-node/ &aop_mem;
26 /delete-node/ &sec_apps_mem;
27 /delete-node/ &tz_mem;
35 reserved-memory {
[all …]
Dsdm845-cheza.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
26 stdout-path = "serial0:115200n8";
30 compatible = "pwm-backlight";
32 enable-gpios = <&tlmm 37 GPIO_ACTIVE_HIGH>;
33 power-supply = <&ppvar_sys>;
34 pinctrl-names = "default";
35 pinctrl-0 = <&ap_edp_bklten>;
[all …]
/Linux-v5.10/Documentation/admin-guide/media/
Dimx7.rst1 .. SPDX-License-Identifier: GPL-2.0
7 ------------
14 - CMOS Sensor Interface (CSI)
15 - Video Multiplexer
16 - MIPI CSI-2 Receiver
18 .. code-block:: none
20 MIPI Camera Input ---> MIPI CSI-2 --- > |\
24 | U | ------> CSI ---> Capture
27 Parallel Camera Input ----------------> | /
34 --------
[all …]
/Linux-v5.10/drivers/gpu/drm/bridge/
Dtc358768.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com
26 /* Global (16-bit addressable) */
43 /* Debug (16-bit addressable) */
49 /* TX PHY (32-bit addressable) */
61 /* TX PPI (32-bit addressable) */
77 /* TX CTRL (32-bit addressable) */
98 /* DSITX CTRL (16-bit addressable) */
149 u32 dsi_lanes; /* number of DSI Lanes */
173 int ret = priv->error; in tc358768_clear_error()
[all …]
/Linux-v5.10/arch/arm/boot/dts/
Dtegra30-cardhu.dtsi1 // SPDX-License-Identifier: GPL-2.0
2 #include <dt-bindings/input/input.h>
13 * use tegra30-cardhu-a02.dts, Cardhu fab version A04 and later, use
14 * tegra30-cardhu-a04.dts.
17 * The sticker will have number like 600-81291-1000-002 C.3. In this 4th
19 * The (downstream internal) U-Boot of Cardhu display the board-id as
40 stdout-path = "serial0:115200n8";
51 avdd-pexb-supply = <&ldo1_reg>;
52 vdd-pexb-supply = <&ldo1_reg>;
53 avdd-pex-pll-supply = <&ldo1_reg>;
[all …]
Dqcom-apq8064-asus-nexus7-flo.dts1 // SPDX-License-Identifier: GPL-2.0
2 #include "qcom-apq8064-v2.0.dtsi"
3 #include <dt-bindings/gpio/gpio.h>
4 #include <dt-bindings/input/input.h>
5 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
8 compatible = "asus,nexus7-flo", "qcom,apq8064";
16 stdout-path = "serial0:115200n8";
19 reserved-memory {
20 #address-cells = <1>;
21 #size-cells = <1>;
[all …]
Dtegra124-jetson-tk1.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
4 #include <dt-bindings/input/input.h>
7 #include "tegra124-jetson-tk1-emc.dtsi"
11 compatible = "nvidia,jetson-tk1", "nvidia,tegra124";
17 /* This order keeps the mapping DB9 connector <-> ttyS0 */
24 stdout-path = "serial0:115200n8";
34 avddio-pex-supply = <&vdd_1v05_run>;
35 dvddio-pex-supply = <&vdd_1v05_run>;
36 avdd-pex-pll-supply = <&vdd_1v05_run>;
[all …]
Dtegra30-beaver.dts1 // SPDX-License-Identifier: GPL-2.0
2 /dts-v1/;
5 #include "tegra30-cpu-opp.dtsi"
6 #include "tegra30-cpu-opp-microvolt.dtsi"
19 stdout-path = "serial0:115200n8";
29 avdd-pexa-supply = <&ldo1_reg>;
30 vdd-pexa-supply = <&ldo1_reg>;
31 avdd-pexb-supply = <&ldo1_reg>;
32 vdd-pexb-supply = <&ldo1_reg>;
33 avdd-pex-pll-supply = <&ldo1_reg>;
[all …]
/Linux-v5.10/drivers/media/platform/xilinx/
Dxilinx-csi2rxss.c1 // SPDX-License-Identifier: GPL-2.0
3 * Driver for Xilinx MIPI CSI-2 Rx Subsystem
5 * Copyright (C) 2016 - 2020 Xilinx, Inc.
19 #include <linux/v4l2-subdev.h>
20 #include <media/media-entity.h>
21 #include <media/v4l2-common.h>
22 #include <media/v4l2-ctrls.h>
23 #include <media/v4l2-fwnode.h>
24 #include <media/v4l2-subdev.h>
25 #include "xilinx-vip.h"
[all …]
/Linux-v5.10/drivers/gpu/drm/panel/
Dpanel-jdi-lt070me05000.c1 // SPDX-License-Identifier: GPL-2.0-only
11 * http://panelone.net/en/7-0-inch/JDI_LT070ME05000_7.0_inch-datasheet
57 struct mipi_dsi_device *dsi = jdi->dsi; in jdi_panel_init()
58 struct device *dev = &jdi->dsi->dev; in jdi_panel_init()
61 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in jdi_panel_init()
75 ret = mipi_dsi_dcs_set_column_address(dsi, 0, jdi->mode->hdisplay - 1); in jdi_panel_init()
81 ret = mipi_dsi_dcs_set_page_address(dsi, 0, jdi->mode->vdisplay - 1); in jdi_panel_init()
89 * are active in jdi_panel_init()
147 struct mipi_dsi_device *dsi = jdi->dsi; in jdi_panel_on()
148 struct device *dev = &jdi->dsi->dev; in jdi_panel_on()
[all …]
/Linux-v5.10/drivers/gpu/drm/gma500/
Dtc35876x-dsi-lvds.c35 #include "tc35876x-dsi-lvds.h"
45 #define FLD_MASK(start, end) (((1 << ((start) - (end) + 1)) - 1) << (end))
48 /* DSI D-PHY Layer Registers */
222 * tc35876x_regw - Write DSI-LVDS bridge register using I2C
233 /* NOTE: Register address big-endian, data little-endian. */ in tc35876x_regw()
243 .addr = client->addr, in tc35876x_regw()
250 r = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs)); in tc35876x_regw()
252 dev_err(&client->dev, "%s: reg 0x%04x val 0x%08x error %d\n", in tc35876x_regw()
258 dev_err(&client->dev, "%s: reg 0x%04x val 0x%08x msgs %d\n", in tc35876x_regw()
260 return -EAGAIN; in tc35876x_regw()
[all …]
/Linux-v5.10/arch/arm64/boot/dts/hisilicon/
Dhi3660-hikey960.dts1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
12 #include "hikey960-pinctrl.dtsi"
13 #include <dt-bindings/gpio/gpio.h>
14 #include <dt-bindings/input/input.h>
15 #include <dt-bindings/interrupt-controller/irq.h>
16 #include <dt-bindings/usb/pd.h>
20 compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660";
35 stdout-path = "serial6:115200n8";
44 reserved-memory {
[all …]
/Linux-v5.10/drivers/gpu/drm/i915/display/
Dintel_display_debugfs.c1 // SPDX-License-Identifier: MIT
24 return to_i915(node->minor->dev); in node_to_i915()
29 struct drm_i915_private *dev_priv = node_to_i915(m->private); in i915_frontbuffer_tracking()
32 dev_priv->fb_tracking.busy_bits); in i915_frontbuffer_tracking()
35 dev_priv->fb_tracking.flip_bits); in i915_frontbuffer_tracking()
42 struct drm_i915_private *dev_priv = node_to_i915(m->private); in i915_fbc_status()
43 struct intel_fbc *fbc = &dev_priv->fbc; in i915_fbc_status()
47 return -ENODEV; in i915_fbc_status()
49 wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm); in i915_fbc_status()
50 mutex_lock(&fbc->lock); in i915_fbc_status()
[all …]
Dintel_display_power.c1 /* SPDX-License-Identifier: MIT */
165 drm_dbg_kms(&dev_priv->drm, "enabling %s\n", power_well->desc->name); in intel_power_well_enable()
166 power_well->desc->ops->enable(dev_priv, power_well); in intel_power_well_enable()
167 power_well->hw_enabled = true; in intel_power_well_enable()
173 drm_dbg_kms(&dev_priv->drm, "disabling %s\n", power_well->desc->name); in intel_power_well_disable()
174 power_well->hw_enabled = false; in intel_power_well_disable()
175 power_well->desc->ops->disable(dev_priv, power_well); in intel_power_well_disable()
181 if (!power_well->count++) in intel_power_well_get()
188 drm_WARN(&dev_priv->drm, !power_well->count, in intel_power_well_put()
190 power_well->desc->name); in intel_power_well_put()
[all …]
/Linux-v5.10/drivers/infiniband/hw/hfi1/
Dchip.c2 * Copyright(c) 2015 - 2020 Intel Corporation.
24 * - Redistributions of source code must retain the above copyright
26 * - Redistributions in binary form must reproduce the above copyright
30 * - Neither the name of Intel Corporation nor the names of its
73 MODULE_PARM_DESC(num_vls, "Set number of Virtual Lanes to use (1-8)");
119 #define SEC_SC_HALTED 0x4 /* per-context only */
120 #define SEC_SPC_FREEZE 0x8 /* per-HFI only */
128 * 0 - User Fecn Handling
129 * 1 - Vnic
130 * 2 - AIP
[all …]
/Linux-v5.10/drivers/net/ethernet/broadcom/bnx2x/
Dbnx2x_link.c1 /* Copyright 2008-2013 Broadcom Corporation
8 * at http://www.gnu.org/licenses/gpl-2.0.html (the "GPL").
43 #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1)
205 (_phy)->def_md_devad, \
211 (_phy)->def_md_devad, \
239 * bnx2x_check_lfa - This function checks if link reinitialization is required,
251 struct bnx2x *bp = params->bp; in bnx2x_check_lfa()
254 REG_RD(bp, params->lfa_base + in bnx2x_check_lfa()
257 /* NOTE: must be first condition checked - in bnx2x_check_lfa()
262 REG_WR(bp, params->lfa_base + in bnx2x_check_lfa()
[all …]

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