| /Linux-v6.1/Documentation/devicetree/bindings/display/ |
| D | truly,nt35597.txt | 1 Truly model NT35597 DSI display driver
7 - compatible: should be "truly,nt35597-2K-display"
8 - vdda-supply: phandle of the regulator that provides the supply voltage
10 - vdispp-supply: phandle of the regulator that provides the supply voltage
12 - vdispn-supply: phandle of the regulator that provides the supply voltage
14 - reset-gpios: phandle of gpio for reset line
15 This should be 8mA, gpio can be configured using mux, pinctrl, pinctrl-names
17 - mode-gpios: phandle of the gpio for choosing the mode of the display
18 for single DSI or Dual DSI
19 This should be low for dual DSI and high for single DSI mode
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| /Linux-v6.1/drivers/gpu/drm/bridge/ |
| D | ti-sn65dsi83.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * - SN65DSI83
7 * = 1x Single-link DSI ~ 1x Single-link LVDS
8 * - Supported
9 * - Single-link LVDS mode tested
10 * - SN65DSI84
11 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS
12 * - Supported
13 * - Dual-link LVDS mode tested
14 * - 2x Single-link LVDS mode unsupported
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| D | tc358775.c | 1 // SPDX-License-Identifier: GPL-2.0
3 * TC358775 DSI to LVDS bridge driver
16 #include <linux/media-bus-format.h>
36 /* DSI D-PHY Layer Registers */
49 #define DFTMODE_CNTRL 0x0054 /* DFT Mode Control */
51 /* DSI PPI Layer Registers */
52 #define PPI_STARTPPI 0x0104 /* START control bit of PPI-TX function. */
59 #define PPI_TX_RX_TA 0x013C /* DSI Bus Turn Around timing parameters */
90 #define PPI_CLRSIPO 0x01E4 /* Clear SIPO values, Slave mode use only. */
93 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX function */
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| D | tc358762.c | 1 // SPDX-License-Identifier: GPL-2.0
38 /* DSI layer registers */
39 #define DSI_STARTDSI 0x0204 /* START control bit of DSI-TX */
56 /* Lane enable PPI and DSI register bits */
72 int ret = ctx->error; in tc358762_clear_error()
74 ctx->error = 0; in tc358762_clear_error()
80 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in tc358762_write() local
84 if (ctx->error) in tc358762_write()
94 ret = mipi_dsi_generic_write(dsi, data, sizeof(data)); in tc358762_write()
96 ctx->error = ret; in tc358762_write()
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| D | lontium-lt9211.c | 1 // SPDX-License-Identifier: GPL-2.0
6 * 2xDSI/2xLVDS/1xDPI -> 2xDSI/2xLVDS/1xDPI
8 * 1xDSI -> 1xLVDS
17 #include <linux/media-bus-format.h>
41 /* DSI lane count - 0 means 4 lanes ; 1, 2, 3 means 1, 2, 3 lanes. */
48 struct mipi_dsi_device *dsi; member
107 return drm_bridge_attach(bridge->encoder, ctx->panel_bridge, in lt9211_attach()
108 &ctx->bridge, flags); in lt9211_attach()
117 ret = regmap_bulk_read(ctx->regmap, REG_CHIPID0, chipid, 3); in lt9211_read_chipid()
119 dev_err(ctx->dev, "Failed to read Chip ID: %d\n", ret); in lt9211_read_chipid()
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| /Linux-v6.1/Documentation/devicetree/bindings/display/panel/ |
| D | sharp,lq101r1sx01.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <treding@nvidia.com>
13 This panel requires a dual-channel DSI host to operate. It supports two modes:
14 - left-right: each channel drives the left or right half of the screen
15 - even-odd: each channel drives the even or odd lines of the screen
17 Each of the DSI channels controls a separate DSI peripheral. The peripheral
18 driven by the first link (DSI-LINK1), left or even, is considered the primary
20 to the peripheral driven by the second link (DSI-LINK2, right or odd).
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| D | novatek,nt35950.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Novatek NT35950-based display panels
10 - AngeloGioacchino Del Regno <angelogioacchino.delregno@somainline.org>
13 The nt35950 IC from Novatek is a Driver IC used to drive MIPI-DSI panels,
14 with Static RAM for content retention in command mode and also supports
15 video mode with VESA Frame Buffer Compression or Display Stream Compression
16 on single, or dual dsi port(s).
22 - $ref: panel-common.yaml#
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| /Linux-v6.1/drivers/gpu/drm/msm/dsi/ |
| D | dsi_manager.c | 1 // SPDX-License-Identifier: GPL-2.0-only
9 #include "dsi.h"
24 struct msm_dsi *dsi[DSI_MAX]; member
53 return !(next_bridge && next_bridge->of_node && in dsi_mgr_power_on_early()
54 of_device_is_compatible(next_bridge->of_node, "parade,ps8640")); in dsi_mgr_power_on_early()
65 return msm_dsim_glb.dsi[id]; in dsi_mgr_get_dsi()
70 return msm_dsim_glb.dsi[(id + 1) % DSI_MAX]; in dsi_mgr_get_other_dsi()
77 /* We assume 2 dsi nodes have the same information of bonded dsi and in dsi_mgr_parse_of()
78 * sync-mode, and only one node specifies master in case of bonded mode. in dsi_mgr_parse_of()
80 if (!msm_dsim->is_bonded_dsi) in dsi_mgr_parse_of()
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| /Linux-v6.1/drivers/gpu/drm/panel/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
17 Y030XX067A 320x480 3.0" panel as found in the YLM RG-280M, RG-300
18 and RG-99 handheld gaming consoles.
37 NT35596 1080x1920 video mode panel as found in some Asus
41 tristate "Boe BF060Y8M-AJ0 panel"
46 Say Y here if you want to enable support for Boe BF060Y8M-AJ0
48 uses 24 bit RGB per pixel. It provides a MIPI DSI interface to
49 the host and backlight is controlled through DSI commands.
58 TFT-LCD modules. The panel has a 1200x1920 resolution and uses
59 24 bit RGB per pixel. It provides a MIPI DSI interface to
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| D | panel-truly-nt35597.c | 1 // SPDX-License-Identifier: GPL-2.0
64 struct mipi_dsi_device *dsi[2]; member
219 /* CMD mode(10) VDO mode(03) */
230 for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { in truly_dcs_write()
231 ret = mipi_dsi_dcs_write(ctx->dsi[i], command, NULL, 0); in truly_dcs_write()
233 dev_err(ctx->dev, "cmd 0x%x failed for dsi = %d\n", command, i); in truly_dcs_write()
247 for (i = 0; i < ARRAY_SIZE(ctx->dsi); i++) { in truly_dcs_write_buf()
248 ret = mipi_dsi_dcs_write_buffer(ctx->dsi[i], buf, size); in truly_dcs_write_buf()
250 dev_err(ctx->dev, "failed to tx cmd [%d], err: %d\n", i, ret); in truly_dcs_write_buf()
262 for (i = 0; i < ARRAY_SIZE(ctx->supplies); i++) { in truly_35597_power_on()
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| /Linux-v6.1/drivers/gpu/drm/i915/display/ |
| D | intel_dsi_vbt.c | 116 /* ICL DSI Display GPIO Pins */
132 * If single link DSI is being used on any port, the VBT sequence block in intel_dsi_seq_port_to_port()
136 if (hweight8(intel_dsi->ports) == 1) in intel_dsi_seq_port_to_port()
137 return ffs(intel_dsi->ports) - 1; in intel_dsi_seq_port_to_port()
140 if (intel_dsi->ports & PORT_B) in intel_dsi_seq_port_to_port()
142 else if (intel_dsi->ports & PORT_C) in intel_dsi_seq_port_to_port()
152 struct drm_i915_private *dev_priv = to_i915(intel_dsi->base.base.dev); in mipi_exec_send_packet()
158 drm_dbg_kms(&dev_priv->drm, "\n"); in mipi_exec_send_packet()
170 if (drm_WARN_ON(&dev_priv->drm, !intel_dsi->dsi_hosts[port])) in mipi_exec_send_packet()
173 dsi_device = intel_dsi->dsi_hosts[port]->device; in mipi_exec_send_packet()
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| D | intel_dsi.h | 35 /* Dual Link support */
54 /* bit mask of ports (vlv dsi) or phys (icl dsi) being driven */
56 u16 ports; /* VLV DSI */
57 u16 phys; /* ICL DSI */
60 /* if true, use HS mode, otherwise LP */
66 /* Video mode or command mode */
69 /* number of DSI lanes */
76 * video mode pixel format
148 return container_of(&encoder->base, struct intel_dsi, base.base); in enc_to_intel_dsi()
153 return intel_dsi->operation_mode == INTEL_DSI_VIDEO_MODE; in is_vid_mode()
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| D | icl_dsi.c | 69 drm_err(&dev_priv->drm, "DSI header credits not released\n"); in wait_for_header_credits()
81 drm_err(&dev_priv->drm, "DSI payload credits not released\n"); in wait_for_payload_credits()
98 struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); in wait_for_cmds_dispatched_to_panel()
100 struct mipi_dsi_device *dsi; in wait_for_cmds_dispatched_to_panel() local
106 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
113 for_each_dsi_port(port, intel_dsi->ports) { in wait_for_cmds_dispatched_to_panel()
114 dsi = intel_dsi->dsi_hosts[port]->device; in wait_for_cmds_dispatched_to_panel()
115 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in wait_for_cmds_dispatched_to_panel()
116 dsi->channel = 0; in wait_for_cmds_dispatched_to_panel()
117 ret = mipi_dsi_dcs_nop(dsi); in wait_for_cmds_dispatched_to_panel()
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| D | vlv_dsi.c | 86 struct drm_encoder *encoder = &intel_dsi->base.base; in vlv_dsi_wait_for_fifo_empty()
87 struct drm_device *dev = encoder->dev; in vlv_dsi_wait_for_fifo_empty()
96 drm_err(&dev_priv->drm, "DPI FIFOs are not empty\n"); in vlv_dsi_wait_for_fifo_empty()
108 for (j = 0; j < min_t(u32, len - i, 4); j++) in write_data()
124 for (j = 0; j < min_t(u32, len - i, 4); j++) in read_data()
133 struct drm_device *dev = intel_dsi_host->intel_dsi->base.base.dev; in intel_dsi_host_transfer()
135 enum port port = intel_dsi_host->port; in intel_dsi_host_transfer()
149 if (msg->flags & MIPI_DSI_MSG_USE_LPM) { in intel_dsi_host_transfer()
165 drm_err(&dev_priv->drm, in intel_dsi_host_transfer()
172 if (msg->rx_len) { in intel_dsi_host_transfer()
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| /Linux-v6.1/Documentation/devicetree/bindings/display/msm/ |
| D | dsi-controller-main.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
3 ---
4 $id: http://devicetree.org/schemas/display/msm/dsi-controller-main.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Display DSI controller
10 - Krishna Manikandan <quic_mkrishn@quicinc.com>
13 - $ref: "../dsi-controller.yaml#"
18 - qcom,mdss-dsi-ctrl
19 - qcom,dsi-ctrl-6g-qcm2290
24 reg-names:
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| /Linux-v6.1/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-mipi-dsi.c | 1 // SPDX-License-Identifier: GPL-2.0+
7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
193 #define N_LANES(n) (((n) - 1) & 0x3)
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
265 struct dw_mipi_dsi *master; /* dual-dsi master ptr */
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| /Linux-v6.1/drivers/gpu/drm/rockchip/ |
| D | Kconfig | 1 # SPDX-License-Identifier: GPL-2.0-only
17 This driver provides kernel mode setting and buffer
67 bool "Rockchip specific extensions for Synopsys DW MIPI DSI"
71 for the Synopsys DesignWare dsi driver. If you want to
72 enable MIPI DSI on RK3288 or RK3399 based SoC, you should
89 support LVDS, rgb, dual LVDS output mode. say Y to enable its
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| D | dw-mipi-dsi-rockchip.c | 1 // SPDX-License-Identifier: GPL-2.0+
5 * Chris Zhong <zyw@rock-chips.com>
6 * Nickey Yang <nickey.yang@rock-chips.com>
40 #define N_LANES(n) ((((n) - 1) & 0x3) << 0)
92 #define INPUT_DIVIDER(val) (((val) - 1) & 0x7f)
95 #define LOOP_DIV_LOW_SEL(val) (((val) - 1) & 0x1f)
96 #define LOOP_DIV_HIGH_SEL(val) ((((val) - 1) >> 5) & 0xf)
263 /* dual-channel */
354 return -EINVAL; in max_mbps_to_parameter()
357 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
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| /Linux-v6.1/arch/arm/boot/dts/ |
| D | stm32f469-disco.dts | 2 * Copyright 2016 - Lee Jones <lee.jones@linaro.org>
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPL or the X11 license, at your option. Note that this dual
22 * MA 02110-1301 USA
48 /dts-v1/;
50 #include "stm32f469-pinctrl.dtsi"
51 #include <dt-bindings/gpio/gpio.h>
52 #include <dt-bindings/input/input.h>
55 model = "STMicroelectronics STM32F469i-DISCO board";
56 compatible = "st,stm32f469i-disco", "st,stm32f469";
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| /Linux-v6.1/Documentation/arm/stm32/ |
| D | stm32f769-overview.rst | 6 ------------
8 The STM32F769 is a Cortex-M7 MCU aimed at various applications.
11 - Cortex-M7 core running up to @216MHz
12 - 2MB internal flash, 512KBytes internal RAM (+4KB of backup SRAM)
13 - FMC controller to connect SDRAM, NOR and NAND memories
14 - Dual mode QSPI
15 - SD/MMC/SDIO support*2
16 - Ethernet controller
17 - USB OTFG FS & HS controllers
18 - I2C*4, SPI*6, CAN*3 busses support
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| /Linux-v6.1/drivers/gpu/drm/tegra/ |
| D | dsi.c | 1 // SPDX-License-Identifier: GPL-2.0-only
29 #include "dsi.h"
30 #include "mipi-phy.h"
81 /* for ganged-mode support */
102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
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| /Linux-v6.1/Documentation/gpu/ |
| D | drm-kms-helpers.rst | 2 Mode Setting Helper Functions
27 for handling panel-related information and logic. Plus then a big set of
28 helpers for the various sink standards (DisplayPort, HDMI, MIPI DSI). Finally
39 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
42 .. kernel-doc:: include/drm/drm_modeset_helper_vtables.h
51 --------
53 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
57 ---------------------------------------
59 .. kernel-doc:: drivers/gpu/drm/drm_atomic_helper.c
63 --------------------------
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| /Linux-v6.1/arch/arm64/boot/dts/qcom/ |
| D | sdm845-mtp.dts | 1 // SPDX-License-Identifier: GPL-2.0
8 /dts-v1/;
10 #include <dt-bindings/regulator/qcom,rpmh-regulator.h>
17 compatible = "qcom,sdm845-mtp", "qcom,sdm845";
24 stdout-path = "serial0:115200n8";
27 vph_pwr: vph-pwr-regulator {
28 compatible = "regulator-fixed";
29 regulator-name = "vph_pwr";
30 regulator-min-microvolt = <3700000>;
31 regulator-max-microvolt = <3700000>;
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| /Linux-v6.1/drivers/gpu/drm/rcar-du/ |
| D | rcar_du_encoder.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * R-Car Display Unit Encoder
5 * Copyright (C) 2013-2014 Renesas Electronics Corporation
21 /* -----------------------------------------------------------------------------
70 bridge = devm_drm_panel_bridge_add_typed(rcdu->dev, panel, in rcar_du_encoder_init()
77 return -EPROBE_DEFER; in rcar_du_encoder_init()
81 rcdu->lvds[output - RCAR_DU_OUTPUT_LVDS0] = bridge; in rcar_du_encoder_init()
85 rcdu->dsi[output - RCAR_DU_OUTPUT_DSI0] = bridge; in rcar_du_encoder_init()
90 * the LVDS1 encoder is used as a companion for LVDS0 in dual-link in rcar_du_encoder_init()
91 * mode, or any LVDS output if it isn't connected. The latter may happen in rcar_du_encoder_init()
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| /Linux-v6.1/drivers/gpu/drm/msm/disp/mdp5/ |
| D | mdp5_ctl.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015 The Linux Foundation. All rights reserved.
10 * CTL - MDP Control Pool Manager
16 * a specific data path ID - REG_MDP5_CTL_*(<id>, ...)
20 * In certain use cases (high-resolution dual pipe), one single CTL can be
62 /* to filter out non-present bits in the current hardware config */
77 struct msm_drm_private *priv = ctl_mgr->dev->dev_private; in get_kms()
79 return to_mdp5_kms(to_mdp_kms(priv->kms)); in get_kms()
85 struct mdp5_kms *mdp5_kms = get_kms(ctl->ctlm); in ctl_write()
87 (void)ctl->reg_offset; /* TODO use this instead of mdp5_write */ in ctl_write()
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