Lines Matching +full:dual +full:- +full:dsi +full:- +full:mode
1 // SPDX-License-Identifier: GPL-2.0+
7 * This generic Synopsys DesignWare MIPI DSI host driver is based on the
8 * Rockchip version from rockchip/dw-mipi-dsi.c with phy & bridge APIs.
193 #define N_LANES(n) (((n) - 1) & 0x3)
226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
265 struct dw_mipi_dsi *master; /* dual-dsi master ptr */
266 struct dw_mipi_dsi *slave; /* dual-dsi slave ptr */
274 static inline bool dw_mipi_is_dual_mode(struct dw_mipi_dsi *dsi) in dw_mipi_is_dual_mode() argument
276 return dsi->slave || dsi->master; in dw_mipi_is_dual_mode()
283 static void dw_mipi_dsi_wait_for_two_frames(const struct drm_display_mode *mode) in dw_mipi_dsi_wait_for_two_frames() argument
287 refresh = drm_mode_vrefresh(mode); in dw_mipi_dsi_wait_for_two_frames()
302 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val) in dsi_write() argument
304 writel(val, dsi->base + reg); in dsi_write()
307 static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg) in dsi_read() argument
309 return readl(dsi->base + reg); in dsi_read()
315 struct dw_mipi_dsi *dsi = host_to_dsi(host); in dw_mipi_dsi_host_attach() local
316 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; in dw_mipi_dsi_host_attach()
320 if (device->lanes > dsi->plat_data->max_data_lanes) { in dw_mipi_dsi_host_attach()
321 dev_err(dsi->dev, "the number of data lanes(%u) is too many\n", in dw_mipi_dsi_host_attach()
322 device->lanes); in dw_mipi_dsi_host_attach()
323 return -EINVAL; in dw_mipi_dsi_host_attach()
326 dsi->lanes = device->lanes; in dw_mipi_dsi_host_attach()
327 dsi->channel = device->channel; in dw_mipi_dsi_host_attach()
328 dsi->format = device->format; in dw_mipi_dsi_host_attach()
329 dsi->mode_flags = device->mode_flags; in dw_mipi_dsi_host_attach()
331 bridge = devm_drm_of_get_bridge(dsi->dev, dsi->dev->of_node, 1, 0); in dw_mipi_dsi_host_attach()
335 dsi->panel_bridge = bridge; in dw_mipi_dsi_host_attach()
337 drm_bridge_add(&dsi->bridge); in dw_mipi_dsi_host_attach()
339 if (pdata->host_ops && pdata->host_ops->attach) { in dw_mipi_dsi_host_attach()
340 ret = pdata->host_ops->attach(pdata->priv_data, device); in dw_mipi_dsi_host_attach()
351 struct dw_mipi_dsi *dsi = host_to_dsi(host); in dw_mipi_dsi_host_detach() local
352 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; in dw_mipi_dsi_host_detach()
355 if (pdata->host_ops && pdata->host_ops->detach) { in dw_mipi_dsi_host_detach()
356 ret = pdata->host_ops->detach(pdata->priv_data, device); in dw_mipi_dsi_host_detach()
361 drm_of_panel_bridge_remove(host->dev->of_node, 1, 0); in dw_mipi_dsi_host_detach()
363 drm_bridge_remove(&dsi->bridge); in dw_mipi_dsi_host_detach()
368 static void dw_mipi_message_config(struct dw_mipi_dsi *dsi, in dw_mipi_message_config() argument
371 bool lpm = msg->flags & MIPI_DSI_MSG_USE_LPM; in dw_mipi_message_config()
380 dsi_write(dsi, DSI_DPI_LP_CMD_TIM, OUTVACT_LPCMD_TIME(16) in dw_mipi_message_config()
383 if (msg->flags & MIPI_DSI_MSG_REQ_ACK) in dw_mipi_message_config()
388 dsi_write(dsi, DSI_CMD_MODE_CFG, val); in dw_mipi_message_config()
390 val = dsi_read(dsi, DSI_VID_MODE_CFG); in dw_mipi_message_config()
395 dsi_write(dsi, DSI_VID_MODE_CFG, val); in dw_mipi_message_config()
398 static int dw_mipi_dsi_gen_pkt_hdr_write(struct dw_mipi_dsi *dsi, u32 hdr_val) in dw_mipi_dsi_gen_pkt_hdr_write() argument
403 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_gen_pkt_hdr_write()
407 dev_err(dsi->dev, "failed to get available command FIFO\n"); in dw_mipi_dsi_gen_pkt_hdr_write()
411 dsi_write(dsi, DSI_GEN_HDR, hdr_val); in dw_mipi_dsi_gen_pkt_hdr_write()
414 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_gen_pkt_hdr_write()
418 dev_err(dsi->dev, "failed to write command FIFO\n"); in dw_mipi_dsi_gen_pkt_hdr_write()
425 static int dw_mipi_dsi_write(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_write() argument
428 const u8 *tx_buf = packet->payload; in dw_mipi_dsi_write()
429 int len = packet->payload_length, pld_data_bytes = sizeof(u32), ret; in dw_mipi_dsi_write()
437 dsi_write(dsi, DSI_GEN_PLD_DATA, le32_to_cpu(word)); in dw_mipi_dsi_write()
441 dsi_write(dsi, DSI_GEN_PLD_DATA, le32_to_cpu(word)); in dw_mipi_dsi_write()
443 len -= pld_data_bytes; in dw_mipi_dsi_write()
446 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_write()
450 dev_err(dsi->dev, in dw_mipi_dsi_write()
457 memcpy(&word, packet->header, sizeof(packet->header)); in dw_mipi_dsi_write()
458 return dw_mipi_dsi_gen_pkt_hdr_write(dsi, le32_to_cpu(word)); in dw_mipi_dsi_write()
461 static int dw_mipi_dsi_read(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_read() argument
464 int i, j, ret, len = msg->rx_len; in dw_mipi_dsi_read()
465 u8 *buf = msg->rx_buf; in dw_mipi_dsi_read()
469 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_read()
473 dev_err(dsi->dev, "Timeout during read operation\n"); in dw_mipi_dsi_read()
479 ret = readl_poll_timeout(dsi->base + DSI_CMD_PKT_STATUS, in dw_mipi_dsi_read()
483 dev_err(dsi->dev, "Read payload FIFO is empty\n"); in dw_mipi_dsi_read()
487 val = dsi_read(dsi, DSI_GEN_PLD_DATA); in dw_mipi_dsi_read()
498 struct dw_mipi_dsi *dsi = host_to_dsi(host); in dw_mipi_dsi_host_transfer() local
504 dev_err(dsi->dev, "failed to create packet: %d\n", ret); in dw_mipi_dsi_host_transfer()
508 dw_mipi_message_config(dsi, msg); in dw_mipi_dsi_host_transfer()
509 if (dsi->slave) in dw_mipi_dsi_host_transfer()
510 dw_mipi_message_config(dsi->slave, msg); in dw_mipi_dsi_host_transfer()
512 ret = dw_mipi_dsi_write(dsi, &packet); in dw_mipi_dsi_host_transfer()
515 if (dsi->slave) { in dw_mipi_dsi_host_transfer()
516 ret = dw_mipi_dsi_write(dsi->slave, &packet); in dw_mipi_dsi_host_transfer()
521 if (msg->rx_buf && msg->rx_len) { in dw_mipi_dsi_host_transfer()
522 ret = dw_mipi_dsi_read(dsi, msg); in dw_mipi_dsi_host_transfer()
525 nb_bytes = msg->rx_len; in dw_mipi_dsi_host_transfer()
539 static void dw_mipi_dsi_video_mode_config(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_video_mode_config() argument
545 * enabling low power is panel-dependent, we should use the in dw_mipi_dsi_video_mode_config()
550 if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_BURST) in dw_mipi_dsi_video_mode_config()
552 else if (dsi->mode_flags & MIPI_DSI_MODE_VIDEO_SYNC_PULSE) in dw_mipi_dsi_video_mode_config()
558 if (dsi->vpg_defs.vpg) { in dw_mipi_dsi_video_mode_config()
560 val |= dsi->vpg_defs.vpg_horizontal ? in dw_mipi_dsi_video_mode_config()
562 val |= dsi->vpg_defs.vpg_ber_pattern ? VID_MODE_VPG_MODE : 0; in dw_mipi_dsi_video_mode_config()
566 dsi_write(dsi, DSI_VID_MODE_CFG, val); in dw_mipi_dsi_video_mode_config()
569 static void dw_mipi_dsi_set_mode(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_set_mode() argument
574 dsi_write(dsi, DSI_PWR_UP, RESET); in dw_mipi_dsi_set_mode()
577 dsi_write(dsi, DSI_MODE_CFG, ENABLE_VIDEO_MODE); in dw_mipi_dsi_set_mode()
578 dw_mipi_dsi_video_mode_config(dsi); in dw_mipi_dsi_set_mode()
580 dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); in dw_mipi_dsi_set_mode()
584 if (dsi->mode_flags & MIPI_DSI_CLOCK_NON_CONTINUOUS) in dw_mipi_dsi_set_mode()
586 dsi_write(dsi, DSI_LPCLK_CTRL, val); in dw_mipi_dsi_set_mode()
588 dsi_write(dsi, DSI_PWR_UP, POWERUP); in dw_mipi_dsi_set_mode()
591 static void dw_mipi_dsi_disable(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_disable() argument
593 dsi_write(dsi, DSI_PWR_UP, RESET); in dw_mipi_dsi_disable()
594 dsi_write(dsi, DSI_PHY_RSTZ, PHY_RSTZ); in dw_mipi_dsi_disable()
597 static void dw_mipi_dsi_init(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_init() argument
599 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; in dw_mipi_dsi_init()
608 if (phy_ops->get_esc_clk_rate) { in dw_mipi_dsi_init()
609 ret = phy_ops->get_esc_clk_rate(dsi->plat_data->priv_data, in dw_mipi_dsi_init()
622 esc_clk_division = (dsi->lane_mbps >> 3) / esc_rate + 1; in dw_mipi_dsi_init()
624 dsi_write(dsi, DSI_PWR_UP, RESET); in dw_mipi_dsi_init()
631 dsi_write(dsi, DSI_CLKMGR_CFG, TO_CLK_DIVISION(10) | in dw_mipi_dsi_init()
635 static void dw_mipi_dsi_dpi_config(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_dpi_config() argument
636 const struct drm_display_mode *mode) in dw_mipi_dsi_dpi_config() argument
640 switch (dsi->format) { in dw_mipi_dsi_dpi_config()
655 if (mode->flags & DRM_MODE_FLAG_NVSYNC) in dw_mipi_dsi_dpi_config()
657 if (mode->flags & DRM_MODE_FLAG_NHSYNC) in dw_mipi_dsi_dpi_config()
660 dsi_write(dsi, DSI_DPI_VCID, DPI_VCID(dsi->channel)); in dw_mipi_dsi_dpi_config()
661 dsi_write(dsi, DSI_DPI_COLOR_CODING, color); in dw_mipi_dsi_dpi_config()
662 dsi_write(dsi, DSI_DPI_CFG_POL, val); in dw_mipi_dsi_dpi_config()
665 static void dw_mipi_dsi_packet_handler_config(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_packet_handler_config() argument
667 dsi_write(dsi, DSI_PCKHDL_CFG, CRC_RX_EN | ECC_RX_EN | BTA_EN); in dw_mipi_dsi_packet_handler_config()
670 static void dw_mipi_dsi_video_packet_config(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_video_packet_config() argument
671 const struct drm_display_mode *mode) in dw_mipi_dsi_video_packet_config() argument
675 * only burst mode is supported here. For non-burst video modes, in dw_mipi_dsi_video_packet_config()
678 * non-burst video modes, see dw_mipi_dsi_video_mode_config()... in dw_mipi_dsi_video_packet_config()
681 dsi_write(dsi, DSI_VID_PKT_SIZE, in dw_mipi_dsi_video_packet_config()
682 dw_mipi_is_dual_mode(dsi) ? in dw_mipi_dsi_video_packet_config()
683 VID_PKT_SIZE(mode->hdisplay / 2) : in dw_mipi_dsi_video_packet_config()
684 VID_PKT_SIZE(mode->hdisplay)); in dw_mipi_dsi_video_packet_config()
687 static void dw_mipi_dsi_command_mode_config(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_command_mode_config() argument
694 dsi_write(dsi, DSI_TO_CNT_CFG, HSTX_TO_CNT(1000) | LPRX_TO_CNT(1000)); in dw_mipi_dsi_command_mode_config()
697 * the Bus-Turn-Around Timeout Counter should be computed in dw_mipi_dsi_command_mode_config()
700 dsi_write(dsi, DSI_BTA_TO_CNT, 0xd00); in dw_mipi_dsi_command_mode_config()
701 dsi_write(dsi, DSI_MODE_CFG, ENABLE_CMD_MODE); in dw_mipi_dsi_command_mode_config()
705 static u32 dw_mipi_dsi_get_hcomponent_lbcc(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_get_hcomponent_lbcc() argument
706 const struct drm_display_mode *mode, in dw_mipi_dsi_get_hcomponent_lbcc() argument
711 lbcc = hcomponent * dsi->lane_mbps * MSEC_PER_SEC / 8; in dw_mipi_dsi_get_hcomponent_lbcc()
713 frac = lbcc % mode->clock; in dw_mipi_dsi_get_hcomponent_lbcc()
714 lbcc = lbcc / mode->clock; in dw_mipi_dsi_get_hcomponent_lbcc()
721 static void dw_mipi_dsi_line_timer_config(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_line_timer_config() argument
722 const struct drm_display_mode *mode) in dw_mipi_dsi_line_timer_config() argument
726 htotal = mode->htotal; in dw_mipi_dsi_line_timer_config()
727 hsa = mode->hsync_end - mode->hsync_start; in dw_mipi_dsi_line_timer_config()
728 hbp = mode->htotal - mode->hsync_end; in dw_mipi_dsi_line_timer_config()
734 lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, htotal); in dw_mipi_dsi_line_timer_config()
735 dsi_write(dsi, DSI_VID_HLINE_TIME, lbcc); in dw_mipi_dsi_line_timer_config()
737 lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hsa); in dw_mipi_dsi_line_timer_config()
738 dsi_write(dsi, DSI_VID_HSA_TIME, lbcc); in dw_mipi_dsi_line_timer_config()
740 lbcc = dw_mipi_dsi_get_hcomponent_lbcc(dsi, mode, hbp); in dw_mipi_dsi_line_timer_config()
741 dsi_write(dsi, DSI_VID_HBP_TIME, lbcc); in dw_mipi_dsi_line_timer_config()
744 static void dw_mipi_dsi_vertical_timing_config(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_vertical_timing_config() argument
745 const struct drm_display_mode *mode) in dw_mipi_dsi_vertical_timing_config() argument
749 vactive = mode->vdisplay; in dw_mipi_dsi_vertical_timing_config()
750 vsa = mode->vsync_end - mode->vsync_start; in dw_mipi_dsi_vertical_timing_config()
751 vfp = mode->vsync_start - mode->vdisplay; in dw_mipi_dsi_vertical_timing_config()
752 vbp = mode->vtotal - mode->vsync_end; in dw_mipi_dsi_vertical_timing_config()
754 dsi_write(dsi, DSI_VID_VACTIVE_LINES, vactive); in dw_mipi_dsi_vertical_timing_config()
755 dsi_write(dsi, DSI_VID_VSA_LINES, vsa); in dw_mipi_dsi_vertical_timing_config()
756 dsi_write(dsi, DSI_VID_VFP_LINES, vfp); in dw_mipi_dsi_vertical_timing_config()
757 dsi_write(dsi, DSI_VID_VBP_LINES, vbp); in dw_mipi_dsi_vertical_timing_config()
760 static void dw_mipi_dsi_dphy_timing_config(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_dphy_timing_config() argument
762 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; in dw_mipi_dsi_dphy_timing_config()
767 ret = phy_ops->get_timing(dsi->plat_data->priv_data, in dw_mipi_dsi_dphy_timing_config()
768 dsi->lane_mbps, &timing); in dw_mipi_dsi_dphy_timing_config()
770 DRM_DEV_ERROR(dsi->dev, "Retrieving phy timings failed\n"); in dw_mipi_dsi_dphy_timing_config()
775 * blankings and to the automatic clock lane control mode... in dw_mipi_dsi_dphy_timing_config()
780 hw_version = dsi_read(dsi, DSI_VERSION) & VERSION; in dw_mipi_dsi_dphy_timing_config()
783 dsi_write(dsi, DSI_PHY_TMR_CFG, in dw_mipi_dsi_dphy_timing_config()
786 dsi_write(dsi, DSI_PHY_TMR_RD_CFG, MAX_RD_TIME_V131(10000)); in dw_mipi_dsi_dphy_timing_config()
788 dsi_write(dsi, DSI_PHY_TMR_CFG, in dw_mipi_dsi_dphy_timing_config()
794 dsi_write(dsi, DSI_PHY_TMR_LPCLK_CFG, in dw_mipi_dsi_dphy_timing_config()
799 static void dw_mipi_dsi_dphy_interface_config(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_dphy_interface_config() argument
803 * stop wait time should be the maximum between host dsi in dw_mipi_dsi_dphy_interface_config()
806 dsi_write(dsi, DSI_PHY_IF_CFG, PHY_STOP_WAIT_TIME(0x20) | in dw_mipi_dsi_dphy_interface_config()
807 N_LANES(dsi->lanes)); in dw_mipi_dsi_dphy_interface_config()
810 static void dw_mipi_dsi_dphy_init(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_dphy_init() argument
813 dsi_write(dsi, DSI_PHY_RSTZ, PHY_DISFORCEPLL | PHY_DISABLECLK in dw_mipi_dsi_dphy_init()
815 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); in dw_mipi_dsi_dphy_init()
816 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLR); in dw_mipi_dsi_dphy_init()
817 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLR); in dw_mipi_dsi_dphy_init()
820 static void dw_mipi_dsi_dphy_enable(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_dphy_enable() argument
825 dsi_write(dsi, DSI_PHY_RSTZ, PHY_ENFORCEPLL | PHY_ENABLECLK | in dw_mipi_dsi_dphy_enable()
828 ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, val, in dw_mipi_dsi_dphy_enable()
833 ret = readl_poll_timeout(dsi->base + DSI_PHY_STATUS, in dw_mipi_dsi_dphy_enable()
840 static void dw_mipi_dsi_clear_err(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_clear_err() argument
842 dsi_read(dsi, DSI_INT_ST0); in dw_mipi_dsi_clear_err()
843 dsi_read(dsi, DSI_INT_ST1); in dw_mipi_dsi_clear_err()
844 dsi_write(dsi, DSI_INT_MSK0, 0); in dw_mipi_dsi_clear_err()
845 dsi_write(dsi, DSI_INT_MSK1, 0); in dw_mipi_dsi_clear_err()
851 struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); in dw_mipi_dsi_bridge_post_atomic_disable() local
852 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; in dw_mipi_dsi_bridge_post_atomic_disable()
855 * Switch to command mode before panel-bridge post_disable & in dw_mipi_dsi_bridge_post_atomic_disable()
857 * Note: panel-bridge disable & panel disable has been called in dw_mipi_dsi_bridge_post_atomic_disable()
860 dw_mipi_dsi_set_mode(dsi, 0); in dw_mipi_dsi_bridge_post_atomic_disable()
863 * TODO Only way found to call panel-bridge post_disable & in dw_mipi_dsi_bridge_post_atomic_disable()
864 * panel unprepare before the dsi "final" disable... in dw_mipi_dsi_bridge_post_atomic_disable()
868 if (dsi->panel_bridge->funcs->post_disable) in dw_mipi_dsi_bridge_post_atomic_disable()
869 dsi->panel_bridge->funcs->post_disable(dsi->panel_bridge); in dw_mipi_dsi_bridge_post_atomic_disable()
871 if (phy_ops->power_off) in dw_mipi_dsi_bridge_post_atomic_disable()
872 phy_ops->power_off(dsi->plat_data->priv_data); in dw_mipi_dsi_bridge_post_atomic_disable()
874 if (dsi->slave) { in dw_mipi_dsi_bridge_post_atomic_disable()
875 dw_mipi_dsi_disable(dsi->slave); in dw_mipi_dsi_bridge_post_atomic_disable()
876 clk_disable_unprepare(dsi->slave->pclk); in dw_mipi_dsi_bridge_post_atomic_disable()
877 pm_runtime_put(dsi->slave->dev); in dw_mipi_dsi_bridge_post_atomic_disable()
879 dw_mipi_dsi_disable(dsi); in dw_mipi_dsi_bridge_post_atomic_disable()
881 clk_disable_unprepare(dsi->pclk); in dw_mipi_dsi_bridge_post_atomic_disable()
882 pm_runtime_put(dsi->dev); in dw_mipi_dsi_bridge_post_atomic_disable()
885 static unsigned int dw_mipi_dsi_get_lanes(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_get_lanes() argument
888 if (dsi->master) in dw_mipi_dsi_get_lanes()
889 return dsi->master->lanes + dsi->lanes; in dw_mipi_dsi_get_lanes()
892 if (dsi->slave) in dw_mipi_dsi_get_lanes()
893 return dsi->lanes + dsi->slave->lanes; in dw_mipi_dsi_get_lanes()
895 /* single-dsi, so no other instance to consider */ in dw_mipi_dsi_get_lanes()
896 return dsi->lanes; in dw_mipi_dsi_get_lanes()
899 static void dw_mipi_dsi_mode_set(struct dw_mipi_dsi *dsi, in dw_mipi_dsi_mode_set() argument
902 const struct dw_mipi_dsi_phy_ops *phy_ops = dsi->plat_data->phy_ops; in dw_mipi_dsi_mode_set()
903 void *priv_data = dsi->plat_data->priv_data; in dw_mipi_dsi_mode_set()
905 u32 lanes = dw_mipi_dsi_get_lanes(dsi); in dw_mipi_dsi_mode_set()
907 clk_prepare_enable(dsi->pclk); in dw_mipi_dsi_mode_set()
909 ret = phy_ops->get_lane_mbps(priv_data, adjusted_mode, dsi->mode_flags, in dw_mipi_dsi_mode_set()
910 lanes, dsi->format, &dsi->lane_mbps); in dw_mipi_dsi_mode_set()
914 pm_runtime_get_sync(dsi->dev); in dw_mipi_dsi_mode_set()
915 dw_mipi_dsi_init(dsi); in dw_mipi_dsi_mode_set()
916 dw_mipi_dsi_dpi_config(dsi, adjusted_mode); in dw_mipi_dsi_mode_set()
917 dw_mipi_dsi_packet_handler_config(dsi); in dw_mipi_dsi_mode_set()
918 dw_mipi_dsi_video_mode_config(dsi); in dw_mipi_dsi_mode_set()
919 dw_mipi_dsi_video_packet_config(dsi, adjusted_mode); in dw_mipi_dsi_mode_set()
920 dw_mipi_dsi_command_mode_config(dsi); in dw_mipi_dsi_mode_set()
921 dw_mipi_dsi_line_timer_config(dsi, adjusted_mode); in dw_mipi_dsi_mode_set()
922 dw_mipi_dsi_vertical_timing_config(dsi, adjusted_mode); in dw_mipi_dsi_mode_set()
924 dw_mipi_dsi_dphy_init(dsi); in dw_mipi_dsi_mode_set()
925 dw_mipi_dsi_dphy_timing_config(dsi); in dw_mipi_dsi_mode_set()
926 dw_mipi_dsi_dphy_interface_config(dsi); in dw_mipi_dsi_mode_set()
928 dw_mipi_dsi_clear_err(dsi); in dw_mipi_dsi_mode_set()
930 ret = phy_ops->init(priv_data); in dw_mipi_dsi_mode_set()
934 dw_mipi_dsi_dphy_enable(dsi); in dw_mipi_dsi_mode_set()
938 /* Switch to cmd mode for panel-bridge pre_enable & panel prepare */ in dw_mipi_dsi_mode_set()
939 dw_mipi_dsi_set_mode(dsi, 0); in dw_mipi_dsi_mode_set()
941 if (phy_ops->power_on) in dw_mipi_dsi_mode_set()
942 phy_ops->power_on(dsi->plat_data->priv_data); in dw_mipi_dsi_mode_set()
946 const struct drm_display_mode *mode, in dw_mipi_dsi_bridge_mode_set() argument
949 struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); in dw_mipi_dsi_bridge_mode_set() local
951 dw_mipi_dsi_mode_set(dsi, adjusted_mode); in dw_mipi_dsi_bridge_mode_set()
952 if (dsi->slave) in dw_mipi_dsi_bridge_mode_set()
953 dw_mipi_dsi_mode_set(dsi->slave, adjusted_mode); in dw_mipi_dsi_bridge_mode_set()
959 struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); in dw_mipi_dsi_bridge_atomic_enable() local
961 /* Switch to video mode for panel-bridge enable & panel enable */ in dw_mipi_dsi_bridge_atomic_enable()
962 dw_mipi_dsi_set_mode(dsi, MIPI_DSI_MODE_VIDEO); in dw_mipi_dsi_bridge_atomic_enable()
963 if (dsi->slave) in dw_mipi_dsi_bridge_atomic_enable()
964 dw_mipi_dsi_set_mode(dsi->slave, MIPI_DSI_MODE_VIDEO); in dw_mipi_dsi_bridge_atomic_enable()
970 const struct drm_display_mode *mode) in dw_mipi_dsi_bridge_mode_valid() argument
972 struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); in dw_mipi_dsi_bridge_mode_valid() local
973 const struct dw_mipi_dsi_plat_data *pdata = dsi->plat_data; in dw_mipi_dsi_bridge_mode_valid()
976 if (pdata->mode_valid) in dw_mipi_dsi_bridge_mode_valid()
977 mode_status = pdata->mode_valid(pdata->priv_data, mode, in dw_mipi_dsi_bridge_mode_valid()
978 dsi->mode_flags, in dw_mipi_dsi_bridge_mode_valid()
979 dw_mipi_dsi_get_lanes(dsi), in dw_mipi_dsi_bridge_mode_valid()
980 dsi->format); in dw_mipi_dsi_bridge_mode_valid()
988 struct dw_mipi_dsi *dsi = bridge_to_dsi(bridge); in dw_mipi_dsi_bridge_attach() local
990 if (!bridge->encoder) { in dw_mipi_dsi_bridge_attach()
992 return -ENODEV; in dw_mipi_dsi_bridge_attach()
996 bridge->encoder->encoder_type = DRM_MODE_ENCODER_DSI; in dw_mipi_dsi_bridge_attach()
998 /* Attach the panel-bridge to the dsi bridge */ in dw_mipi_dsi_bridge_attach()
999 return drm_bridge_attach(bridge->encoder, dsi->panel_bridge, bridge, in dw_mipi_dsi_bridge_attach()
1019 struct dw_mipi_dsi *dsi; in dw_mipi_dsi_debugfs_write() local
1023 return -ENODEV; in dw_mipi_dsi_debugfs_write()
1025 dsi = vpg->dsi; in dw_mipi_dsi_debugfs_write()
1027 *vpg->reg = (bool)val; in dw_mipi_dsi_debugfs_write()
1029 mode_cfg = dsi_read(dsi, DSI_VID_MODE_CFG); in dw_mipi_dsi_debugfs_write()
1031 if (*vpg->reg) in dw_mipi_dsi_debugfs_write()
1032 mode_cfg |= vpg->mask; in dw_mipi_dsi_debugfs_write()
1034 mode_cfg &= ~vpg->mask; in dw_mipi_dsi_debugfs_write()
1036 dsi_write(dsi, DSI_VID_MODE_CFG, mode_cfg); in dw_mipi_dsi_debugfs_write()
1046 return -ENODEV; in dw_mipi_dsi_debugfs_show()
1048 *val = *vpg->reg; in dw_mipi_dsi_debugfs_show()
1058 struct dw_mipi_dsi *dsi = data; in debugfs_create_files() local
1060 REGISTER(vpg, VID_MODE_VPG_ENABLE, dsi), in debugfs_create_files()
1061 REGISTER(vpg_horizontal, VID_MODE_VPG_HORIZONTAL, dsi), in debugfs_create_files()
1062 REGISTER(vpg_ber_pattern, VID_MODE_VPG_MODE, dsi), in debugfs_create_files()
1066 dsi->debugfs_vpg = kmemdup(debugfs, sizeof(debugfs), GFP_KERNEL); in debugfs_create_files()
1067 if (!dsi->debugfs_vpg) in debugfs_create_files()
1071 debugfs_create_file(dsi->debugfs_vpg[i].name, 0644, in debugfs_create_files()
1072 dsi->debugfs, &dsi->debugfs_vpg[i], in debugfs_create_files()
1076 static void dw_mipi_dsi_debugfs_init(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_debugfs_init() argument
1078 dsi->debugfs = debugfs_create_dir(dev_name(dsi->dev), NULL); in dw_mipi_dsi_debugfs_init()
1079 if (IS_ERR(dsi->debugfs)) { in dw_mipi_dsi_debugfs_init()
1080 dev_err(dsi->dev, "failed to create debugfs root\n"); in dw_mipi_dsi_debugfs_init()
1084 debugfs_create_files(dsi); in dw_mipi_dsi_debugfs_init()
1087 static void dw_mipi_dsi_debugfs_remove(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_debugfs_remove() argument
1089 debugfs_remove_recursive(dsi->debugfs); in dw_mipi_dsi_debugfs_remove()
1090 kfree(dsi->debugfs_vpg); in dw_mipi_dsi_debugfs_remove()
1095 static void dw_mipi_dsi_debugfs_init(struct dw_mipi_dsi *dsi) { } in dw_mipi_dsi_debugfs_init() argument
1096 static void dw_mipi_dsi_debugfs_remove(struct dw_mipi_dsi *dsi) { } in dw_mipi_dsi_debugfs_remove() argument
1104 struct device *dev = &pdev->dev; in __dw_mipi_dsi_probe()
1106 struct dw_mipi_dsi *dsi; in __dw_mipi_dsi_probe() local
1109 dsi = devm_kzalloc(dev, sizeof(*dsi), GFP_KERNEL); in __dw_mipi_dsi_probe()
1110 if (!dsi) in __dw_mipi_dsi_probe()
1111 return ERR_PTR(-ENOMEM); in __dw_mipi_dsi_probe()
1113 dsi->dev = dev; in __dw_mipi_dsi_probe()
1114 dsi->plat_data = plat_data; in __dw_mipi_dsi_probe()
1116 if (!plat_data->phy_ops->init || !plat_data->phy_ops->get_lane_mbps || in __dw_mipi_dsi_probe()
1117 !plat_data->phy_ops->get_timing) { in __dw_mipi_dsi_probe()
1119 return ERR_PTR(-ENODEV); in __dw_mipi_dsi_probe()
1122 if (!plat_data->base) { in __dw_mipi_dsi_probe()
1123 dsi->base = devm_platform_ioremap_resource(pdev, 0); in __dw_mipi_dsi_probe()
1124 if (IS_ERR(dsi->base)) in __dw_mipi_dsi_probe()
1125 return ERR_PTR(-ENODEV); in __dw_mipi_dsi_probe()
1128 dsi->base = plat_data->base; in __dw_mipi_dsi_probe()
1131 dsi->pclk = devm_clk_get(dev, "pclk"); in __dw_mipi_dsi_probe()
1132 if (IS_ERR(dsi->pclk)) { in __dw_mipi_dsi_probe()
1133 ret = PTR_ERR(dsi->pclk); in __dw_mipi_dsi_probe()
1146 if (ret != -EPROBE_DEFER) in __dw_mipi_dsi_probe()
1153 ret = clk_prepare_enable(dsi->pclk); in __dw_mipi_dsi_probe()
1163 clk_disable_unprepare(dsi->pclk); in __dw_mipi_dsi_probe()
1166 dw_mipi_dsi_debugfs_init(dsi); in __dw_mipi_dsi_probe()
1169 dsi->dsi_host.ops = &dw_mipi_dsi_host_ops; in __dw_mipi_dsi_probe()
1170 dsi->dsi_host.dev = dev; in __dw_mipi_dsi_probe()
1171 ret = mipi_dsi_host_register(&dsi->dsi_host); in __dw_mipi_dsi_probe()
1175 dw_mipi_dsi_debugfs_remove(dsi); in __dw_mipi_dsi_probe()
1179 dsi->bridge.driver_private = dsi; in __dw_mipi_dsi_probe()
1180 dsi->bridge.funcs = &dw_mipi_dsi_bridge_funcs; in __dw_mipi_dsi_probe()
1182 dsi->bridge.of_node = pdev->dev.of_node; in __dw_mipi_dsi_probe()
1185 return dsi; in __dw_mipi_dsi_probe()
1188 static void __dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi) in __dw_mipi_dsi_remove() argument
1190 mipi_dsi_host_unregister(&dsi->dsi_host); in __dw_mipi_dsi_remove()
1192 pm_runtime_disable(dsi->dev); in __dw_mipi_dsi_remove()
1193 dw_mipi_dsi_debugfs_remove(dsi); in __dw_mipi_dsi_remove()
1196 void dw_mipi_dsi_set_slave(struct dw_mipi_dsi *dsi, struct dw_mipi_dsi *slave) in dw_mipi_dsi_set_slave() argument
1199 dsi->slave = slave; in dw_mipi_dsi_set_slave()
1200 dsi->slave->master = dsi; in dw_mipi_dsi_set_slave()
1203 dsi->slave->lanes = dsi->lanes; in dw_mipi_dsi_set_slave()
1204 dsi->slave->channel = dsi->channel; in dw_mipi_dsi_set_slave()
1205 dsi->slave->format = dsi->format; in dw_mipi_dsi_set_slave()
1206 dsi->slave->mode_flags = dsi->mode_flags; in dw_mipi_dsi_set_slave()
1221 void dw_mipi_dsi_remove(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_remove() argument
1223 __dw_mipi_dsi_remove(dsi); in dw_mipi_dsi_remove()
1230 int dw_mipi_dsi_bind(struct dw_mipi_dsi *dsi, struct drm_encoder *encoder) in dw_mipi_dsi_bind() argument
1232 return drm_bridge_attach(encoder, &dsi->bridge, NULL, 0); in dw_mipi_dsi_bind()
1236 void dw_mipi_dsi_unbind(struct dw_mipi_dsi *dsi) in dw_mipi_dsi_unbind() argument
1241 MODULE_AUTHOR("Chris Zhong <zyw@rock-chips.com>");
1243 MODULE_DESCRIPTION("DW MIPI DSI host controller driver");
1245 MODULE_ALIAS("platform:dw-mipi-dsi");