Searched +full:dt +full:- +full:binding (Results 1 – 25 of 543) sorted by relevance
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| /Linux-v6.1/Documentation/devicetree/bindings/ |
| D | writing-schema.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 Writing Devicetree Bindings in json-schema
6 Devicetree bindings are written using json-schema vocabulary. Schema files are
7 written in a JSON-compatible subset of YAML. YAML is used instead of JSON as it
11 Also see :ref:`example-schema`.
14 ---------------
16 Each schema doc is a structured json-schema which is defined by a set of
17 top-level properties. Generally, there is one binding defined per file. The
18 top-level json-schema properties used are:
21 A json-schema unique identifier string. The string must be a valid
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| D | submitting-patches.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Submitting Devicetree (DT) binding patches
11 Documentation/process/submitting-patches.rst applies.
13 1) The Documentation/ and include/dt-bindings/ portion of the patch should
14 be a separate patch. The preferred subject prefix for binding patches is::
16 "dt-bindings: <binding dir>: ..."
20 docs. Repeating "binding" again should also be avoided.
22 2) DT binding files are written in DT schema format using json-schema
23 vocabulary and YAML file format. The DT binding files must pass validation
28 See Documentation/devicetree/bindings/writing-schema.rst for more details
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| D | ABI.rst | 1 .. SPDX-License-Identifier: GPL-2.0
4 Devicetree (DT) ABI
7 I. Regarding stable bindings/ABI, we quote from the 2013 ARM mini-summit
10 "That still leaves the question of, what does a stable binding look
11 like? Certainly a stable binding means that a newer kernel will not
12 break on an older device tree, but that doesn't mean the binding is
15 then default to the previous behaviour if it is missing. If a binding
21 II. General binding rules
24 binding because it isn't perfect.
30 the old binding. ie. add additional properties, but don't change the
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| D | example-schema.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 # All the top-level keys are standard json-schema keywords except for
10 $id: http://devicetree.org/schemas/example-schema.yaml#
11 # $schema is the meta-schema this schema should be validated with.
12 $schema: http://devicetree.org/meta-schemas/core.yaml#
17 - Rob Herring <robh@kernel.org>
20 A more detailed multi-line description of the binding.
29 # 'select' is a schema applied to a DT node to determine if this binding
36 # A dictionary of DT properties for this binding schema
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| /Linux-v6.1/Documentation/devicetree/bindings/iommu/ |
| D | mediatek,iommu.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Yong Wu <yong.wu@mediatek.com>
16 ARM Short-Descriptor translation table format for address translation.
24 +--------+
26 gals0-rx gals1-rx (Global Async Local Sync rx)
29 gals0-tx gals1-tx (Global Async Local Sync tx)
31 +--------+
35 +----------------+-------
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| /Linux-v6.1/Documentation/devicetree/bindings/clock/ |
| D | maxim,max77686.txt | 1 Binding for Maxim MAX77686/MAX77802/MAX77620 32k clock generator block
4 multi-function device. More information can be found in MFD DT binding
12 dt-bindings/clock/maxim,max77686.h.
17 dt-bindings/clock/maxim,max77802.h.
21 dt-bindings/clock/maxim,max77620.h.
27 - #clock-cells: from common clock binding; shall be set to 1.
30 - clock-output-names: From common clock binding.
34 - 0: 32khz_ap clock (max77686, max77802), 32khz_out0 (max77620)
35 - 1: 32khz_cp clock (max77686, max77802),
36 - 2: 32khz_pmic clock (max77686).
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| D | alphascale,acc.txt | 7 - compatible: must be "alphascale,asm9260-clock-controller"
8 - reg: must contain the ACC register base and size
9 - #clock-cells : shall be set to 1.
11 Simple one-cell clock specifier format is used, where the only cell is used
13 It is encouraged to use dt-binding for clock index definitions. SoC specific
14 dt-binding should be included to the device tree descriptor. For example
16 #include <dt-bindings/clock/alphascale,asm9260.h>
18 This binding contains two types of clock providers:
19 _AHB_ - AHB gate;
20 _SYS_ - adjustable clock source. Not all peripheral have _SYS_ clock provider.
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| D | st,stm32mp1-rcc.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/st,stm32mp1-rcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Reset Clock Controller Binding
10 - Gabriel Fernandez <gabriel.fernandez@foss.st.com>
15 Please also refer to reset.txt for common reset controller binding usage.
17 This binding uses common clock bindings
18 Documentation/devicetree/bindings/clock/clock-bindings.txt
24 dt-bindings/clock/stm32mp1-clks.h header and can be used in device
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| D | clk-palmas-clk32kg-clocks.txt | 5 This binding uses the common clock binding ./clock-bindings.txt.
8 - compatible : "ti,palmas-clk32kg" for clk32kg clock
9 "ti,palmas-clk32kgaudio" for clk32kgaudio clock
10 - #clock-cells : shall be set to 0.
13 - ti,external-sleep-control: The external enable input pins controlled the
22 dt-bindings/mfd/palmas.h
25 #include <dt-bindings/mfd/palmas.h>
30 compatible = "ti,palmas-clk32kg";
31 #clock-cells = <0>;
32 ti,external-sleep-control = <PALMAS_EXT_CONTROL_PIN_NSLEEP>;
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| D | microchip,mpfs-clkcfg.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/clock/microchip,mpfs-clkcfg.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Microchip PolarFire Clock Control Module Binding
10 - Daire McNamara <daire.mcnamara@microchip.com>
16 This device tree binding describes 33 gate clocks. Clocks are referenced by
22 const: microchip,mpfs-clkcfg
26 - description: |
31 - description: |
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| D | baikal,bt1-ccu-div.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 ---
5 $id: http://devicetree.org/schemas/clock/baikal,bt1-ccu-div.yaml#
6 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 title: Baikal-T1 Clock Control Unit Dividers
11 - Serge Semin <fancer.lancer@gmail.com>
14 Clocks Control Unit is the core of Baikal-T1 SoC System Controller
18 IP-blocks or to groups of blocks (clock domains). The transformation is done
19 by means of an embedded into CCU PLLs and gateable/non-gateable dividers. The
20 later ones are described in this binding. Each clock domain can be also
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| D | maxim,max9485.txt | 5 - MAX9485_MCLKOUT: A gated, buffered output of the input clock of 27 MHz
6 - MAX9485_CLKOUT: A PLL that can be configured to 16 different discrete
8 - MAX9485_CLKOUT[1,2]: Two gated outputs for MAX9485_CLKOUT
14 - compatible: "maxim,max9485"
15 - clocks: Input clock, must provice 27.000 MHz
16 - clock-names: Must be set to "xclk"
17 - #clock-cells: From common clock binding; shall be set to 1
20 - reset-gpios: GPIO descriptor connected to the #RESET input pin
21 - vdd-supply: A regulator node for Vdd
22 - clock-output-names: Name of output clocks, as defined in common clock
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| D | img,boston-clock.txt | 1 Binding for Imagination Technologies MIPS Boston clock sources.
3 This binding uses the common clock binding[1].
5 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
11 - compatible : Should be "img,boston-clock".
12 - #clock-cells : Should be set to 1.
14 <dt-bindings/clock/boston-clock.h>
18 system-controller@17ffd000 {
19 compatible = "img,boston-platform-regs", "syscon";
23 compatible = "img,boston-clock";
24 #clock-cells = <1>;
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| /Linux-v6.1/Documentation/devicetree/bindings/clock/ti/ |
| D | dra7-atl.txt | 7 signals - can compensate the drift between the two ws signal.
12 Clock tree binding:
13 This binding uses the common clock binding[1].
14 To be able to integrate the ATL clocks with DT clock tree.
16 Since the clock instances are part of a single IP this binding is used as a node
17 for the DT clock tree, the IP driver is needed to handle the actual configuration
20 [1] Documentation/devicetree/bindings/clock/clock-bindings.txt
23 - compatible : shall be "ti,dra7-atl-clock"
24 - #clock-cells : from common clock binding; shall be set to 0.
25 - clocks : link phandles to functional clock of ATL
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| /Linux-v6.1/Documentation/devicetree/bindings/media/ |
| D | s5p-mfc.txt | 10 - compatible : value should be either one among the following
11 (a) "samsung,mfc-v5" for MFC v5 present in Exynos4 SoCs
12 (b) "samsung,mfc-v6" for MFC v6 present in Exynos5 SoCs
13 (c) "samsung,mfc-v7" for MFC v7 present in Exynos5420 SoC
14 (d) "samsung,mfc-v8" for MFC v8 present in Exynos5800 SoC
15 (e) "samsung,exynos5433-mfc" for MFC v8 present in Exynos5433 SoC
16 (f) "samsung,mfc-v10" for MFC v10 present in Exynos7880 SoC
18 - reg : Physical base address of the IP registers and length of memory
21 - interrupts : MFC interrupt number to the CPU.
22 - clocks : from common clock binding: handle to mfc clock.
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| /Linux-v6.1/Documentation/devicetree/bindings/reset/ |
| D | reset.txt | 3 This binding is intended to represent the hardware reset signals present
10 reset consumer (the module being reset, or a module managing when a sub-
11 ordinate module is reset). This binding exists to represent the provider and
15 specifier - a list of DT cells that represents the reset signal within the
17 are dictated by the binding of the reset provider, although common schemes
23 the DT node of each affected HW block, since if activated, an unrelated block
24 may be reset. Instead, reset signals should be represented in the DT node
27 block node for dedicated reset signals. The intent of this binding is to give
35 #reset-cells: Number of cells in a reset specifier; Typically 0 for nodes
41 rst: reset-controller {
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| D | snps,hsdk-reset.txt | 1 Binding for the Synopsys HSDK reset controller
3 This binding uses the common reset binding[1].
8 - compatible: should be "snps,hsdk-reset".
9 - reg: should always contain 2 pairs address - length: first for reset
12 - #reset-cells: from common reset binding; Should always be set to 1.
16 compatible = "snps,hsdk-reset";
17 #reset-cells = <1>;
28 The index could be found in <dt-bindings/reset/snps,hsdk-reset.h>
|
| /Linux-v6.1/Documentation/devicetree/bindings/thermal/ |
| D | max77620_thermal.txt | 10 -------------------
11 #thermal-sensor-cells: For more details, please refer to
12 <devicetree/bindings/thermal/thermal-sensor.yaml>
15 For more details, please refer generic thermal DT binding document
18 Please refer <devicetree/bindings/mfd/max77620.txt> for mfd DT binding
22 --------
23 #include <dt-bindings/mfd/max77620.h>
24 #include <dt-bindings/thermal/thermal.h>
31 #thermal-sensor-cells = <0>;
36 cool_dev: cool-dev {
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| /Linux-v6.1/Documentation/devicetree/bindings/gpio/ |
| D | gpio.txt | 5 -----------------
7 GPIO properties should be named "[<name>-]gpios", with <name> being the purpose
8 of this GPIO for the device. While a non-existent <name> is considered valid
10 for new bindings. Also, GPIO properties named "[<name>-]gpio" are valid and old
21 binding of the device.
24 and bit-banged data signals:
27 gpio-controller;
28 #gpio-cells = <2>;
32 data-gpios = <&gpio1 12 0>,
43 documented in the device tree binding for the device, but it is strongly
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| D | nvidia,tegra186-gpio.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/gpio/nvidia,tegra186-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Thierry Reding <thierry.reding@gmail.com>
11 - Jon Hunter <jonathanh@nvidia.com>
15 controller. This binding document applies to both controllers. The register
53 controller, are both extremely non-linear. The header file
54 <dt-bindings/gpio/tegra186-gpio.h> describes the port-level mapping. In
57 particular controller. Drivers need to map between the DT GPIO IDs and HW
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| /Linux-v6.1/Documentation/devicetree/bindings/sound/ |
| D | qcom,q6dsp-lpass-clocks.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: "http://devicetree.org/schemas/sound/qcom,q6dsp-lpass-clocks.yaml#"
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: Qualcomm DSP LPASS Clock Controller binding
10 - Srinivas Kandagatla <srinivas.kandagatla@linaro.org>
13 This binding describes the Qualcomm DSP Clock Controller
18 - qcom,q6afe-clocks
19 - qcom,q6prm-lpass-clocks
21 '#clock-cells':
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| /Linux-v6.1/Documentation/devicetree/bindings/pwm/ |
| D | nvidia,tegra20-pwm.txt | 4 - compatible: Must be:
5 - "nvidia,tegra20-pwm": for Tegra20
6 - "nvidia,tegra30-pwm", "nvidia,tegra20-pwm": for Tegra30
7 - "nvidia,tegra114-pwm", "nvidia,tegra20-pwm": for Tegra114
8 - "nvidia,tegra124-pwm", "nvidia,tegra20-pwm": for Tegra124
9 - "nvidia,tegra132-pwm", "nvidia,tegra20-pwm": for Tegra132
10 - "nvidia,tegra210-pwm", "nvidia,tegra20-pwm": for Tegra210
11 - "nvidia,tegra186-pwm": for Tegra186
12 - "nvidia,tegra194-pwm": for Tegra194
13 - reg: physical base address and length of the controller's registers
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| /Linux-v6.1/Documentation/devicetree/bindings/mfd/ |
| D | max77620.txt | 4 -------------------
5 - compatible: Must be one of
9 - reg: I2C device address.
12 -------------------
13 - interrupts: The interrupt on the parent the controller is
15 - interrupt-controller: Marks the device node as an interrupt controller.
16 - #interrupt-cells: is <2> and their usage is compliant to the 2 cells
17 variant of <../interrupt-controller/interrupts.txt>
19 are defined at dt-bindings/mfd/max77620.h.
21 - system-power-controller: Indicates that this PMIC is controlling the
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| /Linux-v6.1/Documentation/devicetree/bindings/pinctrl/ |
| D | pinctrl-mt8192.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/pinctrl-mt8192.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Sean Wang <sean.wang@mediatek.com>
17 const: mediatek,mt8192-pinctrl
19 gpio-controller: true
21 '#gpio-cells':
23 Number of cells in GPIO specifier. Since the generic GPIO binding is used,
25 mentioned gpio binding representation for description of particular cells.
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| /Linux-v6.1/Documentation/devicetree/bindings/leds/ |
| D | common.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Jacek Anaszewski <jacek.anaszewski@gmail.com>
11 - Pavel Machek <pavel@ucw.cz>
21 have to be tightly coupled with the LED device binding. They are represented
22 by child nodes of the parent LED device binding.
25 led-sources:
28 identified by the numbers that must be defined in the LED device binding
30 $ref: /schemas/types.yaml#/definitions/uint32-array
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