| /Linux-v6.1/Documentation/devicetree/bindings/dma/ |
| D | renesas,usb-dmac.yaml | 4 $id: http://devicetree.org/schemas/dma/renesas,usb-dmac.yaml#
19 - renesas,r8a7742-usb-dmac # RZ/G1H
20 - renesas,r8a7743-usb-dmac # RZ/G1M
21 - renesas,r8a7744-usb-dmac # RZ/G1N
22 - renesas,r8a7745-usb-dmac # RZ/G1E
23 - renesas,r8a77470-usb-dmac # RZ/G1C
24 - renesas,r8a774a1-usb-dmac # RZ/G2M
25 - renesas,r8a774b1-usb-dmac # RZ/G2N
26 - renesas,r8a774c0-usb-dmac # RZ/G2E
27 - renesas,r8a774e1-usb-dmac # RZ/G2H
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| D | renesas,rcar-dmac.yaml | 4 $id: http://devicetree.org/schemas/dma/renesas,rcar-dmac.yaml#
20 - renesas,dmac-r8a7742 # RZ/G1H
21 - renesas,dmac-r8a7743 # RZ/G1M
22 - renesas,dmac-r8a7744 # RZ/G1N
23 - renesas,dmac-r8a7745 # RZ/G1E
24 - renesas,dmac-r8a77470 # RZ/G1C
25 - renesas,dmac-r8a774a1 # RZ/G2M
26 - renesas,dmac-r8a774b1 # RZ/G2N
27 - renesas,dmac-r8a774c0 # RZ/G2E
28 - renesas,dmac-r8a774e1 # RZ/G2H
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| D | renesas,rz-dmac.yaml | 4 $id: http://devicetree.org/schemas/dma/renesas,rz-dmac.yaml#
19 - renesas,r9a07g043-dmac # RZ/G2UL
20 - renesas,r9a07g044-dmac # RZ/G2{L,LC}
21 - renesas,r9a07g054-dmac # RZ/V2L
22 - const: renesas,rz-dmac
60 The cell specifies the encoded MID/RID values of the DMAC port
98 dmac: dma-controller@11820000 {
99 compatible = "renesas,r9a07g044-dmac",
100 "renesas,rz-dmac";
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| D | snps,dw-axi-dmac.yaml | 4 $id: http://devicetree.org/schemas/dma/snps,dw-axi-dmac.yaml#
28 - description: Address range of the DMAC registers
29 - description: Address range of the DMAC APB registers
95 DMAC is used.
119 /* example with snps,dw-axi-dmac */
120 dmac: dma-controller@80000 {
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| D | socionext,uniphier-mio-dmac.yaml | 4 $id: http://devicetree.org/schemas/dma/socionext,uniphier-mio-dmac.yaml#
21 const: socionext,uniphier-mio-dmac
55 dmac: dma-controller@5a000000 {
56 compatible = "socionext,uniphier-mio-dmac";
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| /Linux-v6.1/drivers/dma/ |
| D | dma-axi-dmac.c | 3 * Driver for the Analog Devices AXI-DMAC core
27 #include <dt-bindings/dma/axi-dmac.h>
33 * The AXI-DMAC is a soft IP core that is used in FPGA designs. The core has
209 struct axi_dmac *dmac = chan_to_axi_dmac(chan); in axi_dmac_start_transfer() local
216 val = axi_dmac_read(dmac, AXI_DMAC_REG_START_TRANSFER); in axi_dmac_start_transfer()
249 sg->id = axi_dmac_read(dmac, AXI_DMAC_REG_TRANSFER_ID); in axi_dmac_start_transfer()
252 axi_dmac_write(dmac, AXI_DMAC_REG_DEST_ADDRESS, sg->dest_addr); in axi_dmac_start_transfer()
253 axi_dmac_write(dmac, AXI_DMAC_REG_DEST_STRIDE, sg->dest_stride); in axi_dmac_start_transfer()
257 axi_dmac_write(dmac, AXI_DMAC_REG_SRC_ADDRESS, sg->src_addr); in axi_dmac_start_transfer()
258 axi_dmac_write(dmac, AXI_DMAC_REG_SRC_STRIDE, sg->src_stride); in axi_dmac_start_transfer()
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| D | pl330.c | 318 * One cycle of DMAC operation.
370 /* A DMAC Thread */
376 /* Parent DMAC */
377 struct pl330_dmac *dmac; member
393 /* In the DMAC pool */
427 /* Pointer to the DMAC that manages this channel,
429 * As the parent, this DMAC also provides descriptors
432 struct pl330_dmac *dmac; member
438 * Hardware channel thread of PL330 DMAC. NULL if the channel is
463 /* Pool of descriptors available for the DMAC's channels */
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| /Linux-v6.1/drivers/dma/sh/ |
| D | usb-dmac.c | 7 * based on rcar-dmac.c
46 * @residue: residue after the DMAC completed a transfer
48 * @done_cookie: cookie after the DMAC completed a transfer
74 * @desc_freed: freed descriptors after the DMAC completed a transfer
95 * @channels: array of DMAC channels
151 static void usb_dmac_write(struct usb_dmac *dmac, u32 reg, u32 data) in usb_dmac_write() argument
153 writel(data, dmac->iomem + reg); in usb_dmac_write()
156 static u32 usb_dmac_read(struct usb_dmac *dmac, u32 reg) in usb_dmac_read() argument
158 return readl(dmac->iomem + reg); in usb_dmac_read()
244 static int usb_dmac_init(struct usb_dmac *dmac) in usb_dmac_init() argument
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| D | rz-dmac.c | 174 static void rz_dmac_writel(struct rz_dmac *dmac, unsigned int val, in rz_dmac_writel() argument
177 writel(val, dmac->base + offset); in rz_dmac_writel()
180 static void rz_dmac_ext_writel(struct rz_dmac *dmac, unsigned int val, in rz_dmac_ext_writel() argument
183 writel(val, dmac->ext_base + offset); in rz_dmac_ext_writel()
186 static u32 rz_dmac_ext_readl(struct rz_dmac *dmac, unsigned int offset) in rz_dmac_ext_readl() argument
188 return readl(dmac->ext_base + offset); in rz_dmac_ext_readl()
255 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_enable_hw() local
261 dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index); in rz_dmac_enable_hw()
286 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_disable_hw() local
289 dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index); in rz_dmac_disable_hw()
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| D | rcar-dmac.c | 195 * @channels: array of DMAC channels
214 #define for_each_rcar_dmac_chan(i, dmac, chan) \ argument
215 for (i = 0, chan = &(dmac)->channels[0]; i < (dmac)->n_channels; i++, chan++) \
216 if (!((dmac)->channels_mask & BIT(i))) continue; else
220 * @chan_offset_base: DMAC channels base offset
221 * @chan_offset_stride: DMAC channels offset stride
312 static void rcar_dmac_write(struct rcar_dmac *dmac, u32 reg, u32 data) in rcar_dmac_write() argument
315 writew(data, dmac->dmac_base + reg); in rcar_dmac_write()
317 writel(data, dmac->dmac_base + reg); in rcar_dmac_write()
320 static u32 rcar_dmac_read(struct rcar_dmac *dmac, u32 reg) in rcar_dmac_read() argument
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| D | Makefile | 16 obj-$(CONFIG_RCAR_DMAC) += rcar-dmac.o
17 obj-$(CONFIG_RENESAS_USB_DMAC) += usb-dmac.o
18 obj-$(CONFIG_RZ_DMAC) += rz-dmac.o
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| /Linux-v6.1/tools/testing/selftests/drivers/net/dsa/ |
| D | no_forwarding.sh | 35 local dmac=$3
37 $MZ -q $if_name "$dmac $smac $NON_IP_PKT"
43 local dmac=$2
45 ip neigh add $H2_IPV4 lladdr $dmac dev $if_name
60 local dmac=$2
62 ip -6 neigh add $H2_IPV6 lladdr $dmac dev $if_name
94 local dmac=$(mac_get $h2)
102 send_non_ip $h1 $smac $dmac
105 send_uc_ipv4 $h1 $dmac
107 send_uc_ipv6 $h1 $dmac
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| /Linux-v6.1/tools/testing/selftests/net/forwarding/ |
| D | no_forwarding.sh | 35 local dmac=$3
37 $MZ -q $if_name "$dmac $smac $NON_IP_PKT"
43 local dmac=$2
45 ip neigh add $H2_IPV4 lladdr $dmac dev $if_name
60 local dmac=$2
62 ip -6 neigh add $H2_IPV6 lladdr $dmac dev $if_name
94 local dmac=$(mac_get $h2)
102 send_non_ip $h1 $smac $dmac
105 send_uc_ipv4 $h1 $dmac
107 send_uc_ipv6 $h1 $dmac
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| /Linux-v6.1/drivers/dma/dw-axi-dmac/ |
| D | dw-axi-dmac.h | 149 #define DMAC_ID 0x000 /* R DMAC ID */
150 #define DMAC_COMPVER 0x008 /* R DMAC Component Version */
151 #define DMAC_CFG 0x010 /* R/W DMAC Configuration */
152 #define DMAC_CHEN 0x018 /* R/W DMAC Channel Enable */
153 #define DMAC_CHEN_L 0x018 /* R/W DMAC Channel Enable 00-31 */
154 #define DMAC_CHEN_H 0x01C /* R/W DMAC Channel Enable 32-63 */
155 #define DMAC_CHSUSPREG 0x020 /* R/W DMAC Channel Suspend */
156 #define DMAC_CHABORTREG 0x028 /* R/W DMAC Channel Abort */
157 #define DMAC_INTSTATUS 0x030 /* R DMAC Interrupt Status */
158 #define DMAC_COMMON_INTCLEAR 0x038 /* W DMAC Interrupt Clear */
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| /Linux-v6.1/sound/soc/sh/rcar/ |
| D | dma.c | 3 // Renesas R-Car Audio DMAC support
13 * Audio DMAC peri peri register
67 * Audio DMAC
174 * in case of monaural data writing or reading through Audio-DMAC in rsnd_dmaen_start()
273 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); in rsnd_dmaen_attach() local
301 dmac->dmaen_num++; in rsnd_dmaen_attach()
338 * Audio DMAC peri peri
427 #define rsnd_dmapp_addr(dmac, dma, reg) \ argument
428 (dmac->ppbase + 0x20 + reg + \
434 struct rsnd_dma_ctrl *dmac = rsnd_priv_to_dmac(priv); in rsnd_dmapp_write() local
[all …]
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| /Linux-v6.1/tools/testing/selftests/drivers/net/mlxsw/ |
| D | devlink_trap_l2_drops.sh | 119 local dmac=de:ad:be:ef:13:37
128 flower dst_mac $dmac action drop
130 $MZ $h1 "$opt" -c 0 -p 100 -a own -b $dmac -t ip -d 1msec -q &
179 local dmac=de:ad:be:ef:13:37
188 flower dst_mac $dmac action drop
190 $MZ $h1 -Q $vid -c 0 -p 100 -a own -b $dmac -t ip -d 1msec -q &
221 local dmac=de:ad:be:ef:13:37
231 flower dst_mac $dmac action drop
233 $MZ $h1 -Q $vid -c 0 -p 100 -a own -b $dmac -t ip -d 1msec -q &
290 local dmac=de:ad:be:ef:13:37
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| /Linux-v6.1/arch/sh/kernel/cpu/sh4/ |
| D | setup-sh7750.c | 182 HUDI, GPIOI, DMAC, enumerator
208 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, SCIF, HUDI } },
224 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
225 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
226 INTC_VECT(DMAC, 0x6c0),
237 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
238 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
239 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
240 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
241 INTC_VECT(DMAC, 0x6c0),
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| D | setup-sh7760.c | 21 HUDI, GPIOI, DMAC, enumerator
45 INTC_VECT(DMAC, 0x640), INTC_VECT(DMAC, 0x660),
46 INTC_VECT(DMAC, 0x680), INTC_VECT(DMAC, 0x6a0),
47 INTC_VECT(DMAC, 0x780), INTC_VECT(DMAC, 0x7a0),
48 INTC_VECT(DMAC, 0x7c0), INTC_VECT(DMAC, 0x7e0),
49 INTC_VECT(DMAC, 0x6c0),
106 { 0xffd0000c, 0, 16, 4, /* IPRC */ { GPIOI, DMAC, 0, HUDI } },
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| /Linux-v6.1/drivers/rapidio/devices/ |
| D | tsi721_dma.c | 75 tsi_debug(DMA, &bdma_chan->dchan.dev->device, "DMAC%d", bdma_chan->id); in tsi721_bdma_ch_init()
92 "DMAC%d descriptors @ %p (phys = %pad)", in tsi721_bdma_ch_init()
116 "DMAC%d desc status FIFO @ %p (phys = %pad) size=0x%x", in tsi721_bdma_ch_init()
157 "Unable to get MSI-X for DMAC%d-DONE", in tsi721_bdma_ch_init()
169 "Unable to get MSI-X for DMAC%d-INT", in tsi721_bdma_ch_init()
307 "DMAC%d Attempt to start non-idle channel", in tsi721_start_dma()
314 "DMAC%d Attempt to start DMA with no BDs ready %d", in tsi721_start_dma()
319 tsi_debug(DMA, &bdma_chan->dchan.dev->device, "DMAC%d (wrc=%d) %d", in tsi721_start_dma()
426 tsi_err(ch_dev, "DMAC%d ERR: Attempt to use non-idle channel", in tsi721_submit_sg()
450 tsi_debug(DMA, ch_dev, "DMAC%d BD ring status: rdi=%d wri=%d", in tsi721_submit_sg()
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| /Linux-v6.1/arch/sh/include/asm/ |
| D | dma.h | 18 * channel configuration. Consult your DMAC documentation and module
28 * DMAC (dma_info) flags
42 * Transfer end interrupt, inherited from DMAC.
63 char dev_id[16]; /* unique name per DMAC of channel */
65 unsigned int chan; /* DMAC channel number */
121 extern int request_dma_bycap(const char **dmac, const char **caps,
134 extern int register_chan_caps(const char *dmac, struct dma_chan_caps *capslist);
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| /Linux-v6.1/include/linux/ |
| D | sh_dma.h | 34 * struct sh_dmae_channel - DMAC channel platform data
50 * struct sh_dmae_pdata - DMAC platform data
66 * @no_dmars: DMAC has no DMARS registers
67 * @chclr_present: DMAC has one or several CHCLR registers
69 * @slave_only: DMAC cannot be used for MEMCPY
99 /* Definitions for the SuperH DMAC */
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| /Linux-v6.1/drivers/gpu/drm/nouveau/dispnv50/ |
| D | disp.c | 119 nv50_dmac_destroy(struct nv50_dmac *dmac) in nv50_dmac_destroy() argument
121 nvif_object_dtor(&dmac->vram); in nv50_dmac_destroy()
122 nvif_object_dtor(&dmac->sync); in nv50_dmac_destroy()
124 nv50_chan_destroy(&dmac->base); in nv50_dmac_destroy()
126 nvif_mem_dtor(&dmac->_push.mem); in nv50_dmac_destroy()
132 struct nv50_dmac *dmac = container_of(push, typeof(*dmac), _push); in nv50_dmac_kick() local
134 dmac->cur = push->cur - (u32 *)dmac->_push.mem.object.map.ptr; in nv50_dmac_kick()
135 if (dmac->put != dmac->cur) { in nv50_dmac_kick()
139 if (dmac->push->mem.type & NVIF_MEM_VRAM) { in nv50_dmac_kick()
140 struct nvif_device *device = dmac->base.device; in nv50_dmac_kick()
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| /Linux-v6.1/arch/sh/drivers/dma/ |
| D | Kconfig | 6 bool "SuperH on-chip DMA controller (DMAC) support"
40 DMAC supports. This will be 4 for SH7750/SH7751/Sh7750S/SH7091 and 8 for the
52 tristate "PowerVR 2 DMAC support"
56 As this chains off of the on-chip DMAC, that must also be
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| D | dmabrg.c | 20 * from the traditional SH DMAC (although it blocks usage of DMAC 0)
162 /* request DMAC channel 0 before anyone else can get it */ in dmabrg_init()
163 ret = request_dma(0, "DMAC 0 (DMABRG)"); in dmabrg_init()
165 printk(KERN_INFO "DMABRG: DMAC ch0 not reserved!\n"); in dmabrg_init()
170 __raw_writel(0x94000000, DMARSRA); /* enable DMABRG in DMAC 0 */ in dmabrg_init()
172 /* enable DMABRG mode, enable the DMAC */ in dmabrg_init()
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| /Linux-v6.1/drivers/mmc/host/ |
| D | renesas_sdhi_internal_dmac.c | 3 * DMA support for Internal DMAC with SDHI SD/SDIO controller
69 * - Since this SDHI DMAC register set has 16 but 32-bit width, we
75 * Workaround for avoiding to use RX DMAC by multiple channels.
77 * RX DMAC simultaneously, sometimes hundreds of bytes data are not
78 * stored into the system memory even if the DMAC interrupt happened.
79 * So, this driver then uses one RX DMAC channel only.
102 /* DMAC can handle 32bit blk count but only 1 segment */
117 /* DMAC can handle 32bit blk count but only 1 segment */
133 /* DMAC can handle 32bit blk count but only 1 segment */
365 /* This DMAC needs buffers to be 128-byte aligned */ in renesas_sdhi_internal_dmac_map()
[all …]
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