Lines Matching full:dmac
174 static void rz_dmac_writel(struct rz_dmac *dmac, unsigned int val, in rz_dmac_writel() argument
177 writel(val, dmac->base + offset); in rz_dmac_writel()
180 static void rz_dmac_ext_writel(struct rz_dmac *dmac, unsigned int val, in rz_dmac_ext_writel() argument
183 writel(val, dmac->ext_base + offset); in rz_dmac_ext_writel()
186 static u32 rz_dmac_ext_readl(struct rz_dmac *dmac, unsigned int offset) in rz_dmac_ext_readl() argument
188 return readl(dmac->ext_base + offset); in rz_dmac_ext_readl()
255 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_enable_hw() local
261 dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index); in rz_dmac_enable_hw()
286 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_disable_hw() local
289 dev_dbg(dmac->dev, "%s channel %d\n", __func__, channel->index); in rz_dmac_disable_hw()
296 static void rz_dmac_set_dmars_register(struct rz_dmac *dmac, int nr, u32 dmars) in rz_dmac_set_dmars_register() argument
302 dmars32 = rz_dmac_ext_readl(dmac, dmars_offset); in rz_dmac_set_dmars_register()
306 rz_dmac_ext_writel(dmac, dmars32, dmars_offset); in rz_dmac_set_dmars_register()
312 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_prepare_desc_for_memcpy() local
326 rz_dmac_set_dmars_register(dmac, channel->index, 0); in rz_dmac_prepare_desc_for_memcpy()
335 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_prepare_descs_for_slave_sg() local
377 rz_dmac_set_dmars_register(dmac, channel->index, channel->mid_rid); in rz_dmac_prepare_descs_for_slave_sg()
439 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_free_chan_resources() local
455 clear_bit(channel->mid_rid, dmac->modules); in rz_dmac_free_chan_resources()
475 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_prep_dma_memcpy() local
478 dev_dbg(dmac->dev, "%s channel: %d src=0x%pad dst=0x%pad len=%zu\n", in rz_dmac_prep_dma_memcpy()
552 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_issue_pending() local
564 dev_warn(dmac->dev, "ch: %d couldn't issue DMA xfer\n", in rz_dmac_issue_pending()
637 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_device_synchronize() local
644 dev_warn(dmac->dev, "DMA Timeout"); in rz_dmac_device_synchronize()
646 rz_dmac_set_dmars_register(dmac, channel->index, 0); in rz_dmac_device_synchronize()
657 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_irq_handle_channel() local
662 dev_err(dmac->dev, "DMAC err CHSTAT_%d = %08X\n", in rz_dmac_irq_handle_channel()
723 struct rz_dmac *dmac = to_rz_dmac(chan->device); in rz_dmac_chan_filter() local
732 return !test_and_set_bit(channel->mid_rid, dmac->modules); in rz_dmac_chan_filter()
755 static int rz_dmac_chan_probe(struct rz_dmac *dmac, in rz_dmac_chan_probe() argument
759 struct platform_device *pdev = to_platform_device(dmac->dev); in rz_dmac_chan_probe()
774 irqname = devm_kasprintf(dmac->dev, GFP_KERNEL, "%s:%u", in rz_dmac_chan_probe()
775 dev_name(dmac->dev), index); in rz_dmac_chan_probe()
779 ret = devm_request_threaded_irq(dmac->dev, channel->irq, in rz_dmac_chan_probe()
784 dev_err(dmac->dev, "failed to request IRQ %u (%d)\n", in rz_dmac_chan_probe()
791 channel->ch_base = dmac->base + CHANNEL_0_7_OFFSET + in rz_dmac_chan_probe()
793 channel->ch_cmn_base = dmac->base + CHANNEL_0_7_COMMON_BASE; in rz_dmac_chan_probe()
795 channel->ch_base = dmac->base + CHANNEL_8_15_OFFSET + in rz_dmac_chan_probe()
797 channel->ch_cmn_base = dmac->base + CHANNEL_8_15_COMMON_BASE; in rz_dmac_chan_probe()
814 vchan_init(&channel->vc, &dmac->engine); in rz_dmac_chan_probe()
822 static int rz_dmac_parse_of(struct device *dev, struct rz_dmac *dmac) in rz_dmac_parse_of() argument
827 ret = of_property_read_u32(np, "dma-channels", &dmac->n_channels); in rz_dmac_parse_of()
833 if (!dmac->n_channels || dmac->n_channels > RZ_DMAC_MAX_CHANNELS) { in rz_dmac_parse_of()
834 dev_err(dev, "invalid number of channels %u\n", dmac->n_channels); in rz_dmac_parse_of()
845 struct rz_dmac *dmac; in rz_dmac_probe() local
851 dmac = devm_kzalloc(&pdev->dev, sizeof(*dmac), GFP_KERNEL); in rz_dmac_probe()
852 if (!dmac) in rz_dmac_probe()
855 dmac->dev = &pdev->dev; in rz_dmac_probe()
856 platform_set_drvdata(pdev, dmac); in rz_dmac_probe()
858 ret = rz_dmac_parse_of(&pdev->dev, dmac); in rz_dmac_probe()
862 dmac->channels = devm_kcalloc(&pdev->dev, dmac->n_channels, in rz_dmac_probe()
863 sizeof(*dmac->channels), GFP_KERNEL); in rz_dmac_probe()
864 if (!dmac->channels) in rz_dmac_probe()
868 dmac->base = devm_platform_ioremap_resource(pdev, 0); in rz_dmac_probe()
869 if (IS_ERR(dmac->base)) in rz_dmac_probe()
870 return PTR_ERR(dmac->base); in rz_dmac_probe()
872 dmac->ext_base = devm_platform_ioremap_resource(pdev, 1); in rz_dmac_probe()
873 if (IS_ERR(dmac->ext_base)) in rz_dmac_probe()
874 return PTR_ERR(dmac->ext_base); in rz_dmac_probe()
890 INIT_LIST_HEAD(&dmac->engine.channels); in rz_dmac_probe()
899 for (i = 0; i < dmac->n_channels; i++) { in rz_dmac_probe()
900 ret = rz_dmac_chan_probe(dmac, &dmac->channels[i], i); in rz_dmac_probe()
905 /* Register the DMAC as a DMA provider for DT. */ in rz_dmac_probe()
912 engine = &dmac->engine; in rz_dmac_probe()
915 rz_dmac_writel(dmac, DCTRL_DEFAULT, CHANNEL_0_7_COMMON_BASE + DCTRL); in rz_dmac_probe()
916 rz_dmac_writel(dmac, DCTRL_DEFAULT, CHANNEL_8_15_COMMON_BASE + DCTRL); in rz_dmac_probe()
945 struct rz_dmac_chan *channel = &dmac->channels[i]; in rz_dmac_probe()
962 struct rz_dmac *dmac = platform_get_drvdata(pdev); in rz_dmac_remove() local
965 for (i = 0; i < dmac->n_channels; i++) { in rz_dmac_remove()
966 struct rz_dmac_chan *channel = &dmac->channels[i]; in rz_dmac_remove()
974 dma_async_device_unregister(&dmac->engine); in rz_dmac_remove()
982 { .compatible = "renesas,rz-dmac", },
989 .name = "rz-dmac",