| /Linux-v6.1/arch/arm/boot/dts/ |
| D | imx6qdl-dhcom-drc02.dtsi | 1 // SPDX-License-Identifier: GPL-2.0+
8 stdout-path = "serial0:115200n8";
15 * Tx and Rx are routed to the DHCOM UART1 rts/cts pins. Therefore the micro SD
16 * card must be disabled and the uart1 rts/cts must be output on other DHCOM
30 rs485-rx-en-hog {
31 gpio-hog;
32 gpios = <18 0>; /* GPIO Q */
33 line-name = "rs485-rx-en";
34 output-low;
39 gpio-line-names =
[all …]
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| D | stm32mp157a-iot-box.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
7 #include "stm32mp157a-stinger96.dtsi"
11 compatible = "shiratech,stm32mp157a-iot-box", "st,stm32mp157";
13 wlan_pwr: regulator-wlan {
14 compatible = "regulator-fixed";
16 regulator-name = "wl-reg";
17 regulator-min-microvolt = <3300000>;
18 regulator-max-microvolt = <3300000>;
20 gpios = <&gpiog 3 GPIO_ACTIVE_HIGH>;
[all …]
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| D | am335x-netcom-plus-2xx.dts | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
11 /dts-v1/;
13 #include "am335x-baltos.dtsi"
14 #include "am335x-baltos-leds.dtsi"
22 pinctrl-single,pins = <
25 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE0) /* CTS */
35 pinctrl-single,pins = <
38 AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLDOWN, MUX_MODE2) /* CTS */
58 pinctrl-names = "default";
[all …]
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| D | intel-ixp42x-goramo-multilink.dts | 1 // SPDX-License-Identifier: ISC
5 * - MultiLink Basic (a box)
6 * - MultiLink Max (19" rack mount)
9 * This is one of the few devices supporting the IXP4xx High-Speed Serial
14 /dts-v1/;
16 #include "intel-ixp42x.dtsi"
17 #include <dt-bindings/input/input.h>
21 compatible = "goramo,multilink-router", "intel,ixp42x";
22 #address-cells = <1>;
23 #size-cells = <1>;
[all …]
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| D | imx6ul-ccimx6ulsbcpro.dts | 1 // SPDX-License-Identifier: GPL-2.0
9 /dts-v1/;
10 #include <dt-bindings/input/input.h>
11 #include <dt-bindings/interrupt-controller/irq.h>
13 #include "imx6ul-ccimx6ulsom.dtsi"
20 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <6>;
29 power-supply = <&ldo4_ext>;
34 remote-endpoint = <&display_out>;
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/serial/ |
| D | serial.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
10 - Rob Herring <robh@kernel.org>
11 - Greg Kroah-Hartman <gregkh@linuxfoundation.org>
19 where N is the port number (non-negative decimal integer) as printed on the
28 cts-gpios:
32 the UART's CTS line.
34 dcd-gpios:
40 dsr-gpios:
[all …]
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| D | st,stm32-uart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/st,stm32-uart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
8 - Erwan Le Ray <erwan.leray@foss.st.com>
15 - st,stm32-uart
16 - st,stm32f7-uart
17 - st,stm32h7-uart
34 st,hw-flow-ctrl:
38 uart-has-rtscts: true
[all …]
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| D | cirrus,clps711x-uart.txt | 4 - compatible: Should be "cirrus,ep7209-uart".
5 - reg: Address and length of the register set for the device.
6 - interrupts: Should contain UART TX and RX interrupt.
7 - clocks: Should contain UART core clock number.
8 - syscon: Phandle to SYSCON node, which contain UART control bits.
11 - {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD
23 compatible = "cirrus,ep7312-uart","cirrus,ep7209-uart";
28 cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>;
29 dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>;
30 dcd-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>;
|
| D | microchip,pic32-uart.txt | 4 - compatible: Should be "microchip,pic32mzda-uart"
5 - reg: Should contain registers location and length
6 - interrupts: Should contain interrupt
7 - clocks: Phandle to the clock.
8 See: Documentation/devicetree/bindings/clock/clock-bindings.txt
9 - pinctrl-names: A pinctrl state names "default" must be defined.
10 - pinctrl-0: Phandle referencing pin configuration of the UART peripheral.
11 See: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
14 - cts-gpios: CTS pin for UART
18 compatible = "microchip,pic32mzda-uart";
[all …]
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| D | 8250.yaml | 3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: serial.yaml#
14 - if:
16 - required:
17 - aspeed,lpc-io-reg
18 - required:
19 - aspeed,lpc-interrupts
20 - required:
[all …]
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| D | fsl-mxs-auart.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/serial/fsl-mxs-auart.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Fabio Estevam <festevam@gmail.com>
13 - $ref: "serial.yaml"
18 - fsl,imx23-auart
19 - fsl,imx28-auart
20 - alphascale,asm9260-auart
30 - description: DMA controller phandle and request line for RX
[all …]
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| D | 8250_omap.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Vignesh Raghavendra <vigneshr@ti.com>
13 - $ref: /schemas/serial/serial.yaml#
14 - $ref: /schemas/serial/rs485.yaml#
19 - enum:
20 - ti,am3352-uart
21 - ti,am4372-uart
22 - ti,am654-uart
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/freescale/ |
| D | imx8mm-venice-gw72xx-0x-rs232-rts.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW72xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw72xx-0x";
24 gpio-hog;
[all …]
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| D | imx8mm-venice-gw73xx-0x-rs232-rts.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
5 * GW73xx RS232 with RTS/CTS hardware flow control:
6 * - GPIO4_0 rs485_en needs to be driven low (in-active)
7 * - UART4_TX becomes RTS
8 * - UART4_RX becomes CTS
11 #include <dt-bindings/gpio/gpio.h>
13 #include "imx8mm-pinfunc.h"
15 /dts-v1/;
19 compatible = "gw,imx8mm-gw73xx-0x";
24 gpio-hog;
[all …]
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| D | imx8mm-venice-gw7902.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
27 stdout-path = &uart2;
36 compatible = "fixed-clock";
[all …]
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| D | imx8mm-venice-gw7901.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
30 stdout-path = &uart2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/net/ |
| D | intel,ixp4xx-hss.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/net/intel,ixp4xx-hss.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Linus Walleij <linus.walleij@linaro.org>
20 const: intel,ixp4xx-hss
26 intel,npe-handle:
27 $ref: '/schemas/types.yaml#/definitions/phandle-array'
30 - description: phandle to the NPE this HSS instance is using
31 - description: the NPE instance number
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/pinctrl/ |
| D | marvell,dove-pinctrl.txt | 3 Please refer to marvell,mvebu-pinctrl.txt in this directory for common binding
7 - compatible: "marvell,dove-pinctrl"
8 - clocks: (optional) phandle of pdma clock
9 - reg: register specifiers of MPP, MPP4, and PMU MPP registers
19 mpp1 1 gpio, pmu, uart2(cts), sdio0(wp), lcd1(pwm), pmu*
23 uart1(cts), lcd-spi(cs1), pmu*
25 mpp5 5 gpio, pmu, uart3(cts), sdio1(wp), spi1(cs), pmu*
31 mpp11 11 gpio, pmu, sata(prsnt), sata-1(act), sdio0(ledctrl),
35 mpp13 13 gpio, pmu, uart2(cts), audio1(extclk), sdio1(wp),
39 mpp16 16 gpio, uart3(rts), sdio0(cd), ac97(sdi1), lcd-spi(cs1)
[all …]
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| D | img,pistachio-pinctrl.txt | 7 configured as GPIOs. The 90 GPIOs are divided into 6 banks of up to 16 GPIOs
8 each. The GPIO banks are represented as sub-nodes of the pad controller node.
10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and
11 ../interrupt-controller/interrupts.txt for generic information regarding
15 --------------------------------------------
16 - compatible: "img,pistachio-system-pinctrl".
17 - reg: Address range of the pinctrl registers.
19 Required properties for GPIO bank sub-nodes:
20 --------------------------------------------
21 - interrupts: Interrupt line for the GPIO bank.
[all …]
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| /Linux-v6.1/arch/mips/boot/dts/ralink/ |
| D | gardena_smart_gateway_mt7688.dts | 1 // SPDX-License-Identifier: GPL-2.0
6 /dts-v1/;
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
14 compatible = "gardena,smart-gateway-mt7688", "ralink,mt7688a-soc",
15 "ralink,mt7628a-soc";
23 gpio-keys {
24 compatible = "gpio-keys";
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinmux_gpio_gpio>; /* GPIO11 */
[all …]
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| /Linux-v6.1/arch/arm64/boot/dts/allwinner/ |
| D | sun50i-a64-orangepi-win.dts | 1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 // Copyright (C) 2017-2018 Samuel Holland <samuel@sholland.org>
5 /dts-v1/;
7 #include "sun50i-a64.dtsi"
8 #include "sun50i-a64-cpu-opp.dtsi"
10 #include <dt-bindings/gpio/gpio.h>
14 compatible = "xunlong,orangepi-win", "allwinner,sun50i-a64";
26 stdout-path = "serial0:115200n8";
29 hdmi-connector {
30 compatible = "hdmi-connector";
[all …]
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| /Linux-v6.1/drivers/tty/serial/ |
| D | serial_mctrl_gpio.c | 1 // SPDX-License-Identifier: GPL-2.0+
32 { "cts", TIOCM_CTS, GPIOD_IN, },
46 * mctrl_gpio_set - set gpios according to mctrl state
47 * @gpios: gpios to set
50 * Set the gpios according to the mctrl state.
52 void mctrl_gpio_set(struct mctrl_gpios *gpios, unsigned int mctrl) in mctrl_gpio_set() argument
59 if (gpios == NULL) in mctrl_gpio_set()
63 if (gpios->gpio[i] && mctrl_gpio_flags_is_dir_out(i)) { in mctrl_gpio_set()
64 desc_array[count] = gpios->gpio[i]; in mctrl_gpio_set()
74 * mctrl_gpio_to_gpiod - obtain gpio_desc of modem line index
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/soc/fsl/cpm_qe/ |
| D | serial.txt | 4 - fsl,cpm1-smc-uart
5 - fsl,cpm2-smc-uart
6 - fsl,cpm1-scc-uart
7 - fsl,cpm2-scc-uart
8 - fsl,qe-uart
10 Modem control lines connected to GPIO controllers are listed in the gpios
11 property as described in booting-without-of.txt, section IX.1 in the following
14 CTS, RTS, DCD, DSR, DTR, and RI.
16 The gpios property is optional and can be left out when control lines are
23 compatible = "fsl,mpc8272-scc-uart",
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/gnss/ |
| D | brcm,bcm4751.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Johan Hovold <johan@kernel.org>
11 - Linus Walleij <linus.walleij@linaro.org>
15 bus requires CTS/RTS support. The number of the capsule is more
20 - $ref: gnss-common.yaml#
25 - brcm,bcm4751
26 - brcm,bcm4752
27 - brcm,bcm4753
[all …]
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| /Linux-v6.1/Documentation/devicetree/bindings/firmware/ |
| D | intel,ixp4xx-network-processing-engine.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 ---
5 $id: "http://devicetree.org/schemas/firmware/intel,ixp4xx-network-processing-engine.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
11 - Linus Walleij <linus.walleij@linaro.org>
24 - items:
25 - const: intel,ixp4xx-network-processing-engine
29 - description: NPE0 (NPE-A) register range
30 - description: NPE1 (NPE-B) register range
31 - description: NPE2 (NPE-C) register range
[all …]
|
