| /Linux-v5.4/Documentation/devicetree/bindings/pinctrl/ | 
| D | lantiq,pinctrl-xway.txt | 50     exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1, 51     ebu wait, nand ale, nand cs1, nand cle, spi, spi_cs1, spi_cs2, spi_cs3, 62     ebu clk, ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, 82     exin0, exin1, exin2, jtag, ebu a23, ebu a24, ebu a25, ebu clk, ebu cs1, 83     ebu wait, nand ale, nand cs1, nand cle, spi_di, spi_do, spi_clk, spi_cs1, 94     ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd, 106     ebu cs1, ebu wait, nand ale, nand cs1, nand cle, nand rdy, nand rd, 120     exin0, exin1, exin2, exin4, nand ale, nand cs0, nand cs1, nand cle,
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| D | marvell,armada-370-pinctrl.txt | 27 mpp11         11       gpio, ge0(rxd0), uart1(rxd), sd0(cmd), spi0(cs1), 28                        sata1(prsnt), spi1(cs1) 70                        spi0(cs1) 80 mpp55         55       gpio, dev(cs1), uart1(txd), tdm(rst), sata1(prsnt), 83                        pcie(clkreq0), spi1(cs1) 95 mpp64         64       gpio, spi0(miso), spi0(cs1)
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| D | marvell,armada-38x-pinctrl.txt | 30 mpp12         12       gpio, ge0(rxd0), pcie0(rstout), spi0(cs1), dev(ad14), pcie3(clkreq) 39 mpp21         21       gpio, spi0(cs1), ge1(rxd0), sata0(prsnt), sd0(cmd), dev(bootcs), sata1(prsnt) 44 mpp26         26       gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1) 73 mpp55         55       gpio, ua1(cts), ge(mdio), pcie1(clkreq) [1], spi1(cs1), sd0(d0), ua1(rxd)
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| D | marvell,armada-375-pinctrl.txt | 16 mpp0          0        gpio, dev(ad2), spi0(cs1), spi1(cs1) 51 mpp35        35        gpio, ge1(rxctl), spi1(cs1), spi0(cs2)
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| D | marvell,armada-98dx3236-pinctrl.txt | 18 mpp4          4        gpio, spi0(cs1), smi(mdc), dev(cs0) 46 mpp32         32       gpio, slv_smi(mdio), smi(mdio), dev(cs1)
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| D | marvell,armada-39x-pinctrl.txt | 39 mpp21	21	gpio, spi0(cs1), sata0(prsnt) [1], sd0(cmd), dev(bootcs), 45 mpp26	26	gpio, spi0(cs2), i2c1(sck), sd0(d6), dev(cs1) 77 mpp55	55	gpio, ua1(cts), spi1(cs1), sd0(d0), ua1(rxd), ua3(rxd)
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| /Linux-v5.4/drivers/ata/ | 
| D | pata_ixp4xx_cf.c | 104 	ioaddr->altstatus_addr	= data->cs1 + 0x06;  in ixp4xx_setup_port() 105 	ioaddr->ctl_addr	= data->cs1 + 0x06;  in ixp4xx_setup_port() 139 	struct resource *cs0, *cs1;  in ixp4xx_pata_probe()  local 146 	cs1 = platform_get_resource(pdev, IORESOURCE_MEM, 1);  in ixp4xx_pata_probe() 148 	if (!cs0 || !cs1)  in ixp4xx_pata_probe() 162 	data->cs1 = devm_ioremap(&pdev->dev, cs1->start, 0x1000);  in ixp4xx_pata_probe() 164 	if (!data->cs0 || !data->cs1)  in ixp4xx_pata_probe() 181 	ixp4xx_setup_port(ap, data, cs0->start, cs1->start);  in ixp4xx_pata_probe()
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| /Linux-v5.4/arch/mips/pnx833x/stb22x/ | 
| D | board.c | 84 	 * (it seems that we must also configure CS1 for reliable operation,  in pnx833x_board_setup() 89 	/* Setup MIU CS0 & CS1 timing */  in pnx833x_board_setup() 95 	/* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */  in pnx833x_board_setup() 109 	/* Set up MIU for 16-bit NOR access on CS0 and CS1... */  in pnx833x_board_setup() 111 	/* Setup MIU CS0 & CS1 timing */  in pnx833x_board_setup() 117 	/* Setup GPIO 00 for use as MIU CS1 (CS0 is not multiplexed, so does not need this) */  in pnx833x_board_setup()
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| /Linux-v5.4/Documentation/ABI/testing/ | 
| D | sysfs-class-watchdog | 91 				chip at CS1. 93 				from (CS0->CS1, CS1->CS0) to (CS0->CS0, 94 				CS1->CS1). 100 		For alternate boot mode (booted from CS1 due to wdt2
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| /Linux-v5.4/Documentation/devicetree/bindings/memory-controllers/ti/ | 
| D | emif.txt | 39 - cs1-used		: Have this property if CS1 of this EMIF 41   part attached to CS1, it should be the same type as the one on CS0, 66 	cs1-used;
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| /Linux-v5.4/arch/sh/boards/ | 
| D | board-urquell.c | 35  *                    CS1 : SRAM, registers, LAN, PCMCIA 40  * 0x04000000 - 0x04200000  (CS1)     SRAM 41  * 0x05000000 - 0x05800000  (CS1)     on board register 42  * 0x05800000 - 0x06000000  (CS1)     LAN91C111 43  * 0x06000000 - 0x06400000  (CS1)     PCMCIA
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| /Linux-v5.4/drivers/staging/fbtft/ | 
| D | fb_agm1264k-fl.c | 33 #define CS1			gpio.aux[1]  macro 119 	if (!par->CS1) {  in verify_gpios() 121 			"Missing info about 'cs1' gpio. Aborting.\n");  in verify_gpios() 147 	} else if (strcasecmp(gpio->name, "cs1") == 0) {  in request_gpios_match() 149 		par->CS1 = gpio->gpio;  in request_gpios_match() 196 		/* cs1 */  in write_reg8_bus8() 198 		gpiod_set_value(par->CS1, 0);  in write_reg8_bus8() 202 		gpiod_set_value(par->CS1, 1);  in write_reg8_bus8() 401 	gpiod_set_value(par->CS1, 1);  in write_vmem()
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| /Linux-v5.4/arch/hexagon/kernel/ | 
| D | ptrace.c | 82 	ONEXT(®s->cs1, cs1);  in genregs_get() 133 	INEXT(®s->cs1, cs1);  in genregs_set()
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| D | signal.c | 56 	err |= __put_user(regs->cs1, &sc->sc_regs.cs1);  in setup_sigcontext() 86 	err |= __get_user(regs->cs1, &sc->sc_regs.cs1);  in restore_sigcontext()
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| /Linux-v5.4/drivers/watchdog/ | 
| D | aspeed_wdt.c | 205  *            after booting from the alternate chip at CS1. 207  *            (CS0->CS1, CS1->CS0) to (CS0->CS0, CS1->CS1). 212  * both versions of the SoC. For alternate boot mode (booted from CS1 due to
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| /Linux-v5.4/arch/arm/mach-ep93xx/ | 
| D | micro9.c | 26  * Micro9-High has up to 64MB of 32-bit flash on CS1 27  * Micro9-Mid has up to 64MB of either 32-bit or 16-bit flash on CS1 29  * Micro9-Slim has up to 64MB of either 32-bit or 16-bit flash on CS1
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| /Linux-v5.4/drivers/bus/ | 
| D | imx-weim.c | 86 		05,	/* CS0(128M) CS1(0M)  CS2(0M)  CS3(0M)  */  in imx_weim_gpr_setup() 87 		033,	/* CS0(64M)  CS1(64M) CS2(0M)  CS3(0M)  */  in imx_weim_gpr_setup() 88 		0113,	/* CS0(64M)  CS1(32M) CS2(32M) CS3(0M)  */  in imx_weim_gpr_setup() 89 		01111,	/* CS0(32M)  CS1(32M) CS2(32M) CS3(32M) */  in imx_weim_gpr_setup()
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| /Linux-v5.4/arch/arm/mach-s3c64xx/ | 
| D | mach-real6410.c | 284 	u32 cs1;  in real6410_machine_init()  local 303 	cs1 = __raw_readl(S3C64XX_SROM_BW) &  in real6410_machine_init() 305 	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |  in real6410_machine_init() 309 	__raw_writel(cs1, S3C64XX_SROM_BW);  in real6410_machine_init()
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| D | mach-mini6410.c | 314 	u32 cs1;  in mini6410_machine_init()  local 334 	cs1 = __raw_readl(S3C64XX_SROM_BW) &  in mini6410_machine_init() 336 	cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) |  in mini6410_machine_init() 340 	__raw_writel(cs1, S3C64XX_SROM_BW);  in mini6410_machine_init()
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| /Linux-v5.4/arch/mips/boot/dts/ingenic/ | 
| D | ci20.dts | 218 	pins_nemc_cs1: nemc-cs1 { 219 		function = "nemc-cs1"; 220 		groups = "nemc-cs1";
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| /Linux-v5.4/arch/sh/include/mach-common/mach/ | 
| D | sh7785lcr.h | 12  * 0x04000000 - 0x05ffffff(CS1)	| PLD		| PLD 13  * 0x06000000 - 0x07ffffff(CS1)	| I2C		| I2C
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| /Linux-v5.4/drivers/pinctrl/mvebu/ | 
| D | pinctrl-armada-370.c | 79 	   MPP_FUNCTION(0x4, "spi0", "cs1"), 81 	   MPP_FUNCTION(0x6, "spi1", "cs1")), 256 	   MPP_FUNCTION(0x5, "spi0", "cs1")), 296 	   MPP_FUNCTION(0x1, "dev", "cs1"), 308 	   MPP_FUNCTION(0x6, "spi1", "cs1")), 356 	   MPP_FUNCTION(0x2, "spi0", "cs1")),
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| /Linux-v5.4/arch/arm/mach-omap2/ | 
| D | sram243x.S | 33 	mov	r12, r2			@ capture CS1 vs CS0 48 	cmp	r12, #0x1		@ cs1 base (2422 es2.05/1) 49 	addeq	r11, r11, #0x8		@ if cs1 base, move to DLLB 71 	cmp	r12, #0x1		@ normalize if cs1 based
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| D | sram242x.S | 33 	mov	r12, r2			@ capture CS1 vs CS0 48 	cmp	r12, #0x1		@ cs1 base (2422 es2.05/1) 49 	addeq	r11, r11, #0x8		@ if cs1 base, move to DLLB 71 	cmp	r12, #0x1		@ normalize if cs1 based
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| /Linux-v5.4/drivers/pinctrl/ | 
| D | pinctrl-xway.c | 247 	GRP_MUX("ebu cs1", EBU, pins_ebu_cs1), 250 	GRP_MUX("nand cs1", EBU, pins_nand_cs1), 303 						"ebu a25", "ebu cs1", 305 						"nand ale", "nand cs1", 320 						"ebu a25", "ebu cs1", 322 						"nand ale", "nand cs1", 576 	GRP_MUX("ebu cs1", EBU, danube_pins_ebu_cs1), 579 	GRP_MUX("nand cs1", EBU, danube_pins_nand_cs1), 624 						"ebu a25", "ebu cs1", 626 						"nand ale", "nand cs1", [all …] 
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