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/Linux-v5.4/Documentation/devicetree/bindings/spi/
Dbrcm,bcm2835-aux-spi.txt8 - compatible: Should be "brcm,bcm2835-aux-spi".
9 - reg: Should contain register location and length for the spi block
10 - interrupts: Should contain shared interrupt of the aux block
11 - clocks: The clock feeding the SPI controller - needs to
15 - cs-gpios: the cs-gpios (native cs is NOT supported)
16 see also spi-bus.txt
21 compatible = "brcm,bcm2835-aux-spi";
25 #address-cells = <1>;
26 #size-cells = <0>;
27 cs-gpios = <&gpio 18>, <&gpio 17>, <&gpio 16>;
[all …]
Dspi-controller.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-controller.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Mark Brown <broonie@kernel.org>
20 pattern: "^spi(@.*|-[0-9a-f])*$"
22 "#address-cells":
25 "#size-cells":
28 cs-gpios:
30 GPIOs used as chip selects.
[all …]
Dspi-gpio.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/spi/spi-gpio.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: SPI-GPIO devicetree bindings
10 - Rob Herring <robh@kernel.org>
13 This represents a group of 3-n GPIO lines used for bit-banged SPI on
17 - $ref: "/schemas/spi/spi-controller.yaml#"
21 const: spi-gpio
23 sck-gpios:
[all …]
Dspi-dw.txt4 - compatible: should be "snps,designware-spi"
5 - #address-cells: see spi-bus.txt
6 - #size-cells: see spi-bus.txt
7 - reg: address and length of the spi master registers
8 - interrupts: should contain one interrupt
9 - clocks: spi clock phandle
10 - num-cs: see spi-bus.txt
13 - cs-gpios: see spi-bus.txt
18 compatible = "snps,designware-spi";
22 num-cs = <2>;
[all …]
Dspi-samsung.txt8 - compatible: should be one of the following.
9 - samsung,s3c2443-spi: for s3c2443, s3c2416 and s3c2450 platforms
10 - samsung,s3c6410-spi: for s3c6410 platforms
11 - samsung,s5pv210-spi: for s5pv210 and s5pc110 platforms
12 - samsung,exynos5433-spi: for exynos5433 compatible controllers
13 - samsung,exynos7-spi: for exynos7 platforms <DEPRECATED>
15 - reg: physical base address of the controller and length of memory mapped
18 - interrupts: The interrupt number to the cpu. The interrupt specifier format
21 - dmas : Two or more DMA channel specifiers following the convention outlined
24 - dma-names: Names for the dma channels. There must be at least one channel
[all …]
Dsnps,dw-apb-ssi.txt4 - compatible : "snps,dw-apb-ssi" or "mscc,<soc>-spi", where soc is "ocelot" or
5 "jaguar2", or "amazon,alpine-dw-apb-ssi"
6 - reg : The register base for the controller. For "mscc,<soc>-spi", a second
8 - interrupts : One interrupt, used by the controller.
9 - #address-cells : <1>, as required by generic SPI binding.
10 - #size-cells : <0>, also as required by generic SPI binding.
11 - clocks : phandles for the clocks, see the description of clock-names below.
13 is optional. If a single clock is specified but no clock-name, it is the
17 - clock-names : Contains the names of the clocks:
20 - cs-gpios : Specifies the gpio pins to be used for chipselects.
[all …]
Dspi_atmel.txt4 - compatible : should be "atmel,at91rm9200-spi".
5 - reg: Address and length of the register set for the device
6 - interrupts: Should contain spi interrupt
7 - cs-gpios: chipselects (optional for SPI controller version >= 2 with the
9 - clock-names: tuple listing input clock names.
11 - clocks: phandles to input clocks.
14 - atmel,fifo-size: maximum number of data the RX and TX FIFOs can store for FIFO
20 compatible = "atmel,at91rm9200-spi";
23 #address-cells = <1>;
24 #size-cells = <0>;
[all …]
Dfsl-imx-cspi.txt5 - compatible :
6 - "fsl,imx1-cspi" for SPI compatible with the one integrated on i.MX1
7 - "fsl,imx21-cspi" for SPI compatible with the one integrated on i.MX21
8 - "fsl,imx27-cspi" for SPI compatible with the one integrated on i.MX27
9 - "fsl,imx31-cspi" for SPI compatible with the one integrated on i.MX31
10 - "fsl,imx35-cspi" for SPI compatible with the one integrated on i.MX35
11 - "fsl,imx51-ecspi" for SPI compatible with the one integrated on i.MX51
12 - "fsl,imx53-ecspi" for SPI compatible with the one integrated on i.MX53 and later Soc
13 - "fsl,imx8mq-ecspi" for SPI compatible with the one integrated on i.MX8M
14 - reg : Offset and length of the register set for the device
[all …]
Dspi-davinci.txt4 Keystone 2 - http://www.ti.com/lit/ug/sprugp2a/sprugp2a.pdf
5 dm644x - http://www.ti.com/lit/ug/sprue32a/sprue32a.pdf
6 OMAP-L138/da830 - http://www.ti.com/lit/ug/spruh77a/spruh77a.pdf
9 - #address-cells: number of cells required to define a chip select
11 - #size-cells: should be zero.
12 - compatible:
13 - "ti,dm6441-spi" for SPI used similar to that on DM644x SoC family
14 - "ti,da830-spi" for SPI used similar to that on DA8xx SoC family
15 - "ti,keystone-spi" for SPI used similar to that on Keystone2 SoC
17 - reg: Offset and length of SPI controller register space
[all …]
Dqcom,spi-qup.txt4 and an input FIFO) for serial peripheral interface (SPI) mini-core.
10 - compatible: Should contain:
11 "qcom,spi-qup-v1.1.1" for 8660, 8960 and 8064.
12 "qcom,spi-qup-v2.1.1" for 8974 and later
13 "qcom,spi-qup-v2.2.1" for 8974 v2 and later.
15 - reg: Should contain base register location and length
16 - interrupts: Interrupt number used by this controller
18 - clocks: Should contain the core clock and the AHB clock.
19 - clock-names: Should be "core" for the core clock and "iface" for the
22 - #address-cells: Number of cells required to define a chip select
[all …]
/Linux-v5.4/drivers/spi/
Dspi-ppc4xx.c1 // SPDX-License-Identifier: GPL-2.0-only
41 #include <asm/dcr-regs.h>
43 /* bits in mode register - bit 0 is MSb */
56 * SPI_PPC4XX_MODE_RD = 0 means "MSB first" - this is the normal mode
57 * SPI_PPC4XX_MODE_RD = 1 means "LSB first" - this is bit-reversed mode
105 * CDM = (OPBCLK/4*SCPClkOut) - 1
130 int *gpios; member
147 dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", in spi_ppc4xx_txrx()
148 t->tx_buf, t->rx_buf, t->len); in spi_ppc4xx_txrx()
150 hw = spi_master_get_devdata(spi->master); in spi_ppc4xx_txrx()
[all …]
/Linux-v5.4/drivers/gpio/
Dgpiolib-of.c1 // SPDX-License-Identifier: GPL-2.0+
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
24 #include "gpiolib-of.h"
40 snprintf(propname, sizeof(propname), "%s-%s", in of_gpio_get_count()
46 ret = of_gpio_named_count(dev->of_node, propname); in of_gpio_get_count()
50 return ret ? ret : -ENOENT; in of_gpio_get_count()
57 return chip->gpiodev->dev.of_node == gpiospec->np && in of_gpiochip_match_node_and_xlate()
58 chip->of_xlate && in of_gpiochip_match_node_and_xlate()
59 chip->of_xlate(chip, gpiospec, NULL) >= 0; in of_gpiochip_match_node_and_xlate()
74 if (chip->of_gpio_n_cells != gpiospec->args_count) in of_xlate_and_get_gpiod_flags()
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/gpio/
Dspear_spics.txt1 === ST Microelectronics SPEAr SPI CS Driver ===
10 Chipselects can be controlled by software by turning them as GPIOs. SPEAr
17 * compatible: should be defined as "st,spear-spics-gpio"
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
[all …]
/Linux-v5.4/arch/arm/boot/dts/
Dkeystone-k2hk-evm.dts1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2013-2017 Texas Instruments Incorporated - http://www.ti.com/
7 /dts-v1/;
10 #include "keystone-k2hk.dtsi"
13 compatible = "ti,k2hk-evm", "ti,k2hk", "ti,keystone";
16 reserved-memory {
17 #address-cells = <2>;
18 #size-cells = <2>;
21 dsp_common_memory: dsp-common-memory@81f800000 {
22 compatible = "shared-dma-pool";
[all …]
Dimx6qdl-rex.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/input.h>
13 stdout-path = &uart1;
17 compatible = "simple-bus";
18 #address-cells = <1>;
19 #size-cells = <0>;
22 compatible = "regulator-fixed";
24 regulator-name = "3P3V";
25 regulator-min-microvolt = <3300000>;
[all …]
Dimx31-lite.dts1 // SPDX-License-Identifier: GPL-2.0+
3 // Copyright (C) 2016-2018 Vladimir Zapolskiy <vz@mleia.com>
5 /dts-v1/;
9 #include <dt-bindings/gpio/gpio.h>
10 #include <dt-bindings/interrupt-controller/irq.h>
14 compatible = "logicpd,imx31-lite", "fsl,imx31";
17 stdout-path = &uart1;
26 compatible = "gpio-leds";
29 gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
33 gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
[all …]
Domap3-devkit8000-common.dtsi1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <dt-bindings/input/input.h>
16 compatible = "gpio-leds";
20 gpios = <&gpio6 26 GPIO_ACTIVE_HIGH>; /* 186 -> LED1 */
21 default-state = "on";
22 linux,default-trigger = "heartbeat";
27 gpios = <&gpio6 3 GPIO_ACTIVE_HIGH>; /* 163 -> LED2 */
28 default-state = "on";
29 linux,default-trigger = "none";
34 gpios = <&gpio6 4 GPIO_ACTIVE_HIGH>; /* 164 -> LED3 */
[all …]
Dimx6q-evi.dts4 * This file is dual-licensed: you can use it either under the terms
44 /dts-v1/;
46 #include <dt-bindings/gpio/gpio.h>
47 #include <dt-bindings/interrupt-controller/irq.h>
51 compatible = "uniwest,imx6q-evi", "fsl,imx6q";
58 reg_usbh1_vbus: regulator-usbhubreset {
59 compatible = "regulator-fixed";
60 regulator-name = "usbh1_vbus";
61 regulator-min-microvolt = <5000000>;
62 regulator-max-microvolt = <5000000>;
[all …]
Defm32gg-dk3750.dts1 // SPDX-License-Identifier: GPL-2.0
3 * Device tree for EFM32GG-DK3750 development board.
6 * http://www.silabs.com/Support%20Documents/TechnicalDocs/efm32gg-dk3750-ug.pdf
9 /dts-v1/;
47 cs-gpios = <&gpio 68 1>; // E4
52 compatible = "mmc-spi-slot";
53 spi-max-frequency = <100000>;
54 voltage-ranges = <3200 3400>;
55 broken-cd;
61 cs-gpios = <&gpio 51 1>; // D3
[all …]
Dpxa300-raumfeld-common.dtsi1 // SPDX-License-Identifier: GPL-2.0
4 #include <dt-bindings/gpio/gpio.h>
5 #include <dt-bindings/input/input.h>
6 #include <dt-bindings/interrupt-controller/irq.h>
10 hw-revision = <0>;
14 stdout-path = &ffuart;
22 reg_3v3: regulator-3v3 {
23 compatible = "regulator-fixed";
24 regulator-name = "3v3-fixed-supply";
25 regulator-min-microvolt = <3300000>;
[all …]
Dusb_a9263.dts1 // SPDX-License-Identifier: GPL-2.0-only
3 * usb_a9263.dts - Device Tree file for Caloa USB A9293 board
5 * Copyright (C) 2012 Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
7 /dts-v1/;
12 compatible = "atmel,usb-a9263", "atmel,at91sam9263", "atmel,at91sam9";
24 clock-frequency = <32768>;
28 clock-frequency = <12000000>;
40 compatible = "atmel,tcb-timer";
45 compatible = "atmel,tcb-timer";
51 phy-mode = "rmii";
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/mfd/
Datmel-usart.txt4 - compatible: Should be "atmel,<chip>-usart" or "atmel,<chip>-dbgu"
7 For the dbgu UART, use "atmel,<chip>-dbgu", "atmel,<chip>-usart"
8 - reg: Should contain registers location and length
9 - interrupts: Should contain interrupt
10 - clock-names: tuple listing input clock names.
12 - clocks: phandles to input clocks.
15 - #size-cells : Must be <0>
16 - #address-cells : Must be <1>
17 - cs-gpios: chipselects (internal cs not supported)
18 - atmel,usart-mode : Must be <AT91_USART_MODE_SPI> (found in dt-bindings/mfd/at91-usart.h)
[all …]
/Linux-v5.4/arch/powerpc/boot/dts/
Dac14xx.dts1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #address-cells = <1>;
15 #size-cells = <1>;
26 timebase-frequency = <40000000>; /* 40 MHz (csb/4) */
27 bus-frequency = <160000000>; /* 160 MHz csb bus */
28 clock-frequency = <400000000>; /* 400 MHz ppc core */
49 compatible = "cfi-flash";
51 #address-cells = <1>;
52 #size-cells = <1>;
53 bank-width = <2>;
[all …]
/Linux-v5.4/Documentation/devicetree/bindings/mtd/
Datmel-nand.txt4 Documentation/devicetree/bindings/memory-controllers/atmel,ebi.txt).
11 - compatible: should be one of the following
12 "atmel,at91rm9200-nand-controller"
13 "atmel,at91sam9260-nand-controller"
14 "atmel,at91sam9261-nand-controller"
15 "atmel,at91sam9g45-nand-controller"
16 "atmel,sama5d3-nand-controller"
17 "microchip,sam9x60-nand-controller"
18 - ranges: empty ranges property to forward EBI ranges definitions.
19 - #address-cells: should be set to 2.
[all …]
Dfsl-upm-nand.txt4 - compatible : "fsl,upm-nand".
5 - reg : should specify localbus chip select and size used for the chip.
6 - fsl,upm-addr-offset : UPM pattern offset for the address latch.
7 - fsl,upm-cmd-offset : UPM pattern offset for the command latch.
10 - fsl,upm-wait-flags : add chip-dependent short delays after running the
13 - fsl,upm-addr-line-cs-offsets : address offsets for multi-chip support.
15 - gpios : may specify optional GPIOs connected to the Ready-Not-Busy pins
16 (R/B#). For multi-chip devices, "n" GPIO definitions are required
18 - chip-delay : chip dependent delay for transferring data from array to
19 read registers (tR). Required if property "gpios" is not used
[all …]

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