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/Linux-v6.1/Documentation/devicetree/bindings/pci/
Dpci.txt3 PCI Bus Binding to: IEEE Std 1275-1994
4 https://www.devicetree.org/open-firmware/bindings/pci/pci2_1.pdf
9 https://www.devicetree.org/open-firmware/practice/imap/imap0_9d.pdf
14 - linux,pci-domain:
21 - max-link-speed:
24 unsupported link speed, for instance, trying to do training for
25 unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2'
27 - reset-gpios:
30 - supports-clkreq:
31 If present this property specifies that CLKREQ signal routing exists from
[all …]
/Linux-v6.1/Documentation/devicetree/bindings/phy/
Dfsl,imx8-pcie-phy.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/fsl,imx8-pcie-phy.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Richard Zhu <hongxing.zhu@nxp.com>
13 "#phy-cells":
18 - fsl,imx8mm-pcie-phy
26 clock-names:
28 - const: ref
33 reset-names:
[all …]
/Linux-v6.1/drivers/phy/freescale/
Dphy-fsl-imx8m-pcie.c1 // SPDX-License-Identifier: GPL-2.0+
12 #include <linux/mfd/syscon/imx7-iomuxc-gpr.h>
19 #include <dt-bindings/phy/phy-imx8-pcie.h>
68 reset_control_assert(imx8_phy->reset); in imx8_pcie_phy_power_on()
70 pad_mode = imx8_phy->refclk_pad_mode; in imx8_pcie_phy_power_on()
71 /* Set AUX_EN_OVERRIDE 1'b0, when the CLKREQ# isn't hooked */ in imx8_pcie_phy_power_on()
72 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
74 imx8_phy->clkreq_unused ? in imx8_pcie_phy_power_on()
76 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
79 regmap_update_bits(imx8_phy->iomuxc_gpr, IOMUXC_GPR14, in imx8_pcie_phy_power_on()
[all …]
/Linux-v6.1/arch/arm64/boot/dts/freescale/
Dimx8mm-venice-gw71xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
16 led-controller {
17 compatible = "gpio-leds";
18 pinctrl-names = "default";
19 pinctrl-0 = <&pinctrl_gpio_leds>;
21 led-0 {
25 default-state = "on";
[all …]
Dimx8mm-venice-gw72xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 led-controller {
18 compatible = "gpio-leds";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
26 default-state = "on";
[all …]
Dimx8mm-tqma8mqml.dtsi1 // SPDX-License-Identifier: (GPL-2.0-or-later OR MIT)
3 * Copyright 2020-2021 TQ-Systems GmbH
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 model = "TQ-Systems GmbH i.MX8MM TQMa8MxML";
11 compatible = "tq,imx8mm-tqma8mqml", "fsl,imx8mm";
19 /* e-MMC IO, needed for HS modes */
20 reg_vcc1v8: regulator-vcc1v8 {
21 compatible = "regulator-fixed";
22 regulator-name = "TQMA8MXML_VCC1V8";
23 regulator-min-microvolt = <1800000>;
[all …]
Dimx8mm-phyboard-polis-rdk.dts1 // SPDX-License-Identifier: GPL-2.0
7 /dts-v1/;
9 #include <dt-bindings/interrupt-controller/irq.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
12 #include "imx8mm-phycore-som.dtsi"
15 model = "PHYTEC phyBOARD-Polis-i.MX8MM RDK";
16 compatible = "phytec,imx8mm-phyboard-polis-rdk",
17 "phytec,imx8mm-phycore-som", "fsl,imx8mm";
20 stdout-path = &uart3;
[all …]
Dimx8mm-beacon-baseboard.dtsi1 // SPDX-License-Identifier: (GPL-2.0 OR MIT)
6 #include <dt-bindings/phy/phy-imx8-pcie.h>
10 compatible = "gpio-leds";
15 default-state = "off";
21 default-state = "off";
27 default-state = "off";
31 pinctrl-names = "default";
32 pinctrl-0 = <&pinctrl_led3>;
35 linux,default-trigger = "heartbeat";
39 pcie0_refclk: pcie0-refclk {
[all …]
Dimx8mm-venice-gw73xx.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/gpio/gpio.h>
7 #include <dt-bindings/leds/common.h>
8 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 led-controller {
18 compatible = "gpio-leds";
19 pinctrl-names = "default";
20 pinctrl-0 = <&pinctrl_gpio_leds>;
22 led-0 {
26 default-state = "on";
[all …]
Dimx8mm-venice-gw7904.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gateworks,imx8mm-gw7904", "fsl,imx8mm";
20 stdout-path = &uart2;
28 gpio-keys {
29 compatible = "gpio-keys";
[all …]
Dimx8mm-venice-gw7903.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7903", "fsl,imx8mm";
25 stdout-path = &uart2;
33 gpio-keys {
34 compatible = "gpio-keys";
[all …]
Dimx8mm-data-modul-edm-sbc.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/net/qca-ar803x.h>
9 #include <dt-bindings/phy/phy-imx8-pcie.h>
14 compatible = "dmo,imx8mm-data-modul-edm-sbc", "fsl,imx8mm";
22 stdout-path = &uart3;
32 compatible = "pwm-backlight";
33 pinctrl-names = "default";
34 pinctrl-0 = <&pinctrl_panel_backlight>;
35 brightness-levels = <0 1 10 20 30 40 50 60 70 75 80 90 100>;
[all …]
Dimx8mm-venice-gw7901.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gw,imx8mm-gw7901", "fsl,imx8mm";
30 stdout-path = &uart2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
Dimx8mm-venice-gw7902.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/net/ti-dp83867.h>
12 #include <dt-bindings/phy/phy-imx8-pcie.h>
18 compatible = "gw,imx8mm-gw7902", "fsl,imx8mm";
27 stdout-path = &uart2;
36 compatible = "fixed-clock";
[all …]
Dimx8mp-venice-gw74xx.dts1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 /dts-v1/;
8 #include <dt-bindings/gpio/gpio.h>
9 #include <dt-bindings/input/linux-event-codes.h>
10 #include <dt-bindings/leds/common.h>
11 #include <dt-bindings/phy/phy-imx8-pcie.h>
17 compatible = "gateworks,imx8mp-gw74xx", "fsl,imx8mp";
30 stdout-path = &uart2;
38 gpio-keys {
39 compatible = "gpio-keys";
[all …]
Dimx8mm-verdin.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include "dt-bindings/phy/phy-imx8-pcie.h"
7 #include "dt-bindings/pwm/pwm.h"
12 stdout-path = &uart1;
21 compatible = "pwm-backlight";
22 brightness-levels = <0 45 63 88 119 158 203 255>;
23 default-brightness-level = <4>;
25 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
[all …]
/Linux-v6.1/drivers/net/wireless/ath/ath5k/
Dattach.c2 * Copyright (c) 2004-2008 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2008 Nick Kossifidis <mickflemm@gmail.com>
32 * ath5k_hw_post() - Power On Self Test helper function
63 return -EAGAIN; in ath5k_hw_post()
78 return -EAGAIN; in ath5k_hw_post()
96 * ath5k_hw_init() - Check if hw is supported and init the needed structs
100 * structs. Returns -ENOMEM if we don't have memory for the needed structs,
101 * -ENODEV if the device is not supported or prints an error msg if something
108 struct pci_dev *pdev = ah->pdev; in ath5k_hw_init()
116 ah->ah_bwmode = AR5K_BWMODE_DEFAULT; in ath5k_hw_init()
[all …]
/Linux-v6.1/drivers/net/phy/
Ddp83640.c1 // SPDX-License-Identifier: GPL-2.0+
165 static int chosen_phy = -1;
194 index = gpio_tab[CALIBRATE_GPIO] - 1; in dp83640_gpio_defaults()
198 index = gpio_tab[PEROUT_GPIO] - 1; in dp83640_gpio_defaults()
203 index = gpio_tab[i] - 1; in dp83640_gpio_defaults()
205 pd[index].chan = i - EXTTS0_GPIO; in dp83640_gpio_defaults()
222 return mdiobus_write(phydev->mdio.bus, BROADCAST_ADDR, regnum, val); in broadcast_write()
228 struct dp83640_private *dp83640 = phydev->priv; in ext_read()
231 if (dp83640->clock->page != page) { in ext_read()
233 dp83640->clock->page = page; in ext_read()
[all …]
/Linux-v6.1/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
Dmain.h48 * Usage example, e.g. a three-bit field (bits 4-6):
52 * regval = R_REG(osh, &regs->regfoo);
55 * W_REG(osh, &regs->regfoo, regval);
58 (((unsigned)1 << (width)) - 1)
67 /* max # supported core revisions (0 .. MAXCOREREV - 1) */
70 /* Double check that unsupported cores are not enabled */
72 #error "Configuration for D11CONF includes unsupported versions."
76 #define BRCMS_SHORTSLOT_AUTO -1 /* Driver will manage Shortslot setting */
91 #define TXFID_QUEUE_MASK 0x0007 /* Bits 0-2 */
92 #define TXFID_SEQ_MASK 0x7FE0 /* Bits 5-15 */
[all …]
/Linux-v6.1/arch/arm/boot/dts/
Dtegra30-colibri.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 nvidia,ddc-i2c-bus = <&hdmi_ddc>;
16 nvidia,hpd-gpio =
18 pll-supply = <&reg_1v8_avdd_hdmi_pll>;
19 vdd-supply = <&reg_3v3_avdd_hdmi>;
24 pinctrl-names = "default";
25 pinctrl-0 = <&state_default>;
28 /* Analogue Audio (On-module) */
29 clk1-out-pw4 {
34 nvidia,enable-input = <TEGRA_PIN_DISABLE>;
[all …]
Dtegra30-apalis-v1.1.dtsi1 // SPDX-License-Identifier: GPL-2.0 OR MIT
16 avdd-pexa-supply = <&vdd2_reg>;
17 avdd-pexb-supply = <&vdd2_reg>;
18 avdd-pex-pll-supply = <&vdd2_reg>;
19 avdd-plle-supply = <&ldo6_reg>;
20 hvdd-pex-supply = <&reg_module_3v3>;
21 vddio-pex-ctl-supply = <&reg_module_3v3>;
22 vdd-pexa-supply = <&vdd2_reg>;
23 vdd-pexb-supply = <&vdd2_reg>;
27 nvidia,num-lanes = <4>;
[all …]
Dtegra30-apalis.dtsi1 // SPDX-License-Identifier: GPL-2.0
15 avdd-pexa-supply = <&vdd2_reg>;
16 avdd-pexb-supply = <&vdd2_reg>;
17 avdd-pex-pll-supply = <&vdd2_reg>;
18 avdd-plle-supply = <&ldo6_reg>;
19 hvdd-pex-supply = <&reg_module_3v3>;
20 vddio-pex-ctl-supply = <&reg_module_3v3>;
21 vdd-pexa-supply = <&vdd2_reg>;
22 vdd-pexb-supply = <&vdd2_reg>;
26 nvidia,num-lanes = <4>;
[all …]
/Linux-v6.1/include/uapi/linux/
Dpci_regs.h1 /* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */
5 * Copyright 1997--1999 Martin Mares <mj@ucw.cz>
25 * Conventional PCI and PCI-X Mode 1 devices have 256 bytes of
26 * configuration space. PCI-X Mode 2 and PCIe devices have 4096 bytes of
50 #define PCI_COMMAND_FAST_BACK 0x200 /* Enable back-to-back writes */
59 #define PCI_STATUS_FAST_BACK 0x80 /* Accept fast-back to back */
123 /* 0x35-0x3b are reserved */
129 /* Header type 1 (PCI-to-PCI bridges) */
157 /* 0x35-0x3b is reserved */
159 /* 0x3c-0x3d are same as for htype 0 */
[all …]
/Linux-v6.1/drivers/net/wireless/broadcom/brcm80211/brcmfmac/
Dsdio.c1 // SPDX-License-Identifier: ISC
72 __le32 buf; /* Can't be pointer on (64-bit) hosts */
117 #define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
118 #define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
148 /* 1: isolate internal sdio signals, put external pads in tri-state; requires
153 /* Force SD->SB reset mapping (rev 11) */
249 #define SFC_ABORTALL (1 << 3) /* Abort all in-progress frames */
288 * Software-defined protocol header
419 uint fc_rcvd; /* Number of flow-control events received */
420 uint fc_xoff; /* Number which turned on flow-control */
[all …]
/Linux-v6.1/drivers/pci/controller/
Dpcie-brcmstb.c1 // SPDX-License-Identifier: GPL-2.0+
2 /* Copyright (C) 2009 - 2019 Broadcom */
25 #include <linux/pci-ecam.h>
36 /* BRCM_PCIE_CAP_REGS - Offset for the mandatory capability config regs */
149 #define BRCM_INT_PCI_MSI_MASK GENMASK(BRCM_INT_PCI_MSI_NR - 1, 0)
151 32 - BRCM_INT_PCI_MSI_LEGACY_NR)
178 #define IDX_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_INDEX])
179 #define DATA_ADDR(pcie) (pcie->reg_offsets[EXT_CFG_DATA])
180 #define PCIE_RGR1_SW_INIT_1(pcie) (pcie->reg_offsets[RGR1_SW_INIT_1])
270 return pcie->type == BCM7435 || pcie->type == BCM7425; in is_bmips()
[all …]

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