Lines Matching +full:clkreq +full:- +full:unsupported
1 // SPDX-License-Identifier: GPL-2.0-or-later OR MIT
6 #include "dt-bindings/phy/phy-imx8-pcie.h"
7 #include "dt-bindings/pwm/pwm.h"
12 stdout-path = &uart1;
21 compatible = "pwm-backlight";
22 brightness-levels = <0 45 63 88 119 158 203 255>;
23 default-brightness-level = <4>;
25 enable-gpios = <&gpio3 24 GPIO_ACTIVE_HIGH>;
26 pinctrl-names = "default";
27 pinctrl-0 = <&pinctrl_i2s_2_d_out_dsi_1_bkl_en>;
28 power-supply = <®_3p3v>;
36 compatible = "fixed-clock";
37 #clock-cells = <0>;
38 clock-frequency = <40000000>;
41 gpio-keys {
42 compatible = "gpio-keys";
43 pinctrl-names = "default";
44 pinctrl-0 = <&pinctrl_gpio_keys>;
46 key-wakeup {
47 debounce-interval = <10>;
50 label = "Wake-Up";
52 wakeup-source;
56 hdmi_connector: hdmi-connector {
57 compatible = "hdmi-connector";
58 ddc-i2c-bus = <&i2c2>;
64 panel_lvds: panel-lvds {
65 compatible = "panel-lvds";
67 data-mapping = "vesa-24";
72 reg_1p8v: regulator-1p8v {
73 compatible = "regulator-fixed";
74 regulator-max-microvolt = <1800000>;
75 regulator-min-microvolt = <1800000>;
76 regulator-name = "+V1.8_SW";
79 reg_3p3v: regulator-3p3v {
80 compatible = "regulator-fixed";
81 regulator-max-microvolt = <3300000>;
82 regulator-min-microvolt = <3300000>;
83 regulator-name = "+V3.3_SW";
86 reg_5p0v: regulator-5p0v {
87 compatible = "regulator-fixed";
88 regulator-max-microvolt = <5000000>;
89 regulator-min-microvolt = <5000000>;
90 regulator-name = "+V5_SW";
93 /* Non PMIC On-module Supplies */
94 reg_ethphy: regulator-ethphy {
95 compatible = "regulator-fixed";
96 enable-active-high;
98 off-on-delay = <500000>;
99 pinctrl-names = "default";
100 pinctrl-0 = <&pinctrl_reg_eth>;
101 regulator-boot-on;
102 regulator-max-microvolt = <3300000>;
103 regulator-min-microvolt = <3300000>;
104 regulator-name = "On-module +V3.3_ETH";
105 startup-delay-us = <200000>;
108 reg_usb_otg1_vbus: regulator-usb-otg1 {
109 compatible = "regulator-fixed";
110 enable-active-high;
113 pinctrl-names = "default";
114 pinctrl-0 = <&pinctrl_reg_usb1_en>;
115 regulator-max-microvolt = <5000000>;
116 regulator-min-microvolt = <5000000>;
117 regulator-name = "USB_1_EN";
120 reg_usb_otg2_vbus: regulator-usb-otg2 {
121 compatible = "regulator-fixed";
122 enable-active-high;
125 pinctrl-names = "default";
126 pinctrl-0 = <&pinctrl_reg_usb2_en>;
127 regulator-max-microvolt = <5000000>;
128 regulator-min-microvolt = <5000000>;
129 regulator-name = "USB_2_EN";
132 reg_usdhc2_vmmc: regulator-usdhc2 {
133 compatible = "regulator-fixed";
134 enable-active-high;
137 off-on-delay = <100000>;
138 pinctrl-names = "default";
139 pinctrl-0 = <&pinctrl_usdhc2_pwr_en>;
140 regulator-max-microvolt = <3300000>;
141 regulator-min-microvolt = <3300000>;
142 regulator-name = "+V3.3_SD";
143 startup-delay-us = <2000>;
146 reserved-memory {
147 #address-cells = <2>;
148 #size-cells = <2>;
152 /delete-node/ linux,cma;
157 cpu-supply = <®_vdd_arm>;
161 cpu-supply = <®_vdd_arm>;
165 cpu-supply = <®_vdd_arm>;
169 cpu-supply = <®_vdd_arm>;
181 operating-points-v2 = <&ddrc_opp_table>;
183 ddrc_opp_table: opp-table {
184 compatible = "operating-points-v2";
186 opp-25M {
187 opp-hz = /bits/ 64 <25000000>;
190 opp-100M {
191 opp-hz = /bits/ 64 <100000000>;
194 opp-750M {
195 opp-hz = /bits/ 64 <750000000>;
202 #address-cells = <1>;
203 #size-cells = <0>;
204 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>;
205 pinctrl-names = "default";
206 pinctrl-0 = <&pinctrl_ecspi2>;
209 /* Verdin CAN_1 (On-module) */
211 #address-cells = <1>;
212 #size-cells = <0>;
213 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>;
214 pinctrl-names = "default";
215 pinctrl-0 = <&pinctrl_ecspi3>;
221 interrupts-extended = <&gpio1 6 IRQ_TYPE_LEVEL_LOW>;
222 pinctrl-names = "default";
223 pinctrl-0 = <&pinctrl_can1_int>;
225 spi-max-frequency = <8500000>;
229 /* Verdin ETH_1 (On-module PHY) */
231 fsl,magic-packet;
232 phy-handle = <ðphy0>;
233 phy-mode = "rgmii-id";
234 phy-supply = <®_ethphy>;
235 pinctrl-names = "default", "sleep";
236 pinctrl-0 = <&pinctrl_fec1>;
237 pinctrl-1 = <&pinctrl_fec1_sleep>;
240 #address-cells = <1>;
241 #size-cells = <0>;
243 ethphy0: ethernet-phy@7 {
244 compatible = "ethernet-phy-ieee802.3-c22";
245 interrupt-parent = <&gpio1>;
247 micrel,led-mode = <0>;
255 pinctrl-names = "default";
256 pinctrl-0 = <&pinctrl_flexspi0>;
260 gpio-line-names = "SODIMM_216",
279 gpio-line-names = "",
301 gpio-line-names = "SODIMM_131",
332 ctrl-sleep-moci-hog {
333 gpio-hog;
336 line-name = "CTRL_SLEEP_MOCI#";
337 output-high;
338 pinctrl-names = "default";
339 pinctrl-0 = <&pinctrl_ctrl_sleep_moci>;
343 /* On-module I2C */
345 clock-frequency = <400000>;
346 pinctrl-names = "default", "gpio";
347 pinctrl-0 = <&pinctrl_i2c1>;
348 pinctrl-1 = <&pinctrl_i2c1_gpio>;
349 scl-gpios = <&gpio5 14 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
350 sda-gpios = <&gpio5 15 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
355 interrupt-parent = <&gpio1>;
358 pinctrl-names = "default";
359 pinctrl-0 = <&pinctrl_pmic>;
361 sd-vsel-gpios = <&gpio1 4 GPIO_ACTIVE_HIGH>;
370 nxp,dvs-run-voltage = <850000>;
371 nxp,dvs-standby-voltage = <800000>;
372 regulator-always-on;
373 regulator-boot-on;
374 regulator-max-microvolt = <850000>;
375 regulator-min-microvolt = <800000>;
376 regulator-name = "On-module +VDD_SOC (BUCK1)";
377 regulator-ramp-delay = <3125>;
381 nxp,dvs-run-voltage = <950000>;
382 nxp,dvs-standby-voltage = <850000>;
383 regulator-always-on;
384 regulator-boot-on;
385 regulator-max-microvolt = <1050000>;
386 regulator-min-microvolt = <805000>;
387 regulator-name = "On-module +VDD_ARM (BUCK2)";
388 regulator-ramp-delay = <3125>;
392 regulator-always-on;
393 regulator-boot-on;
394 regulator-max-microvolt = <1000000>;
395 regulator-min-microvolt = <805000>;
396 regulator-name = "On-module +VDD_GPU_VPU_DDR (BUCK3)";
400 regulator-always-on;
401 regulator-boot-on;
402 regulator-max-microvolt = <3300000>;
403 regulator-min-microvolt = <3300000>;
404 regulator-name = "On-module +V3.3 (BUCK4)";
408 regulator-always-on;
409 regulator-boot-on;
410 regulator-max-microvolt = <1800000>;
411 regulator-min-microvolt = <1800000>;
412 regulator-name = "PWR_1V8_MOCI (BUCK5)";
416 regulator-always-on;
417 regulator-boot-on;
418 regulator-max-microvolt = <1100000>;
419 regulator-min-microvolt = <1100000>;
420 regulator-name = "On-module +VDD_DDR (BUCK6)";
424 regulator-always-on;
425 regulator-boot-on;
426 regulator-max-microvolt = <1800000>;
427 regulator-min-microvolt = <1800000>;
428 regulator-name = "On-module +V1.8_SNVS (LDO1)";
432 regulator-always-on;
433 regulator-boot-on;
434 regulator-max-microvolt = <800000>;
435 regulator-min-microvolt = <800000>;
436 regulator-name = "On-module +V0.8_SNVS (LDO2)";
440 regulator-always-on;
441 regulator-boot-on;
442 regulator-max-microvolt = <1800000>;
443 regulator-min-microvolt = <1800000>;
444 regulator-name = "On-module +V1.8A (LDO3)";
448 regulator-always-on;
449 regulator-boot-on;
450 regulator-max-microvolt = <900000>;
451 regulator-min-microvolt = <900000>;
452 regulator-name = "On-module +V0.9_MIPI (LDO4)";
456 regulator-max-microvolt = <3300000>;
457 regulator-min-microvolt = <1800000>;
458 regulator-name = "On-module +V3.3_1.8_SD (LDO5)";
471 #address-cells = <1>;
472 #size-cells = <0>;
474 /* Verdin I2C_1 (ADC_4 - ADC_3) */
481 /* Verdin I2C_1 (ADC_4 - ADC_1) */
488 /* Verdin I2C_1 (ADC_3 - ADC_1) */
495 /* Verdin I2C_1 (ADC_2 - ADC_1) */
540 clock-frequency = <10000>;
541 pinctrl-names = "default", "gpio";
542 pinctrl-0 = <&pinctrl_i2c2>;
543 pinctrl-1 = <&pinctrl_i2c2_gpio>;
544 scl-gpios = <&gpio5 16 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
545 sda-gpios = <&gpio5 17 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
553 clock-frequency = <400000>;
554 pinctrl-names = "default", "gpio";
555 pinctrl-0 = <&pinctrl_i2c3>;
556 pinctrl-1 = <&pinctrl_i2c3_gpio>;
557 scl-gpios = <&gpio5 18 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
558 sda-gpios = <&gpio5 19 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
563 clock-frequency = <400000>;
564 pinctrl-names = "default", "gpio";
565 pinctrl-0 = <&pinctrl_i2c4>;
566 pinctrl-1 = <&pinctrl_i2c4_gpio>;
567 scl-gpios = <&gpio5 20 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
568 sda-gpios = <&gpio5 21 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
570 gpio_expander_21: gpio-expander@21 {
572 #gpio-cells = <2>;
573 gpio-controller;
575 vcc-supply = <®_3p3v>;
583 enable-gpios = <&gpio3 3 GPIO_ACTIVE_HIGH>;
584 pinctrl-names = "default";
585 pinctrl-0 = <&pinctrl_gpio_10_dsi>;
594 shunt-resistor = <10000>;
600 pinctrl-names = "default";
601 pinctrl-0 = <&pinctrl_gpio_10_dsi>, <&pinctrl_pwm_3_dsi_hpd_gpio>;
605 reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>;
615 interrupt-parent = <&gpio3>;
617 pinctrl-names = "default";
618 pinctrl-0 = <&pinctrl_gpio_9_dsi>, <&pinctrl_i2s_2_bclk_touch_reset>;
621 reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;
651 assigned-clocks = <&clk IMX8MM_CLK_PCIE1_AUX>,
653 assigned-clock-parents = <&clk IMX8MM_SYS_PLL2_50M>,
655 assigned-clock-rates = <10000000>, <250000000>;
658 clock-names = "pcie", "pcie_aux", "pcie_bus";
659 pinctrl-names = "default";
660 pinctrl-0 = <&pinctrl_pcie0>;
662 reset-gpio = <&gpio3 19 GPIO_ACTIVE_LOW>;
667 fsl,clkreq-unsupported;
668 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_OUTPUT>;
669 fsl,tx-deemph-gen1 = <0x2d>;
670 fsl,tx-deemph-gen2 = <0xf>;
675 pinctrl-names = "default";
676 pinctrl-0 = <&pinctrl_pwm_1>;
677 #pwm-cells = <3>;
682 pinctrl-names = "default";
683 pinctrl-0 = <&pinctrl_pwm_2>;
684 #pwm-cells = <3>;
689 pinctrl-names = "default";
690 pinctrl-0 = <&pinctrl_pwm_3>;
691 #pwm-cells = <3>;
696 #sound-dai-cells = <0>;
697 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>;
698 assigned-clock-rates = <24576000>;
699 assigned-clocks = <&clk IMX8MM_CLK_SAI2>;
700 pinctrl-names = "default";
701 pinctrl-0 = <&pinctrl_sai2>;
710 pinctrl-names = "default";
711 pinctrl-0 = <&pinctrl_uart1>;
716 pinctrl-names = "default";
717 pinctrl-0 = <&pinctrl_uart2>;
718 uart-has-rtscts;
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_uart3>;
725 uart-has-rtscts;
730 * Resource allocated to M4 by default, must not be accessed from Cortex-A35 or you get an OOPS
733 pinctrl-names = "default";
734 pinctrl-0 = <&pinctrl_uart4>;
739 adp-disable;
741 hnp-disable;
742 over-current-active-low;
743 samsung,picophy-dc-vol-level-adjust = <7>;
744 samsung,picophy-pre-emp-curr-control = <3>;
745 srp-disable;
746 vbus-supply = <®_usb_otg1_vbus>;
752 over-current-active-low;
753 samsung,picophy-dc-vol-level-adjust = <7>;
754 samsung,picophy-pre-emp-curr-control = <3>;
755 vbus-supply = <®_usb_otg2_vbus>;
759 vcc-supply = <®_vdd_3v3>;
763 power-domains = <&pgc_otg2>;
764 vcc-supply = <®_vdd_3v3>;
767 /* On-module eMMC */
769 bus-width = <8>;
770 keep-power-in-suspend;
771 non-removable;
772 pinctrl-names = "default", "state_100mhz", "state_200mhz";
773 pinctrl-0 = <&pinctrl_usdhc1>;
774 pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
775 pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
781 bus-width = <4>;
782 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
783 disable-wp;
784 pinctrl-names = "default", "state_100mhz", "state_200mhz", "sleep";
785 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_cd>;
786 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_cd>;
787 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_cd>;
788 pinctrl-3 = <&pinctrl_usdhc2_sleep>, <&pinctrl_usdhc2_cd_sleep>;
789 vmmc-supply = <®_usdhc2_vmmc>;
793 fsl,ext-reset-output;
794 pinctrl-names = "default";
795 pinctrl-0 = <&pinctrl_wdog>;
800 pinctrl-names = "default";
801 pinctrl-0 = <&pinctrl_gpio1>, <&pinctrl_gpio2>,
858 pinctrl_fec1_sleep: fec1-sleepgrp {
929 /* Verdin GPIO_9_DSI (pulled-up as active-low) */
935 /* Verdin GPIO_10_DSI (pulled-up as active-low) */
976 /* On-module I2C */
1068 /* Verdin PWM_3_DSI (pulled-down as active-high) shared with PWM1_OUT */
1165 pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
1181 pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
1213 * Note: Due to ERR050080 we use discrete external on-module resistors pulling-up to the
1214 * on-module +V3.3_1.8_SD (LDO5) rail and explicitly disable the internal pull-ups here.
1227 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
1238 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
1262 * On-module Wi-Fi/BT or type specific SDHC interface
1275 pinctrl_usdhc3_100mhz: usdhc3-100mhzgrp {
1285 pinctrl_usdhc3_200mhz: usdhc3-200mhzgrp {