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/Linux-v5.15/arch/mips/kernel/
Dirq-gt641xx.c22 u32 cause; in ack_gt641xx_irq() local
25 cause = GT_READ(GT_INTRCAUSE_OFS); in ack_gt641xx_irq()
26 cause &= ~GT641XX_IRQ_TO_BIT(d->irq); in ack_gt641xx_irq()
27 GT_WRITE(GT_INTRCAUSE_OFS, cause); in ack_gt641xx_irq()
46 u32 cause, mask; in mask_ack_gt641xx_irq() local
53 cause = GT_READ(GT_INTRCAUSE_OFS); in mask_ack_gt641xx_irq()
54 cause &= ~GT641XX_IRQ_TO_BIT(d->irq); in mask_ack_gt641xx_irq()
55 GT_WRITE(GT_INTRCAUSE_OFS, cause); in mask_ack_gt641xx_irq()
81 u32 cause, mask; in gt641xx_irq_dispatch() local
84 cause = GT_READ(GT_INTRCAUSE_OFS); in gt641xx_irq_dispatch()
[all …]
Dmips-cm.c377 int ocause, cause; in mips_cm_error_report() local
389 cause = cm_error >> __ffs(CM_GCR_ERROR_CAUSE_ERRTYPE); in mips_cm_error_report()
392 if (!cause) in mips_cm_error_report()
395 if (cause < 16) { in mips_cm_error_report()
406 } else if (cause < 24) { in mips_cm_error_report()
441 cm2_causes[cause], buf); in mips_cm_error_report()
448 cause = cm_error >> __ffs64(CM3_GCR_ERROR_CAUSE_ERRTYPE); in mips_cm_error_report()
451 if (!cause) in mips_cm_error_report()
454 /* Used by cause == {1,2,3} */ in mips_cm_error_report()
464 if (cause == 1 || cause == 3) { /* Tag ECC */ in mips_cm_error_report()
[all …]
/Linux-v5.15/arch/riscv/mm/
Dfault.c52 if (kfence_handle_page_fault(addr, regs->cause == EXC_STORE_PAGE_FAULT, regs)) in no_context()
93 /* User mode accesses just cause a SIGSEGV */ in bad_area()
112 /* User mode accesses just cause a SIGSEGV */ in vmalloc_fault()
182 static inline bool access_error(unsigned long cause, struct vm_area_struct *vma) in access_error() argument
184 switch (cause) { in access_error()
201 panic("%s: unhandled cause %lu", __func__, cause); in access_error()
215 unsigned long addr, cause; in do_page_fault() local
220 cause = regs->cause; in do_page_fault()
226 if (kprobe_page_fault(regs, cause)) in do_page_fault()
265 tsk->thread.bad_cause = cause; in do_page_fault()
[all …]
/Linux-v5.15/drivers/dma/idxd/
Dirq.c58 static int process_misc_interrupts(struct idxd_device *idxd, u32 cause) in process_misc_interrupts() argument
66 if (cause & IDXD_INTC_ERR) { in process_misc_interrupts()
101 if (cause & IDXD_INTC_CMD) { in process_misc_interrupts()
106 if (cause & IDXD_INTC_OCCUPY) { in process_misc_interrupts()
111 if (cause & IDXD_INTC_PERFMON_OVFL) { in process_misc_interrupts()
116 val ^= cause; in process_misc_interrupts()
118 dev_warn_once(dev, "Unexpected interrupt cause bits set: %#x\n", in process_misc_interrupts()
157 u32 cause; in idxd_misc_thread() local
159 cause = ioread32(idxd->reg_base + IDXD_INTCAUSE_OFFSET); in idxd_misc_thread()
160 if (cause) in idxd_misc_thread()
[all …]
/Linux-v5.15/arch/mips/bcm47xx/
Dirq.c36 u32 cause; in plat_irq_dispatch() local
38 cause = read_c0_cause() & read_c0_status() & CAUSEF_IP; in plat_irq_dispatch()
40 clear_c0_status(cause); in plat_irq_dispatch()
42 if (cause & CAUSEF_IP7) in plat_irq_dispatch()
44 if (cause & CAUSEF_IP2) in plat_irq_dispatch()
46 if (cause & CAUSEF_IP3) in plat_irq_dispatch()
48 if (cause & CAUSEF_IP4) in plat_irq_dispatch()
50 if (cause & CAUSEF_IP5) in plat_irq_dispatch()
52 if (cause & CAUSEF_IP6) in plat_irq_dispatch()
/Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwell/
Dvirtual-memory.json3 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
10 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
14 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
25 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
36 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
91 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
95 …"PublicDescription": "This event counts store misses in all DTLB levels that cause page walks of a…
102 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
106 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
117 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellde/
Dvirtual-memory.json5 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
9 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
20 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
31 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
42 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
88 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
97 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
101 …"PublicDescription": "This event counts store misses in all DTLB levels that cause page walks of a…
112 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
119 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/broadwellx/
Dvirtual-memory.json5 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
9 …"PublicDescription": "This event counts load misses in all DTLB levels that cause page walks of an…
20 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
31 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
42 …"PublicDescription": "This event counts load misses in all DTLB levels that cause a completed page…
88 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
97 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
101 …"PublicDescription": "This event counts store misses in all DTLB levels that cause page walks of a…
112 …"PublicDescription": "This event counts store misses in all DTLB levels that cause a completed pag…
119 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/sandybridge/
Dvirtual-memory.json8 "BriefDescription": "Load misses in all DTLB levels that cause page walks.",
17 "BriefDescription": "Load misses at all DTLB levels that cause completed page walks.",
31 …d operations that miss the first DTLB level but hit the second and do not cause any page walks. Th…
37 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
46 "BriefDescription": "Store misses in all DTLB levels that cause page walks.",
55 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks.",
73 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
91 "BriefDescription": "Misses at all ITLB levels that cause page walks.",
100 "BriefDescription": "Misses in all ITLB levels that cause completed page walks.",
119 …": "Operations that miss the first ITLB level but hit the second and do not cause any page walks.",
/Linux-v5.15/tools/perf/pmu-events/arch/x86/jaketown/
Dvirtual-memory.json26 "BriefDescription": "Misses at all ITLB levels that cause page walks.",
35 "BriefDescription": "Misses in all ITLB levels that cause completed page walks.",
54 …": "Operations that miss the first ITLB level but hit the second and do not cause any page walks.",
63 "BriefDescription": "Load misses in all DTLB levels that cause page walks.",
72 "BriefDescription": "Load misses at all DTLB levels that cause completed page walks.",
86 …d operations that miss the first DTLB level but hit the second and do not cause any page walks. Th…
92 …: "Load operations that miss the first DTLB level but hit the second and do not cause page walks.",
101 "BriefDescription": "Store misses in all DTLB levels that cause page walks.",
110 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks.",
128 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
/Linux-v5.15/tools/perf/pmu-events/arch/x86/ivybridge/
Dvirtual-memory.json3 …"PublicDescription": "Misses in all TLB levels that cause a page walk of any page size from demand…
48 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
58 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
72 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
78 …": "Store operations that miss the first TLB level but hit the second and do not cause page walks",
97 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
101 "PublicDescription": "Misses in all ITLB levels that cause page walks.",
107 "BriefDescription": "Misses at all ITLB levels that cause page walks",
111 "PublicDescription": "Misses in all ITLB levels that cause completed page walks.",
117 "BriefDescription": "Misses in all ITLB levels that cause completed page walks",
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/ivytown/
Dvirtual-memory.json3 …"PublicDescription": "Misses in all TLB levels that cause a page walk of any page size from demand…
66 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
76 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
90 …: "Store operations that miss the first TLB level but hit the second and do not cause page walks.",
96 …": "Store operations that miss the first TLB level but hit the second and do not cause page walks",
115 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
119 "PublicDescription": "Misses in all ITLB levels that cause page walks.",
125 "BriefDescription": "Misses at all ITLB levels that cause page walks",
129 "PublicDescription": "Misses in all ITLB levels that cause completed page walks.",
135 "BriefDescription": "Misses in all ITLB levels that cause completed page walks",
[all …]
/Linux-v5.15/drivers/net/ethernet/chelsio/cxgb/
Dsubr.c200 u32 cause = readl(adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE); in fpga_phy_intr_handler() local
203 if (cause & (1 << p)) { in fpga_phy_intr_handler()
210 writel(cause, adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE); in fpga_phy_intr_handler()
219 u32 cause = readl(adapter->regs + A_PL_CAUSE); in fpga_slow_intr() local
222 cause &= ~F_PL_INTR_SGE_DATA; in fpga_slow_intr()
223 if (cause & F_PL_INTR_SGE_ERR) { in fpga_slow_intr()
228 if (cause & FPGA_PCIX_INTERRUPT_GMAC) in fpga_slow_intr()
231 if (cause & FPGA_PCIX_INTERRUPT_TP) { in fpga_slow_intr()
241 if (cause & FPGA_PCIX_INTERRUPT_PCIX) { in fpga_slow_intr()
247 if (cause) in fpga_slow_intr()
[all …]
/Linux-v5.15/arch/mips/kvm/
Dvz.c258 u32 cause) in kvm_vz_irq_deliver_cb() argument
287 u32 cause) in kvm_vz_irq_clear_cb() argument
295 * Explicitly clear irq associated with Cause.IP[IPTI] in kvm_vz_irq_clear_cb()
360 * @cause: CP0_Cause register to restore.
366 u32 cause) in _kvm_vz_restore_stimer() argument
375 write_gc0_cause(cause); in _kvm_vz_restore_stimer()
382 * @cause: CP0_Cause register to restore.
384 * Restore hard timer Guest.Count & Guest.Cause taking care to preserve the
388 u32 compare, u32 cause) in _kvm_vz_restore_htimer() argument
404 write_gc0_cause(cause); in _kvm_vz_restore_htimer()
[all …]
/Linux-v5.15/arch/nios2/kernel/
Dtraps.c94 * down the cause of the crash will be able to figure in show_stack()
122 asmlinkage void handle_unaligned_c(struct pt_regs *fp, int cause) in handle_unaligned_c() argument
126 cause >>= 2; in handle_unaligned_c()
136 pr_alert(" cause %d\n", cause); in handle_unaligned_c()
168 asmlinkage void unhandled_exception(struct pt_regs *regs, int cause) in unhandled_exception() argument
172 cause /= 4; in unhandled_exception()
175 cause, user_mode(regs) ? "user" : "kernel", addr); in unhandled_exception()
/Linux-v5.15/security/integrity/
Dintegrity_audit.c30 const char *cause, int result, int audit_info) in integrity_audit_msg() argument
32 integrity_audit_message(audit_msgno, inode, fname, op, cause, in integrity_audit_msg()
38 const char *cause, int result, int audit_info, in integrity_audit_message() argument
54 audit_log_format(ab, " op=%s cause=%s comm=", op, cause); in integrity_audit_message()
/Linux-v5.15/drivers/staging/rtl8723bs/include/
Drtw_ioctl.h63 #define NDIS_STATUS_DEST_OUT_OF_ORDER ((uint)0xC0010024L) /* cause 27 */
64 #define NDIS_STATUS_VC_NOT_AVAILABLE ((uint)0xC0010025L) /* cause 35, 45 */
65 #define NDIS_STATUS_CELLRATE_NOT_AVAILABLE ((uint)0xC0010026L) /* cause 37 */
66 #define NDIS_STATUS_INCOMPATABLE_QOS ((uint)0xC0010027L) /* cause 49 */
67 #define NDIS_STATUS_AAL_PARAMS_UNSUPPORTED ((uint)0xC0010028L) /* cause 93 */
68 #define NDIS_STATUS_NO_ROUTE_TO_DESTINATION ((uint)0xC0010029L) /* cause 3 */
/Linux-v5.15/drivers/irqchip/
Dirq-riscv-intc.c24 unsigned long cause = regs->cause & ~CAUSE_IRQ_FLAG; in riscv_intc_irq() local
26 if (unlikely(cause >= BITS_PER_LONG)) in riscv_intc_irq()
27 panic("unexpected interrupt cause"); in riscv_intc_irq()
29 switch (cause) { in riscv_intc_irq()
40 handle_domain_irq(intc_domain, cause, regs); in riscv_intc_irq()
/Linux-v5.15/drivers/atm/
DuPD98402.h16 #define uPD98402_PICR 0x02 /* PHY Interrupt Cause Register */
18 #define uPD98402_ACR 0x04 /* Alarm Cause Register */
19 #define uPD98402_ACMR 0x05 /* Alarm Cause Mask Register */
20 #define uPD98402_PCR 0x06 /* Performance Cause Register */
21 #define uPD98402_PCMR 0x07 /* Performance Cause Mask Register */
22 #define uPD98402_IACM 0x08 /* Internal Alarm Cause Mask Register */
30 #define uPD98402_PCOCR 0x10 /* Perf. Counter Overflow Cause Reg */
/Linux-v5.15/security/integrity/ima/
Dima_appraise.c237 enum integrity_status *status, const char **cause) in xattr_verify() argument
249 *cause = "IMA-signature-required"; in xattr_verify()
269 *cause = "invalid-hash"; in xattr_verify()
294 *cause = "invalid-signature"; in xattr_verify()
302 *cause = "unknown-ima-data"; in xattr_verify()
317 enum integrity_status *status, const char **cause) in modsig_verify() argument
327 *cause = "invalid-signature"; in modsig_verify()
383 const char *cause = "unknown"; in ima_appraise_measurement() local
399 cause = iint->flags & IMA_DIGSIG_REQUIRED ? in ima_appraise_measurement()
423 cause = "missing-HMAC"; in ima_appraise_measurement()
[all …]
/Linux-v5.15/arch/mips/sgi-ip30/
Dip30-irq.c46 u64 pending, mask, cause, error_irqs, err_reg; in ip30_error_irq() local
52 cause = heart_read(&heart_regs->cause); in ip30_error_irq()
66 * If we also have a cause value, then something happened, so loop in ip30_error_irq()
68 * and print the value of the HEART cause register. This is really in ip30_error_irq()
72 * Refer to heart.h for the HC_* macros to work out the cause in ip30_error_irq()
75 if (cause) { in ip30_error_irq()
76 pr_alert("IP30: CPU%d: HEART ATTACK! ISR = 0x%.16llx, IMR = 0x%.16llx, CAUSE = 0x%.16llx\n", in ip30_error_irq()
77 cpu, pending, mask, cause); in ip30_error_irq()
79 if (cause & HC_COR_MEM_ERR) { in ip30_error_irq()
/Linux-v5.15/tools/perf/pmu-events/arch/x86/haswellx/
Dvirtual-memory.json5 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
8 "PublicDescription": "Misses in all TLB levels that cause a page walk of any page size.",
67 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
77 …ons from a 2M page that miss the first DTLB level but hit the second and do not cause page walks.",
84 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
104 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
124 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
134 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks. (1G)",
143 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
166 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
[all …]
/Linux-v5.15/tools/perf/pmu-events/arch/x86/haswell/
Dvirtual-memory.json3 "PublicDescription": "Misses in all TLB levels that cause a page walk of any page size.",
9 "BriefDescription": "Load misses in all DTLB levels that cause page walks",
62 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
72 …ons from a 2M page that miss the first DTLB level but hit the second and do not cause page walks.",
88 …": "Load operations that miss the first DTLB level but hit the second and do not cause page walks",
108 "BriefDescription": "Store misses in all DTLB levels that cause page walks",
128 … "BriefDescription": "Store misses in all DTLB levels that cause completed page walks (2M/4M)",
137 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks. (1G)",
147 "BriefDescription": "Store misses in all DTLB levels that cause completed page walks",
161 …ons from a 4K page that miss the first DTLB level but hit the second and do not cause page walks.",
[all …]
/Linux-v5.15/arch/nios2/mm/
Dfault.c43 asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long cause, in do_page_fault() argument
53 cause >>= 2; in do_page_fault()
112 switch (cause) { in do_page_fault()
177 /* User mode accesses just cause a SIGSEGV */ in do_page_fault()
181 "cause %ld\n", current->comm, SIGSEGV, address, cause); in do_page_fault()
202 pr_alert("ea = %08lx, ra = %08lx, cause = %ld\n", regs->ea, regs->ra, in do_page_fault()
203 cause); in do_page_fault()
/Linux-v5.15/fs/xfs/libxfs/
Dxfs_inode_fork.h36 * Punching out an extent from the middle of an existing extent can cause the
43 * Directory entry addition can cause the following,
45 * A new extent can cause extent count to increase by 1.
56 * Adding/removing an xattr can cause XFS_DA_NODE_MAXDEPTH extents to
58 * large enough to cause a double split. It can also cause extent
75 * Moving an extent to data fork can cause a sub-interval of an existing extent
85 * extent (from donor/source file) in its place will cause extent count to

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