200 	u32 cause = readl(adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE);  in fpga_phy_intr_handler()  local
203 		if (cause & (1 << p)) {  in fpga_phy_intr_handler()
210 	writel(cause, adapter->regs + FPGA_GMAC_ADDR_INTERRUPT_CAUSE);  in fpga_phy_intr_handler()
219 	u32 cause = readl(adapter->regs + A_PL_CAUSE);  in fpga_slow_intr()  local
222 	cause &= ~F_PL_INTR_SGE_DATA;  in fpga_slow_intr()
223 	if (cause & F_PL_INTR_SGE_ERR) {  in fpga_slow_intr()
228 	if (cause & FPGA_PCIX_INTERRUPT_GMAC)  in fpga_slow_intr()
231 	if (cause & FPGA_PCIX_INTERRUPT_TP) {  in fpga_slow_intr()
241 	if (cause & FPGA_PCIX_INTERRUPT_PCIX) {  in fpga_slow_intr()
247 	if (cause)  in fpga_slow_intr()
248 		writel(cause, adapter->regs + A_PL_CAUSE);  in fpga_slow_intr()
253 	return cause == 0 ? IRQ_NONE : IRQ_HANDLED;  in fpga_slow_intr()
683 	u32 cause;  in t1_elmer0_ext_intr_handler()  local
685 	t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause);  in t1_elmer0_ext_intr_handler()
696 			if (!(cause & (1 << port_bit)))  in t1_elmer0_ext_intr_handler()
707 		if (cause & ELMER0_GP_BIT1) { /* Marvell 88E1111 interrupt */  in t1_elmer0_ext_intr_handler()
717 		 * Elmer0's interrupt cause isn't useful here because there is  in t1_elmer0_ext_intr_handler()
734 		if (cause & ELMER0_GP_BIT6) { /* Marvell 88x2010 interrupt */  in t1_elmer0_ext_intr_handler()
745 				"External interrupt cause 0x%x\n", cause);  in t1_elmer0_ext_intr_handler()
746 		if (cause & ELMER0_GP_BIT1) {        /* PMC3393 INTB */  in t1_elmer0_ext_intr_handler()
751 		if (cause & ELMER0_GP_BIT5) {        /* XPAK MOD_DETECT */  in t1_elmer0_ext_intr_handler()
762 	t1_tpi_write(adapter, A_ELMER0_INT_CAUSE, cause);  in t1_elmer0_ext_intr_handler()
859 	u32 cause = readl(adapter->regs + A_PL_CAUSE);  in asic_slow_intr()  local
862 	cause &= adapter->slow_intr_mask;  in asic_slow_intr()
863 	if (!cause)  in asic_slow_intr()
865 	if (cause & F_PL_INTR_SGE_ERR) {  in asic_slow_intr()
869 	if (cause & F_PL_INTR_TP)  in asic_slow_intr()
871 	if (cause & F_PL_INTR_ESPI)  in asic_slow_intr()
873 	if (cause & F_PL_INTR_PCIX) {  in asic_slow_intr()
877 	if (cause & F_PL_INTR_EXT) {  in asic_slow_intr()
890 	writel(cause, adapter->regs + A_PL_CAUSE);  in asic_slow_intr()