| /Linux-v6.1/Documentation/devicetree/bindings/sound/ |
| D | rockchip-i2s.yaml | 1 # SPDX-License-Identifier: GPL-2.0
3 ---
4 $id: http://devicetree.org/schemas/sound/rockchip-i2s.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 The I2S bus (Inter-IC sound bus) is a serial link for digital
14 - Heiko Stuebner <heiko@sntech.de>
19 - const: rockchip,rk3066-i2s
20 - items:
21 - enum:
22 - rockchip,px30-i2s
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| D | xlnx,i2s.txt | 1 Device-Tree bindings for Xilinx I2S PL block
3 The IP supports I2S based playback/capture audio
6 - compatible: "xlnx,i2s-transmitter-1.0" for playback and
7 "xlnx,i2s-receiver-1.0" for capture
9 Required property common to both I2S playback and capture:
10 - reg: Base address and size of the IP core instance.
11 - xlnx,dwidth: sample data width. Can be any of 16, 24.
12 - xlnx,num-channels: Number of I2S streams. Can be any of 1, 2, 3, 4.
13 supported channels = 2 * xlnx,num-channels
18 compatible = "xlnx,i2s-receiver-1.0";
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| D | fsl,ssi.txt | 4 be programmed in AC97, I2S, left-justified, or right-justified modes.
7 - compatible: Compatible list, should contain one of the following
9 fsl,mpc8610-ssi
10 fsl,imx51-ssi
11 fsl,imx35-ssi
12 fsl,imx21-ssi
13 - cell-index: The SSI, <0> = SSI1, <1> = SSI2, and so on.
14 - reg: Offset and length of the register set for the device.
15 - interrupts: <a b> where a is the interrupt number and b is a
21 - fsl,fifo-depth: The number of elements in the transmit and receive FIFOs.
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| /Linux-v6.1/sound/soc/xilinx/ |
| D | xlnx_i2s.c | 1 // SPDX-License-Identifier: GPL-2.0
32 u32 channels; member
44 return -EINVAL; in xlnx_i2s_set_sclkout_div()
46 drv_data->sysclk = 0; in xlnx_i2s_set_sclkout_div()
48 writel(div, drv_data->base + I2S_I2STIM_OFFSET); in xlnx_i2s_set_sclkout_div()
58 drv_data->sysclk = freq; in xlnx_i2s_set_sysclk()
62 if (drv_data->is_32bit_lrclk) in xlnx_i2s_set_sysclk()
65 bits_per_sample = drv_data->data_width; in xlnx_i2s_set_sysclk()
67 drv_data->ratnum.num = freq / (bits_per_sample * drv_data->channels) / 2; in xlnx_i2s_set_sysclk()
68 drv_data->ratnum.den_step = 1; in xlnx_i2s_set_sysclk()
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| /Linux-v6.1/sound/soc/amd/ |
| D | acp.h | 1 /* SPDX-License-Identifier: GPL-2.0 */
13 /* Playback and Capture Offset for Stoney */
26 * playback and SRAM Bank 2 for capture where as in case of BT I2S
28 * be used for capture. Carrizo uses I2S SP controller instance. SRAM Banks
30 * for capture scenario.
73 /* Playback DMA channels */
77 /* Capture DMA channels */
81 /* Playback DMA Channels for I2S BT instance */
85 /* Capture DMA Channels for I2S BT Instance */
89 /* Playback DMA channels for I2S MICSP instance */
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| /Linux-v6.1/Documentation/sound/cards/ |
| D | cmipci.rst | 2 Brief Notes on C-Media 8338/8738/8768/8770 Driver
8 Front/Rear Multi-channel Playback
9 ---------------------------------
12 channels can be used for front/rear playbacks. Since there are two
13 DACs, both streams are handled independently unlike the 4/6ch multi-
22 - The first DAC supports U8 and S16LE formats, while the second DAC
24 - The second DAC supports only two channel stereo.
44 on and "double DAC" mode. Actually I could hear separate 4 channels
51 control switch in the driver "Line-In As Rear", which you can change
52 via alsamixer or somewhat else. When this switch is on, line-in jack
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| D | audiophile-usb.rst | 2 Guide to using M-Audio Audiophile USB with ALSA and Jack
9 This document is a guide to using the M-Audio Audiophile USB (tm) device with
15 * v1.4 - Thibault Le Meur (2007-07-11)
17 - Added Low Endianness nature of 16bits-modes
19 - Modifying document structure
21 * v1.5 - Thibault Le Meur (2007-07-12)
22 - Added AC3/DTS passthru info
35 - This port supports 2 pairs of line-level audio inputs (1/4" TS and RCA)
36 - When the 1/4" TS (jack) connectors are connected, the RCA connectors
57 * 16-bit/48kHz ==> 4 channels in + 4 channels out
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| D | maya44.rst | 8 keep here as reference -- tiwai
22 … programming information, so I (Rainer Zimmermann) had to find out some card-specific information …
24 This is the first testing version of the Maya44 driver released to the alsa-devel mailing list (Feb…
29 - playback and capture at all sampling rates
30 - input/output level
31 - crossmixing
32 - line/mic switch
33 - phantom power switch
34 - analogue monitor a.k.a bypass
39 - Channel 3+4 analogue - S/PDIF input switching
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| D | emu10k1-jack.rst | 12 - Lee Revell, 2005.03.30
19 For those unfamiliar with kX ASIO, this consists of 16 capture and 16 playback
20 channels. With a post 2.6.9 Linux kernel, latencies down to 64 (1.33 ms) or
25 fairly self explanatory - select Duplex, then for capture and playback select
26 the multichannel devices, set the in and out channels to 16, and the sample
30 /usr/local/bin/jackd -R -dalsa -r48000 -p64 -n2 -D -Chw:0,2 -Phw:0,3 -S
36 sb-live-mixer.rst (or audigy-mixer.rst).
40 input channels have physical inputs connected to them depends on the card
49 still see 16 capture channels, but only 14 are available for recording inputs.
53 channels.
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| /Linux-v6.1/sound/soc/sh/ |
| D | rz-ssi.c | 1 // SPDX-License-Identifier: GPL-2.0
3 // Renesas RZ/G2L ASoC Serial Sound Interface (SSIF-2) Driver
74 #define SSI_RATES SNDRV_PCM_RATE_8000_48000 /* 8k-44.1kHz */
116 * The SSI supports full-duplex transmission and reception.
119 * So it is better to use as half-duplex (playing and recording
120 * should be done on separate channels).
123 struct rz_ssi_stream capture; member
139 writel(data, (priv->base + reg)); in rz_ssi_reg_writel()
144 return readl(priv->base + reg); in rz_ssi_reg_readl()
152 val = readl(priv->base + reg); in rz_ssi_reg_mask_setl()
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| /Linux-v6.1/Documentation/devicetree/bindings/pwm/ |
| D | pwm-st.txt | 2 --------------------------------------
5 - compatible : "st,pwm"
6 - #pwm-cells : Number of cells used to specify a PWM. First cell
7 specifies the per-chip index of the PWM to use and the
8 second cell is the period in nanoseconds - fixed to 2
10 - reg : Physical base address and length of the controller's
12 - pinctrl-names: Set to "default".
13 - pinctrl-0: List of phandles pointing to pin configuration nodes
16 - clock-names: Valid entries are "pwm" and/or "capture".
17 - clocks: phandle of the clock used by the PWM module.
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| /Linux-v6.1/Documentation/sound/designs/ |
| D | control-names.rst | 8 ---------------
17 Capture one direction
19 Bypass Capture one direction
33 <nothing> channel independent, or applies to all channels
34 Front front left/right channels
36 CLFE C/LFE channels
68 Headset Mic mic part of combined headset jack - 4-pin
70 Headphone Mic mic part of either/or - 3-pin headphone or mic
79 Analog Loopback D/A -> A/D loopback
80 Digital Loopback playback -> capture loopback -
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| /Linux-v6.1/sound/soc/mediatek/mt8195/ |
| D | mt8195-dai-etdm.c | 1 // SPDX-License-Identifier: GPL-2.0
14 #include "mt8195-afe-clk.h"
15 #include "mt8195-afe-common.h"
16 #include "mt8195-reg.h"
117 int cowork_slv_id[MT8195_AFE_IO_ETDM_NUM - 1]; //dai_id
148 return -EINVAL; in get_etdm_fs_timing()
151 static unsigned int get_etdm_ch_fixup(unsigned int channels) in get_etdm_ch_fixup() argument
153 if (channels > 16) in get_etdm_ch_fixup()
155 else if (channels > 8) in get_etdm_ch_fixup()
157 else if (channels > 4) in get_etdm_ch_fixup()
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| /Linux-v6.1/Documentation/admin-guide/media/ |
| D | imx.rst | 1 .. SPDX-License-Identifier: GPL-2.0
3 i.MX Video Capture Driver
7 ------------
10 handles the flow of image frames to and from capture devices and
13 For image capture, the IPU contains the following internal subunits:
15 - Image DMA Controller (IDMAC)
16 - Camera Serial Interface (CSI)
17 - Image Converter (IC)
18 - Sensor Multi-FIFO Controller (SMFC)
19 - Image Rotator (IRT)
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| /Linux-v6.1/sound/soc/tegra/ |
| D | tegra210_i2s.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 // tegra210_i2s.c - Tegra210 I2S driver
42 regmap_write(regmap, TEGRA210_I2S_SLOT_CTRL, total_slots - 1); in tegra210_i2s_set_slot_ctrl()
54 regmap_read(i2s->regmap, TEGRA210_I2S_CTRL, &val); in tegra210_i2s_set_clock_rate()
60 err = clk_set_rate(i2s->clk_i2s, clock_rate); in tegra210_i2s_set_clock_rate()
67 if (!IS_ERR(i2s->clk_sync_input)) { in tegra210_i2s_set_clock_rate()
73 err = clk_set_rate(i2s->clk_sync_input, clock_rate); in tegra210_i2s_set_clock_rate()
88 struct device *dev = compnt->dev; in tegra210_i2s_sw_reset()
107 regmap_read(i2s->regmap, cif_reg, &cif_ctrl); in tegra210_i2s_sw_reset()
108 regmap_read(i2s->regmap, stream_reg, &stream_ctrl); in tegra210_i2s_sw_reset()
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| /Linux-v6.1/Documentation/devicetree/bindings/soc/microchip/ |
| D | atmel,at91rm9200-tcb.yaml | 1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/soc/microchip/atmel,at91rm9200-tcb.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Alexandre Belloni <alexandre.belloni@bootlin.com>
14 timer has three channels with two counters each.
19 - enum:
20 - atmel,at91rm9200-tcb
21 - atmel,at91sam9x5-tcb
22 - atmel,sama5d2-tcb
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| /Linux-v6.1/drivers/pwm/ |
| D | pwm-stm32.c | 1 // SPDX-License-Identifier: GPL-2.0
7 * Inspired by timer-stm32.c from Maxime Coquelin
8 * pwm-atmel.c from Bo Shen
12 #include <linux/mfd/stm32-timers.h>
38 u32 capture[4] ____cacheline_aligned; /* DMA'able buffer */ member
50 regmap_read(dev->regmap, TIM_CCER, &ccer); in active_channels()
59 return regmap_write(dev->regmap, TIM_CCR1, value); in write_ccrx()
61 return regmap_write(dev->regmap, TIM_CCR2, value); in write_ccrx()
63 return regmap_write(dev->regmap, TIM_CCR3, value); in write_ccrx()
65 return regmap_write(dev->regmap, TIM_CCR4, value); in write_ccrx()
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| /Linux-v6.1/sound/soc/codecs/ |
| D | pcm186x.c | 1 // SPDX-License-Identifier: GPL-2.0
5 * Copyright (C) 2015-2017 Texas Instruments Incorporated - https://www.ti.com
30 "avdd", /* Analog power supply. Connect to 3.3-V supply. */
31 "dvdd", /* Digital power supply. Connect to 3.3-V supply. */
32 "iovdd", /* I/O power supply. Connect to 3.3-V or 1.8-V. */
45 static const DECLARE_TLV_DB_SCALE(pcm186x_pga_tlv, -1200, 50, 0);
48 SOC_DOUBLE_R_S_TLV("ADC Capture Volume", PCM186X_PGA_VAL_CH1_L,
49 PCM186X_PGA_VAL_CH1_R, 0, -24, 80, 7, 0,
54 SOC_DOUBLE_R_S_TLV("ADC1 Capture Volume", PCM186X_PGA_VAL_CH1_L,
55 PCM186X_PGA_VAL_CH1_R, 0, -24, 80, 7, 0,
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| /Linux-v6.1/sound/soc/ti/ |
| D | omap-mcpdm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * omap-mcpdm.c -- OMAP ALSA SoC DAI driver using McPDM port
5 * Copyright (C) 2009 - 2011 Texas Instruments
30 #include "omap-mcpdm.h"
31 #include "sdma-pcm.h"
48 /* Playback/Capture configuration */
51 /* McPDM dn offsets for rx1, and 2 channels */
69 writel_relaxed(val, mcpdm->io_base + reg); in omap_mcpdm_write()
74 return readl_relaxed(mcpdm->io_base + reg); in omap_mcpdm_read()
80 dev_dbg(mcpdm->dev, "***********************\n"); in omap_mcpdm_reg_dump()
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| /Linux-v6.1/drivers/usb/gadget/function/ |
| D | u_uac1_legacy.c | 1 // SPDX-License-Identifier: GPL-2.0+
3 * u_uac1.c -- ALSA audio utilities for Gadget stack
24 /*-------------------------------------------------------------------------*/
47 changed = -EINVAL; in _snd_pcm_hw_param_set()
53 val--; in _snd_pcm_hw_param_set()
60 changed = -EINVAL; in _snd_pcm_hw_param_set()
71 t.min = val - 1; in _snd_pcm_hw_param_set()
80 return -EINVAL; in _snd_pcm_hw_param_set()
82 params->cmask |= 1 << var; in _snd_pcm_hw_param_set()
83 params->rmask |= 1 << var; in _snd_pcm_hw_param_set()
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| /Linux-v6.1/sound/firewire/dice/ |
| D | dice-pcm.c | 1 // SPDX-License-Identifier: GPL-2.0-only
3 * dice_pcm.c - a part of driver for DICE based devices
6 * Copyright (c) 2014 Takashi Sakamoto <o-takashi@sakamocchi.jp>
14 struct snd_pcm_substream *substream = rule->private; in dice_rate_constraint()
15 struct snd_dice *dice = substream->private_data; in dice_rate_constraint()
16 unsigned int index = substream->pcm->device; in dice_rate_constraint()
29 if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) in dice_rate_constraint()
30 pcm_channels = dice->tx_pcm_chs[index]; in dice_rate_constraint()
32 pcm_channels = dice->rx_pcm_chs[index]; in dice_rate_constraint()
52 struct snd_pcm_substream *substream = rule->private; in dice_channels_constraint()
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| /Linux-v6.1/Documentation/devicetree/bindings/media/ |
| D | ti,da850-vpif.txt | 2 ----------------------
5 capture and display on the DA850/AM18x family of TI DaVinci/Sitara
12 - compatible: must be "ti,da850-vpif"
13 - reg: physical base address and length of the registers set for the device;
14 - interrupts: should contain IRQ line for the VPIF
16 Video Capture:
18 VPIF has a 16-bit parallel bus input, supporting 2 8-bit channels or a
19 single 16-bit channel. It should contain one or two port child nodes
21 describe the input and port@1 output channels. Please refer to the
23 Documentation/devicetree/bindings/media/video-interfaces.txt.
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| /Linux-v6.1/Documentation/driver-api/iio/ |
| D | buffers.rst | 11 The Industrial I/O core offers a way for continuous data capture based on a
12 trigger source. Multiple data channels can be read at once from
23 * :file:`enable`, activate buffer capture.
35 is non *zero*, then a triggered capture will contain data samples for this
52 For example, a driver for a 3-axis accelerometer with 12 bit resolution where
53 data is stored in two 8-bits registers as follows::
56 +---+---+---+---+---+---+---+---+
58 +---+---+---+---+---+---+---+---+
61 +---+---+---+---+---+---+---+---+
63 +---+---+---+---+---+---+---+---+
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| /Linux-v6.1/include/sound/ |
| D | ak4xxx-adda.h | 1 /* SPDX-License-Identifier: GPL-2.0-or-later */
28 /* DAC label and channels */
35 /* ADC labels and channels */
37 char *name; /* capture gain volume label */
38 char *switch_name; /* capture switch */
40 char *selector_name; /* capture source select label */
41 const char **input_names; /* capture source names (NULL terminated) */
77 (ak)->images[(chip) * 16 + (reg)]
79 ((ak)->images[(chip) * 16 + (reg)] = (val))
81 (ak)->volumes[(chip) * 16 + (reg)]
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| /Linux-v6.1/drivers/staging/media/tegra-video/ |
| D | vi.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */
16 #include <media/media-entity.h>
17 #include <media/v4l2-async.h>
18 #include <media/v4l2-ctrls.h>
19 #include <media/v4l2-device.h>
20 #include <media/v4l2-dev.h>
21 #include <media/v4l2-subdev.h>
22 #include <media/videobuf2-v4l2.h>
47 * struct tegra_vi_ops - Tegra VI operations
49 * VI for capture and runs capture start and capture finish
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