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/Linux-v6.6/drivers/clk/stm32/
Dstm32mp13_rcc.h238 #define RCC_MP_SREQSETR_STPREQ_P0 BIT(0)
241 #define RCC_MP_SREQCLRR_STPREQ_P0 BIT(0)
244 #define RCC_MP_APRSTCR_RDCTLEN BIT(0)
257 #define RCC_MP_GRSTCSETR_MPSYSRST BIT(0)
258 #define RCC_MP_GRSTCSETR_MPUP0RST BIT(4)
261 #define RCC_BR_RSTSCLRR_PORRSTF BIT(0)
262 #define RCC_BR_RSTSCLRR_BORRSTF BIT(1)
263 #define RCC_BR_RSTSCLRR_PADRSTF BIT(2)
264 #define RCC_BR_RSTSCLRR_HCSSRSTF BIT(3)
265 #define RCC_BR_RSTSCLRR_VCORERSTF BIT(4)
[all …]
/Linux-v6.6/drivers/platform/x86/intel/pmc/
Dmtl.c23 {"PMC", BIT(0)},
24 {"OPI", BIT(1)},
25 {"SPI", BIT(2)},
26 {"XHCI", BIT(3)},
27 {"SPA", BIT(4)},
28 {"SPB", BIT(5)},
29 {"SPC", BIT(6)},
30 {"GBE", BIT(7)},
32 {"SATA", BIT(0)},
33 {"DSP0", BIT(1)},
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Dadl.c15 {"SPI/eSPI", BIT(2)},
16 {"XHCI", BIT(3)},
17 {"SPA", BIT(4)},
18 {"SPB", BIT(5)},
19 {"SPC", BIT(6)},
20 {"GBE", BIT(7)},
22 {"SATA", BIT(0)},
23 {"HDA_PGD0", BIT(1)},
24 {"HDA_PGD1", BIT(2)},
25 {"HDA_PGD2", BIT(3)},
[all …]
Dtgl.c17 {"PSF9", BIT(0)},
18 {"RES_66", BIT(1)},
19 {"RES_67", BIT(2)},
20 {"RES_68", BIT(3)},
21 {"RES_69", BIT(4)},
22 {"RES_70", BIT(5)},
23 {"TBTLSX", BIT(6)},
38 {"USB2PLL_OFF_STS", BIT(18)},
39 {"PCIe/USB3.1_Gen2PLL_OFF_STS", BIT(19)},
40 {"PCIe_Gen3PLL_OFF_STS", BIT(20)},
[all …]
/Linux-v6.6/include/linux/soc/mediatek/
Dinfracfg.h33 #define MT8195_TOP_AXI_PROT_EN_VDOSYS0 BIT(6)
34 #define MT8195_TOP_AXI_PROT_EN_VPPSYS0 BIT(10)
35 #define MT8195_TOP_AXI_PROT_EN_MFG1 BIT(11)
37 #define MT8195_TOP_AXI_PROT_EN_VPPSYS0_2ND BIT(23)
39 #define MT8195_TOP_AXI_PROT_EN_1_CAM BIT(22)
40 #define MT8195_TOP_AXI_PROT_EN_2_CAM BIT(0)
42 #define MT8195_TOP_AXI_PROT_EN_2_MFG1 BIT(7)
43 #define MT8195_TOP_AXI_PROT_EN_2_AUDIO (BIT(9) | BIT(11))
44 #define MT8195_TOP_AXI_PROT_EN_2_ADSP (BIT(12) | GENMASK(16, 14))
45 #define MT8195_TOP_AXI_PROT_EN_MM_CAM (BIT(0) | BIT(2) | BIT(4))
[all …]
/Linux-v6.6/drivers/gpu/drm/mcde/
Dmcde_dsi_regs.h8 #define DSI_MCTL_MAIN_DATA_CTL_LINK_EN BIT(0)
9 #define DSI_MCTL_MAIN_DATA_CTL_IF1_MODE BIT(1)
10 #define DSI_MCTL_MAIN_DATA_CTL_VID_EN BIT(2)
11 #define DSI_MCTL_MAIN_DATA_CTL_TVG_SEL BIT(3)
12 #define DSI_MCTL_MAIN_DATA_CTL_TBG_SEL BIT(4)
13 #define DSI_MCTL_MAIN_DATA_CTL_IF1_TE_EN BIT(5)
14 #define DSI_MCTL_MAIN_DATA_CTL_IF2_TE_EN BIT(6)
15 #define DSI_MCTL_MAIN_DATA_CTL_REG_TE_EN BIT(7)
16 #define DSI_MCTL_MAIN_DATA_CTL_READ_EN BIT(8)
17 #define DSI_MCTL_MAIN_DATA_CTL_BTA_EN BIT(9)
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/Linux-v6.6/drivers/net/ethernet/freescale/dpaa2/
Ddpkg.h64 #define NH_FLD_ETH_DA BIT(0)
65 #define NH_FLD_ETH_SA BIT(1)
66 #define NH_FLD_ETH_LENGTH BIT(2)
67 #define NH_FLD_ETH_TYPE BIT(3)
68 #define NH_FLD_ETH_FINAL_CKSUM BIT(4)
69 #define NH_FLD_ETH_PADDING BIT(5)
70 #define NH_FLD_ETH_ALL_FIELDS (BIT(6) - 1)
73 #define NH_FLD_VLAN_VPRI BIT(0)
74 #define NH_FLD_VLAN_CFI BIT(1)
75 #define NH_FLD_VLAN_VID BIT(2)
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/Linux-v6.6/arch/mips/include/asm/mach-ath79/
Dar71xx_regs.h171 #define QCA956X_MAC_CFG1_SOFT_RST BIT(31)
172 #define QCA956X_MAC_CFG1_RX_RST BIT(19)
173 #define QCA956X_MAC_CFG1_TX_RST BIT(18)
174 #define QCA956X_MAC_CFG1_LOOPBACK BIT(8)
175 #define QCA956X_MAC_CFG1_RX_EN BIT(2)
176 #define QCA956X_MAC_CFG1_TX_EN BIT(0)
179 #define QCA956X_MAC_CFG2_IF_1000 BIT(9)
180 #define QCA956X_MAC_CFG2_IF_10_100 BIT(8)
181 #define QCA956X_MAC_CFG2_HUGE_FRAME_EN BIT(5)
182 #define QCA956X_MAC_CFG2_LEN_CHECK BIT(4)
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/Linux-v6.6/drivers/net/wireless/realtek/rtw89/
Dreg.h9 #define B_AX_AUTOLOAD_SUS BIT(5)
13 #define B_AX_PWC_EV2EF_B15 BIT(15)
14 #define B_AX_PWC_EV2EF_B14 BIT(14)
15 #define B_AX_ISO_EB2CORE BIT(8)
18 #define B_AX_FEN_BB_GLB_RSTN BIT(1)
19 #define B_AX_FEN_BBRSTB BIT(0)
22 #define B_AX_SOP_ASWRM BIT(31)
23 #define B_AX_SOP_PWMM_DSWR BIT(29)
24 #define B_AX_XTAL_OFF_A_DIE BIT(22)
25 #define B_AX_DIS_WLBT_PDNSUSEN_SOPC BIT(18)
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/Linux-v6.6/drivers/net/dsa/microchip/
Dksz9477_reg.h43 #define PME_ENABLE BIT(1)
44 #define PME_POLARITY BIT(0)
48 #define SW_GIGABIT_ABLE BIT(6)
49 #define SW_REDUNDANCY_ABLE BIT(5)
50 #define SW_AVB_ABLE BIT(4)
68 #define SW_QW_ABLE BIT(5)
74 #define LUE_INT BIT(31)
75 #define TRIG_TS_INT BIT(30)
76 #define APB_TIMEOUT_INT BIT(29)
87 #define SW_SPARE_REG_2 BIT(7)
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/Linux-v6.6/drivers/media/platform/sunxi/sun8i-a83t-mipi-csi2/
Dsun8i_a83t_mipi_csi2_reg.h14 #define SUN8I_A83T_MIPI_CSI2_CTRL_RESET_N BIT(31)
24 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_ECC_ERR_DBL BIT(28)
25 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC3 BIT(27)
26 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC2 BIT(26)
27 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC1 BIT(25)
28 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_CKSM_ERR_VC0 BIT(24)
29 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT3 BIT(23)
30 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT2 BIT(22)
31 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT1 BIT(21)
32 #define SUN8I_A83T_MIPI_CSI2_INT_STA0_LINE_SEQ_ERR_DT0 BIT(20)
[all …]
/Linux-v6.6/include/linux/mfd/abx500/
Dab8500-sysctrl.h83 #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
84 #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
85 #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
86 #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
87 #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
88 #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
89 #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
91 #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
92 #define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2)
97 #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0)
[all …]
/Linux-v6.6/drivers/usb/typec/tcpm/
Dfusb302_reg.h13 #define FUSB_REG_SWITCHES0_CC2_PU_EN BIT(7)
14 #define FUSB_REG_SWITCHES0_CC1_PU_EN BIT(6)
15 #define FUSB_REG_SWITCHES0_VCONN_CC2 BIT(5)
16 #define FUSB_REG_SWITCHES0_VCONN_CC1 BIT(4)
17 #define FUSB_REG_SWITCHES0_MEAS_CC2 BIT(3)
18 #define FUSB_REG_SWITCHES0_MEAS_CC1 BIT(2)
19 #define FUSB_REG_SWITCHES0_CC2_PD_EN BIT(1)
20 #define FUSB_REG_SWITCHES0_CC1_PD_EN BIT(0)
22 #define FUSB_REG_SWITCHES1_POWERROLE BIT(7)
23 #define FUSB_REG_SWITCHES1_SPECREV1 BIT(6)
[all …]
/Linux-v6.6/drivers/usb/dwc2/
Dhw.h14 #define GOTGCTL_CHIRPEN BIT(27)
17 #define GOTGCTL_CURMODE_HOST BIT(21)
18 #define GOTGCTL_OTGVER BIT(20)
19 #define GOTGCTL_BSESVLD BIT(19)
20 #define GOTGCTL_ASESVLD BIT(18)
21 #define GOTGCTL_DBNC_SHORT BIT(17)
22 #define GOTGCTL_CONID_B BIT(16)
23 #define GOTGCTL_DBNCE_FLTR_BYPASS BIT(15)
24 #define GOTGCTL_DEVHNPEN BIT(11)
25 #define GOTGCTL_HSTSETHNPEN BIT(10)
[all …]
/Linux-v6.6/include/linux/mfd/
Drohm-bd71815.h236 #define BD71815_BUCK_PWM_FIXED BIT(4)
237 #define BD71815_BUCK_SNVS_ON BIT(3)
238 #define BD71815_BUCK_RUN_ON BIT(2)
239 #define BD71815_BUCK_LPSR_ON BIT(1)
240 #define BD71815_BUCK_SUSP_ON BIT(0)
243 #define BD71815_BUCK_DVSSEL BIT(7)
244 #define BD71815_BUCK_STBY_DVS BIT(6)
257 #define LED_CHGDONE_EN BIT(4)
258 #define LED_RUN_ON BIT(2)
259 #define LED_LPSR_ON BIT(1)
[all …]
Dlp873x.h68 #define LP873X_BUCK0_CTRL_1_BUCK0_FPWM BIT(3)
69 #define LP873X_BUCK0_CTRL_1_BUCK0_RDIS_EN BIT(2)
70 #define LP873X_BUCK0_CTRL_1_BUCK0_EN_PIN_CTRL BIT(1)
71 #define LP873X_BUCK0_CTRL_1_BUCK0_EN BIT(0)
76 #define LP873X_BUCK1_CTRL_1_BUCK1_FPWM BIT(3)
77 #define LP873X_BUCK1_CTRL_1_BUCK1_RDIS_EN BIT(2)
78 #define LP873X_BUCK1_CTRL_1_BUCK1_EN_PIN_CTRL BIT(1)
79 #define LP873X_BUCK1_CTRL_1_BUCK1_EN BIT(0)
88 #define LP873X_LDO0_CTRL_LDO0_RDIS_EN BIT(2)
89 #define LP873X_LDO0_CTRL_LDO0_EN_PIN_CTRL BIT(1)
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Dlp87565.h97 #define LP87565_BUCK_CTRL_1_EN BIT(7)
98 #define LP87565_BUCK_CTRL_1_EN_PIN_CTRL BIT(6)
101 #define LP87565_BUCK_CTRL_1_ROOF_FLOOR_EN BIT(3)
102 #define LP87565_BUCK_CTRL_1_RDIS_EN BIT(2)
103 #define LP87565_BUCK_CTRL_1_FPWM BIT(1)
105 #define LP87565_BUCK_CTRL_1_FPWM_MP_0_2 BIT(0)
119 #define LP87565_RESET_SW_RESET BIT(0)
121 #define LP87565_CONFIG_DOUBLE_DELAY BIT(7)
122 #define LP87565_CONFIG_CLKIN_PD BIT(6)
123 #define LP87565_CONFIG_EN4_PD BIT(5)
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/Linux-v6.6/drivers/net/wireless/realtek/rtl8xxxu/
Drtl8xxxu_regs.h10 #define SYS_ISO_MD2PP BIT(0)
11 #define SYS_ISO_ANALOG_IPS BIT(5)
12 #define SYS_ISO_DIOR BIT(9)
13 #define SYS_ISO_PWC_EV25V BIT(14)
14 #define SYS_ISO_PWC_EV12V BIT(15)
17 #define SYS_FUNC_BBRSTB BIT(0)
18 #define SYS_FUNC_BB_GLB_RSTN BIT(1)
19 #define SYS_FUNC_USBA BIT(2)
20 #define SYS_FUNC_UPLL BIT(3)
21 #define SYS_FUNC_USBD BIT(4)
[all …]
/Linux-v6.6/drivers/net/wireless/realtek/rtw88/
Dreg.h9 #define BIT_FEN_EN_25_1 BIT(13)
10 #define BIT_FEN_ELDR BIT(12)
11 #define BIT_FEN_CPUEN BIT(2)
12 #define BIT_FEN_BB_GLB_RST BIT(1)
13 #define BIT_FEN_BB_RSTB BIT(0)
14 #define BIT_R_DIS_PRST BIT(6)
15 #define BIT_WLOCK_1C_B6 BIT(5)
17 #define BIT_PFM_WOWL BIT(3)
19 #define BIT_CPU_CLK_EN BIT(14)
22 #define BIT_ANA8M BIT(1)
[all …]
/Linux-v6.6/drivers/staging/emxx_udc/
Demxx_udc.h48 #define TEST_FORCE_ENABLE (BIT(18) | BIT(16))
50 #define INT_SEL BIT(10)
51 #define CONSTFS BIT(9)
52 #define SOF_RCV BIT(8)
53 #define RSUM_IN BIT(7)
54 #define SUSPEND BIT(6)
55 #define CONF BIT(5)
56 #define DEFAULT BIT(4)
57 #define CONNECTB BIT(3)
58 #define PUE2 BIT(2)
[all …]
/Linux-v6.6/drivers/net/ethernet/asix/
Dax88796c_main.h121 #define AX_FC_RX BIT(0)
122 #define AX_FC_TX BIT(1)
123 #define AX_FC_ANEG BIT(2)
126 #define AX_CAP_COMP BIT(0)
153 #define PSR_DEV_READY BIT(7)
155 #define PSR_RESET_CLR BIT(15)
158 #define FER_IPALM BIT(0)
159 #define FER_DCRC BIT(1)
160 #define FER_RH3M BIT(2)
161 #define FER_HEADERSWAP BIT(7)
[all …]
/Linux-v6.6/drivers/net/ethernet/mediatek/
Dmtk_wed_regs.h7 #define MTK_WFDMA_DESC_CTRL_TO_HOST BIT(8)
10 #define MTK_WDMA_DESC_CTRL_LAST_SEG1 BIT(15)
11 #define MTK_WDMA_DESC_CTRL_BURST BIT(16)
13 #define MTK_WDMA_DESC_CTRL_LAST_SEG0 BIT(30)
14 #define MTK_WDMA_DESC_CTRL_DMA_DONE BIT(31)
26 #define MTK_WED_RESET_TX_BM BIT(0)
27 #define MTK_WED_RESET_RX_BM BIT(1)
28 #define MTK_WED_RESET_TX_FREE_AGENT BIT(4)
29 #define MTK_WED_RESET_WPDMA_TX_DRV BIT(8)
30 #define MTK_WED_RESET_WPDMA_RX_DRV BIT(9)
[all …]
/Linux-v6.6/sound/soc/fsl/
Dfsl_xcvr.h95 #define FSL_XCVR_EXT_CTRL_CORE_RESET BIT(31)
97 #define FSL_XCVR_EXT_CTRL_RX_CMDC_RESET BIT(30)
98 #define FSL_XCVR_EXT_CTRL_TX_CMDC_RESET BIT(29)
99 #define FSL_XCVR_EXT_CTRL_CMDC_RESET(t) (t ? BIT(29) : BIT(30))
101 #define FSL_XCVR_EXT_CTRL_RX_DPTH_RESET BIT(28)
102 #define FSL_XCVR_EXT_CTRL_TX_DPTH_RESET BIT(27)
103 #define FSL_XCVR_EXT_CTRL_DPTH_RESET(t) (t ? BIT(27) : BIT(28))
105 #define FSL_XCVR_EXT_CTRL_TX_RX_MODE BIT(26)
106 #define FSL_XCVR_EXT_CTRL_DMA_RD_DIS BIT(25)
107 #define FSL_XCVR_EXT_CTRL_DMA_WR_DIS BIT(24)
[all …]
/Linux-v6.6/drivers/comedi/drivers/
Dni_stc.h25 #define NISTC_INTA_ACK_G0_GATE BIT(15)
26 #define NISTC_INTA_ACK_G0_TC BIT(14)
27 #define NISTC_INTA_ACK_AI_ERR BIT(13)
28 #define NISTC_INTA_ACK_AI_STOP BIT(12)
29 #define NISTC_INTA_ACK_AI_START BIT(11)
30 #define NISTC_INTA_ACK_AI_START2 BIT(10)
31 #define NISTC_INTA_ACK_AI_START1 BIT(9)
32 #define NISTC_INTA_ACK_AI_SC_TC BIT(8)
33 #define NISTC_INTA_ACK_AI_SC_TC_ERR BIT(7)
34 #define NISTC_INTA_ACK_G0_TC_ERR BIT(6)
[all …]
/Linux-v6.6/include/linux/
Dhwmon.h50 #define HWMON_C_TEMP_RESET_HISTORY BIT(hwmon_chip_temp_reset_history)
51 #define HWMON_C_IN_RESET_HISTORY BIT(hwmon_chip_in_reset_history)
52 #define HWMON_C_CURR_RESET_HISTORY BIT(hwmon_chip_curr_reset_history)
53 #define HWMON_C_POWER_RESET_HISTORY BIT(hwmon_chip_power_reset_history)
54 #define HWMON_C_REGISTER_TZ BIT(hwmon_chip_register_tz)
55 #define HWMON_C_UPDATE_INTERVAL BIT(hwmon_chip_update_interval)
56 #define HWMON_C_ALARMS BIT(hwmon_chip_alarms)
57 #define HWMON_C_SAMPLES BIT(hwmon_chip_samples)
58 #define HWMON_C_CURR_SAMPLES BIT(hwmon_chip_curr_samples)
59 #define HWMON_C_IN_SAMPLES BIT(hwmon_chip_in_samples)
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